1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
2 ; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
3 ; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefixes=X64
5 define i32 @extract3(ptr, i32) nounwind {
10 ; X86-NEXT: subl $8, %esp
11 ; X86-NEXT: movl 24(%esp), %esi
12 ; X86-NEXT: andl $7, %esi
13 ; X86-NEXT: movl 20(%esp), %eax
14 ; X86-NEXT: movzwl (%eax), %ebx
15 ; X86-NEXT: movl %ebx, %ecx
16 ; X86-NEXT: shrb $3, %cl
17 ; X86-NEXT: andb $7, %cl
18 ; X86-NEXT: movb %bl, %ch
19 ; X86-NEXT: andb $7, %ch
20 ; X86-NEXT: movl %ebx, %eax
21 ; X86-NEXT: shrl $6, %eax
22 ; X86-NEXT: andb $7, %al
23 ; X86-NEXT: movl %ebx, %edx
24 ; X86-NEXT: shrl $9, %edx
25 ; X86-NEXT: andb $7, %dl
26 ; X86-NEXT: shrl $12, %ebx
27 ; X86-NEXT: movb %bl, 4(%esp)
28 ; X86-NEXT: movb %dl, 3(%esp)
29 ; X86-NEXT: movb %al, 2(%esp)
30 ; X86-NEXT: movb %ch, (%esp)
31 ; X86-NEXT: movb %cl, 1(%esp)
32 ; X86-NEXT: movzbl (%esp,%esi), %eax
33 ; X86-NEXT: andl $7, %eax
34 ; X86-NEXT: addl $8, %esp
39 ; X64-LABEL: extract3:
40 ; X64: # %bb.0: # %_L1
41 ; X64-NEXT: # kill: def $esi killed $esi def $rsi
42 ; X64-NEXT: movzwl (%rdi), %eax
43 ; X64-NEXT: movl %eax, %ecx
44 ; X64-NEXT: shrl $9, %ecx
45 ; X64-NEXT: andl $7, %ecx
46 ; X64-NEXT: movd %ecx, %xmm0
47 ; X64-NEXT: movl %eax, %ecx
48 ; X64-NEXT: shrl $6, %ecx
49 ; X64-NEXT: andl $7, %ecx
50 ; X64-NEXT: movd %ecx, %xmm1
51 ; X64-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
52 ; X64-NEXT: movl %eax, %ecx
53 ; X64-NEXT: andl $7, %ecx
54 ; X64-NEXT: movd %ecx, %xmm0
55 ; X64-NEXT: movd %eax, %xmm2
56 ; X64-NEXT: shrl $3, %eax
57 ; X64-NEXT: andl $7, %eax
58 ; X64-NEXT: movd %eax, %xmm3
59 ; X64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
60 ; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
61 ; X64-NEXT: psrld $12, %xmm2
62 ; X64-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
63 ; X64-NEXT: movdqa %xmm0, -24(%rsp)
64 ; X64-NEXT: andl $7, %esi
65 ; X64-NEXT: movzwl -24(%rsp,%rsi,2), %eax
66 ; X64-NEXT: andl $7, %eax
70 %3 = bitcast i15 %2 to <5 x i3>
71 %4 = extractelement <5 x i3> %3, i32 %1
72 %5 = zext i3 %4 to i32