1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 < %s | FileCheck %s --check-prefixes=CHECK-SSE,CHECK-SSE2
3 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.1 < %s | FileCheck %s --check-prefixes=CHECK-SSE,CHECK-SSE41
4 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx < %s | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX1
5 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX2
6 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl < %s | FileCheck %s --check-prefixes=CHECK-AVX,CHECK-AVX512VL
8 define <4 x i1> @t0_all_tautological(<4 x i32> %X) nounwind {
9 ; CHECK-SSE-LABEL: t0_all_tautological:
11 ; CHECK-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
12 ; CHECK-SSE-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
13 ; CHECK-SSE-NEXT: retq
15 ; CHECK-AVX-LABEL: t0_all_tautological:
17 ; CHECK-AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
18 ; CHECK-AVX-NEXT: vpcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
19 ; CHECK-AVX-NEXT: retq
20 %urem = urem <4 x i32> %X, <i32 1, i32 1, i32 2, i32 2>
21 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 1, i32 2, i32 3>
25 define <4 x i1> @t1_all_odd_eq(<4 x i32> %X) nounwind {
26 ; CHECK-SSE2-LABEL: t1_all_odd_eq:
27 ; CHECK-SSE2: # %bb.0:
28 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
29 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
30 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
31 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
32 ; CHECK-SSE2-NEXT: retq
34 ; CHECK-SSE41-LABEL: t1_all_odd_eq:
35 ; CHECK-SSE41: # %bb.0:
36 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
37 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1431655765,4294967295,4294967295,4294967295]
38 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
39 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
40 ; CHECK-SSE41-NEXT: pxor %xmm1, %xmm1
41 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
42 ; CHECK-SSE41-NEXT: retq
44 ; CHECK-AVX1-LABEL: t1_all_odd_eq:
45 ; CHECK-AVX1: # %bb.0:
46 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
47 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
48 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
49 ; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
50 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
51 ; CHECK-AVX1-NEXT: retq
53 ; CHECK-AVX2-LABEL: t1_all_odd_eq:
54 ; CHECK-AVX2: # %bb.0:
55 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
56 ; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
57 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
58 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
59 ; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
60 ; CHECK-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
61 ; CHECK-AVX2-NEXT: retq
63 ; CHECK-AVX512VL-LABEL: t1_all_odd_eq:
64 ; CHECK-AVX512VL: # %bb.0:
65 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
66 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
67 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
68 ; CHECK-AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
69 ; CHECK-AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
70 ; CHECK-AVX512VL-NEXT: retq
71 %urem = urem <4 x i32> %X, <i32 3, i32 1, i32 1, i32 9>
72 %cmp = icmp eq <4 x i32> %urem, <i32 0, i32 42, i32 0, i32 42>
76 define <4 x i1> @t1_all_odd_ne(<4 x i32> %X) nounwind {
77 ; CHECK-SSE2-LABEL: t1_all_odd_ne:
78 ; CHECK-SSE2: # %bb.0:
79 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
80 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
81 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
82 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
83 ; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm1
84 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
85 ; CHECK-SSE2-NEXT: retq
87 ; CHECK-SSE41-LABEL: t1_all_odd_ne:
88 ; CHECK-SSE41: # %bb.0:
89 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
90 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1431655765,4294967295,4294967295,4294967295]
91 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
92 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
93 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm1
94 ; CHECK-SSE41-NEXT: pxor %xmm1, %xmm0
95 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
96 ; CHECK-SSE41-NEXT: retq
98 ; CHECK-AVX1-LABEL: t1_all_odd_ne:
99 ; CHECK-AVX1: # %bb.0:
100 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
101 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
102 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
103 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
104 ; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
105 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
106 ; CHECK-AVX1-NEXT: retq
108 ; CHECK-AVX2-LABEL: t1_all_odd_ne:
109 ; CHECK-AVX2: # %bb.0:
110 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2863311531,2863311531,2863311531,2863311531]
111 ; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
112 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
113 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
114 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
115 ; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
116 ; CHECK-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
117 ; CHECK-AVX2-NEXT: retq
119 ; CHECK-AVX512VL-LABEL: t1_all_odd_ne:
120 ; CHECK-AVX512VL: # %bb.0:
121 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
122 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
123 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
124 ; CHECK-AVX512VL-NEXT: vpternlogq $15, %xmm0, %xmm0, %xmm0
125 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
126 ; CHECK-AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
127 ; CHECK-AVX512VL-NEXT: retq
128 %urem = urem <4 x i32> %X, <i32 3, i32 1, i32 1, i32 9>
129 %cmp = icmp ne <4 x i32> %urem, <i32 0, i32 42, i32 0, i32 42>
133 define <8 x i1> @t2_narrow(<8 x i16> %X) nounwind {
134 ; CHECK-SSE2-LABEL: t2_narrow:
135 ; CHECK-SSE2: # %bb.0:
136 ; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [43691,43691,43691,43691,43691,43691,43691,43691]
137 ; CHECK-SSE2-NEXT: psubusw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
138 ; CHECK-SSE2-NEXT: pxor %xmm1, %xmm1
139 ; CHECK-SSE2-NEXT: pcmpeqw %xmm1, %xmm0
140 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
141 ; CHECK-SSE2-NEXT: retq
143 ; CHECK-SSE41-LABEL: t2_narrow:
144 ; CHECK-SSE41: # %bb.0:
145 ; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [43691,43691,43691,43691,43691,43691,43691,43691]
146 ; CHECK-SSE41-NEXT: pmovsxdq {{.*#+}} xmm1 = [18446744073709507925,18446744073709507925]
147 ; CHECK-SSE41-NEXT: pminuw %xmm0, %xmm1
148 ; CHECK-SSE41-NEXT: pcmpeqw %xmm1, %xmm0
149 ; CHECK-SSE41-NEXT: pxor %xmm1, %xmm1
150 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
151 ; CHECK-SSE41-NEXT: retq
153 ; CHECK-AVX1-LABEL: t2_narrow:
154 ; CHECK-AVX1: # %bb.0:
155 ; CHECK-AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [43691,43691,43691,43691,43691,43691,43691,43691]
156 ; CHECK-AVX1-NEXT: vpminuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
157 ; CHECK-AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
158 ; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
159 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
160 ; CHECK-AVX1-NEXT: retq
162 ; CHECK-AVX2-LABEL: t2_narrow:
163 ; CHECK-AVX2: # %bb.0:
164 ; CHECK-AVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [43691,43691,43691,43691,43691,43691,43691,43691]
165 ; CHECK-AVX2-NEXT: vpminuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
166 ; CHECK-AVX2-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
167 ; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
168 ; CHECK-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
169 ; CHECK-AVX2-NEXT: retq
171 ; CHECK-AVX512VL-LABEL: t2_narrow:
172 ; CHECK-AVX512VL: # %bb.0:
173 ; CHECK-AVX512VL-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [43691,43691,43691,43691,43691,43691,43691,43691]
174 ; CHECK-AVX512VL-NEXT: vpminuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
175 ; CHECK-AVX512VL-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
176 ; CHECK-AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
177 ; CHECK-AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
178 ; CHECK-AVX512VL-NEXT: retq
179 %urem = urem <8 x i16> %X, <i16 3, i16 1, i16 1, i16 9, i16 3, i16 1, i16 1, i16 9>
180 %cmp = icmp eq <8 x i16> %urem, <i16 0, i16 0, i16 42, i16 42, i16 0, i16 0, i16 42, i16 42>
184 define <2 x i1> @t3_wide(<2 x i64> %X) nounwind {
185 ; CHECK-SSE2-LABEL: t3_wide:
186 ; CHECK-SSE2: # %bb.0:
187 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [12297829382473034411,12297829382473034411]
188 ; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm2
189 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2
190 ; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm3
191 ; CHECK-SSE2-NEXT: psrlq $32, %xmm3
192 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm3
193 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
194 ; CHECK-SSE2-NEXT: paddq %xmm3, %xmm0
195 ; CHECK-SSE2-NEXT: psllq $32, %xmm0
196 ; CHECK-SSE2-NEXT: paddq %xmm2, %xmm0
197 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
198 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
199 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
200 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,0,2,2]
201 ; CHECK-SSE2-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
202 ; CHECK-SSE2-NEXT: pand %xmm2, %xmm1
203 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
204 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
205 ; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm1
206 ; CHECK-SSE2-NEXT: pxor %xmm0, %xmm1
207 ; CHECK-SSE2-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero
208 ; CHECK-SSE2-NEXT: retq
210 ; CHECK-SSE41-LABEL: t3_wide:
211 ; CHECK-SSE41: # %bb.0:
212 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [12297829382473034411,12297829382473034411]
213 ; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm2
214 ; CHECK-SSE41-NEXT: pmuludq %xmm1, %xmm2
215 ; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm3
216 ; CHECK-SSE41-NEXT: psrlq $32, %xmm3
217 ; CHECK-SSE41-NEXT: pmuludq %xmm1, %xmm3
218 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
219 ; CHECK-SSE41-NEXT: paddq %xmm3, %xmm0
220 ; CHECK-SSE41-NEXT: psllq $32, %xmm0
221 ; CHECK-SSE41-NEXT: paddq %xmm2, %xmm0
222 ; CHECK-SSE41-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
223 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
224 ; CHECK-SSE41-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
225 ; CHECK-SSE41-NEXT: pmovsxdq %xmm0, %xmm2
226 ; CHECK-SSE41-NEXT: pcmpeqd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
227 ; CHECK-SSE41-NEXT: pand %xmm2, %xmm1
228 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
229 ; CHECK-SSE41-NEXT: por %xmm1, %xmm0
230 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm1
231 ; CHECK-SSE41-NEXT: pxor %xmm0, %xmm1
232 ; CHECK-SSE41-NEXT: movq {{.*#+}} xmm0 = xmm1[0],zero
233 ; CHECK-SSE41-NEXT: retq
235 ; CHECK-AVX1-LABEL: t3_wide:
236 ; CHECK-AVX1: # %bb.0:
237 ; CHECK-AVX1-NEXT: vmovddup {{.*#+}} xmm1 = [12297829382473034411,12297829382473034411]
238 ; CHECK-AVX1-NEXT: # xmm1 = mem[0,0]
239 ; CHECK-AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
240 ; CHECK-AVX1-NEXT: vpsrlq $32, %xmm0, %xmm3
241 ; CHECK-AVX1-NEXT: vpmuludq %xmm1, %xmm3, %xmm1
242 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
243 ; CHECK-AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0
244 ; CHECK-AVX1-NEXT: vpsllq $32, %xmm0, %xmm0
245 ; CHECK-AVX1-NEXT: vpaddq %xmm0, %xmm2, %xmm0
246 ; CHECK-AVX1-NEXT: vpxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
247 ; CHECK-AVX1-NEXT: movabsq $-3074457345618258603, %rax # imm = 0xD555555555555555
248 ; CHECK-AVX1-NEXT: vmovq %rax, %xmm1
249 ; CHECK-AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
250 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
251 ; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
252 ; CHECK-AVX1-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
253 ; CHECK-AVX1-NEXT: retq
255 ; CHECK-AVX2-LABEL: t3_wide:
256 ; CHECK-AVX2: # %bb.0:
257 ; CHECK-AVX2-NEXT: vpbroadcastq {{.*#+}} xmm1 = [12297829382473034411,12297829382473034411]
258 ; CHECK-AVX2-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
259 ; CHECK-AVX2-NEXT: vpsrlq $32, %xmm0, %xmm3
260 ; CHECK-AVX2-NEXT: vpmuludq %xmm1, %xmm3, %xmm1
261 ; CHECK-AVX2-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
262 ; CHECK-AVX2-NEXT: vpaddq %xmm1, %xmm0, %xmm0
263 ; CHECK-AVX2-NEXT: vpsllq $32, %xmm0, %xmm0
264 ; CHECK-AVX2-NEXT: vpaddq %xmm0, %xmm2, %xmm0
265 ; CHECK-AVX2-NEXT: vpxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
266 ; CHECK-AVX2-NEXT: movabsq $-3074457345618258603, %rax # imm = 0xD555555555555555
267 ; CHECK-AVX2-NEXT: vmovq %rax, %xmm1
268 ; CHECK-AVX2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
269 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
270 ; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
271 ; CHECK-AVX2-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
272 ; CHECK-AVX2-NEXT: retq
274 ; CHECK-AVX512VL-LABEL: t3_wide:
275 ; CHECK-AVX512VL: # %bb.0:
276 ; CHECK-AVX512VL-NEXT: vpbroadcastq {{.*#+}} xmm1 = [12297829382473034411,12297829382473034411]
277 ; CHECK-AVX512VL-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
278 ; CHECK-AVX512VL-NEXT: vpsrlq $32, %xmm0, %xmm3
279 ; CHECK-AVX512VL-NEXT: vpmuludq %xmm1, %xmm3, %xmm1
280 ; CHECK-AVX512VL-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm0, %xmm0
281 ; CHECK-AVX512VL-NEXT: vpaddq %xmm1, %xmm0, %xmm0
282 ; CHECK-AVX512VL-NEXT: vpsllq $32, %xmm0, %xmm0
283 ; CHECK-AVX512VL-NEXT: vpaddq %xmm0, %xmm2, %xmm0
284 ; CHECK-AVX512VL-NEXT: vpminuq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
285 ; CHECK-AVX512VL-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
286 ; CHECK-AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
287 ; CHECK-AVX512VL-NEXT: retq
288 %urem = urem <2 x i64> %X, <i64 3, i64 1>
289 %cmp = icmp eq <2 x i64> %urem, <i64 0, i64 42>