1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -passes=poison-checking -S < %s | FileCheck %s
4 ; This file contains tests to exercise the UB triggering instructions with
5 ; a potential source of UB. The UB source is kept simple; we focus on the
6 ; UB triggering instructions here.
8 define void @store(ptr %base, i32 %a) {
10 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
11 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
12 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
13 ; CHECK-NEXT: [[P:%.*]] = getelementptr i8, ptr [[BASE:%.*]], i32 [[ADD]]
14 ; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
15 ; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
16 ; CHECK-NEXT: store i8 0, ptr [[P]], align 1
17 ; CHECK-NEXT: ret void
19 %add = add nsw i32 %a, 1
20 %p = getelementptr i8, ptr %base, i32 %add
25 define void @load(ptr %base, i32 %a) {
27 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
28 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
29 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
30 ; CHECK-NEXT: [[P:%.*]] = getelementptr i8, ptr [[BASE:%.*]], i32 [[ADD]]
31 ; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
32 ; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
33 ; CHECK-NEXT: [[TMP4:%.*]] = load volatile i8, ptr [[P]], align 1
34 ; CHECK-NEXT: ret void
36 %add = add nsw i32 %a, 1
37 %p = getelementptr i8, ptr %base, i32 %add
38 load volatile i8, ptr %p
42 define void @atomicrmw(ptr %base, i32 %a) {
43 ; CHECK-LABEL: @atomicrmw(
44 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
45 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
46 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
47 ; CHECK-NEXT: [[P:%.*]] = getelementptr i8, ptr [[BASE:%.*]], i32 [[ADD]]
48 ; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
49 ; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
50 ; CHECK-NEXT: [[TMP4:%.*]] = atomicrmw add ptr [[P]], i8 1 seq_cst, align 1
51 ; CHECK-NEXT: ret void
53 %add = add nsw i32 %a, 1
54 %p = getelementptr i8, ptr %base, i32 %add
55 atomicrmw add ptr %p, i8 1 seq_cst
59 define void @cmpxchg(ptr %base, i32 %a) {
60 ; CHECK-LABEL: @cmpxchg(
61 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
62 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
63 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[A]], 1
64 ; CHECK-NEXT: [[P:%.*]] = getelementptr i8, ptr [[BASE:%.*]], i32 [[ADD]]
65 ; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
66 ; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
67 ; CHECK-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[P]], i8 1, i8 0 seq_cst seq_cst, align 1
68 ; CHECK-NEXT: ret void
70 %add = add nsw i32 %a, 1
71 %p = getelementptr i8, ptr %base, i32 %add
72 cmpxchg ptr %p, i8 1, i8 0 seq_cst seq_cst
76 define i32 @udiv(ptr %base, i32 %a) {
78 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
79 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
80 ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
81 ; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
82 ; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
83 ; CHECK-NEXT: [[RES:%.*]] = udiv i32 2048, [[ADD]]
84 ; CHECK-NEXT: ret i32 [[RES]]
86 %add = add nuw i32 %a, 1
87 %res = udiv i32 2048, %add
91 define i32 @sdiv(ptr %base, i32 %a) {
93 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
94 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
95 ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
96 ; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
97 ; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
98 ; CHECK-NEXT: [[RES:%.*]] = sdiv i32 2048, [[ADD]]
99 ; CHECK-NEXT: ret i32 [[RES]]
101 %add = add nuw i32 %a, 1
102 %res = sdiv i32 2048, %add
106 define i32 @urem(ptr %base, i32 %a) {
107 ; CHECK-LABEL: @urem(
108 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
109 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
110 ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
111 ; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
112 ; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
113 ; CHECK-NEXT: [[RES:%.*]] = urem i32 2048, [[ADD]]
114 ; CHECK-NEXT: ret i32 [[RES]]
116 %add = add nuw i32 %a, 1
117 %res = urem i32 2048, %add
121 define i32 @srem(ptr %base, i32 %a) {
122 ; CHECK-LABEL: @srem(
123 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
124 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
125 ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
126 ; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
127 ; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
128 ; CHECK-NEXT: [[RES:%.*]] = srem i32 2048, [[ADD]]
129 ; CHECK-NEXT: ret i32 [[RES]]
131 %add = add nuw i32 %a, 1
132 %res = srem i32 2048, %add
136 define noundef i32 @select_cond_may_be_poison(i32 %a, i32 %b) {
137 ; CHECK-LABEL: @select_cond_may_be_poison(
138 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
139 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
140 ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
141 ; CHECK-NEXT: [[T:%.*]] = trunc i32 [[ADD]] to i1
142 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[T]], i32 [[ADD]], i32 [[B:%.*]]
143 ; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[TMP2]], true
144 ; CHECK-NEXT: call void @__poison_checker_assert(i1 [[TMP3]])
145 ; CHECK-NEXT: ret i32 [[SEL]]
147 %add = add nuw i32 %a, 1
148 %t = trunc i32 %add to i1
149 %sel = select i1 %t, i32 %add, i32 %b
153 define noundef i32 @select_cond_true_third_op_may_be_poison(i32 %a, i32 %b) {
154 ; CHECK-LABEL: @select_cond_true_third_op_may_be_poison(
155 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
156 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
157 ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
158 ; CHECK-NEXT: [[SEL:%.*]] = select i1 true, i32 [[B:%.*]], i32 [[ADD]]
159 ; CHECK-NEXT: ret i32 [[SEL]]
161 %add = add nuw i32 %a, 1
162 %sel = select i1 true, i32 %b, i32 %add
166 define noundef i32 @select_cond_false_second_op_may_be_poison(i1 %c, i32 %a, i32 %b) {
167 ; CHECK-LABEL: @select_cond_false_second_op_may_be_poison(
168 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
169 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
170 ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
171 ; CHECK-NEXT: [[SEL:%.*]] = select i1 false, i32 [[ADD]], i32 [[B:%.*]]
172 ; CHECK-NEXT: ret i32 [[SEL]]
174 %add = add nuw i32 %a, 1
175 %sel = select i1 false, i32 %add, i32 %b
179 define noundef i32 @select_unknown_true_third_op_may_be_poison(i1 %c, i32 %a, i32 %b) {
180 ; CHECK-LABEL: @select_unknown_true_third_op_may_be_poison(
181 ; CHECK-NEXT: [[TMP1:%.*]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A:%.*]], i32 1)
182 ; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { i32, i1 } [[TMP1]], 1
183 ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[A]], 1
184 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], i32 [[B:%.*]], i32 [[ADD]]
185 ; CHECK-NEXT: ret i32 [[SEL]]
187 %add = add nuw i32 %a, 1
188 %sel = select i1 %c, i32 %b, i32 %add