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HEAD
[RISCV][VLOPT] Add vector narrowing integer right shift instructions to isSupportedIn...
[llvm-project.git]
/
llvm
/
test
/
Linker
/
Inputs
/
PR11464.b.ll
blob
c9a5ac28954cf92678578215f0dce94347d453a9
1
%bug_type = type { ptr }
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%bar = type { i32 }
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define i32 @bug_a(ptr %fp) nounwind uwtable {
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entry:
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ret i32 0
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}
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define i32 @bug_b(ptr %a) nounwind uwtable {
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entry:
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ret i32 0
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}