1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2 ; RUN: opt -S --passes=slp-vectorizer -mtriple=s390x-unknown-linux -mcpu=z14 < %s | FileCheck %s
5 ; CHECK-LABEL: define void @test(
6 ; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
7 ; CHECK-NEXT: [[TMP1:%.*]] = zext i8 0 to i32
8 ; CHECK-NEXT: [[TMP2:%.*]] = zext i8 0 to i32
9 ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> <i32 poison, i32 0, i32 0, i32 0>, i32 [[TMP2]], i32 0
10 ; CHECK-NEXT: [[TMP4:%.*]] = select <4 x i1> zeroinitializer, <4 x i32> zeroinitializer, <4 x i32> [[TMP3]]
11 ; CHECK-NEXT: [[TMP5:%.*]] = select i1 false, i32 0, i32 0
12 ; CHECK-NEXT: [[TMP6:%.*]] = select i1 false, i32 0, i32 [[TMP1]]
13 ; CHECK-NEXT: [[TMP7:%.*]] = select i1 false, i32 0, i32 [[TMP2]]
14 ; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> [[TMP4]])
15 ; CHECK-NEXT: [[OP_RDX:%.*]] = xor i32 [[TMP8]], [[TMP5]]
16 ; CHECK-NEXT: [[OP_RDX1:%.*]] = xor i32 [[TMP6]], [[TMP7]]
17 ; CHECK-NEXT: [[OP_RDX2:%.*]] = xor i32 [[OP_RDX]], [[OP_RDX1]]
18 ; CHECK-NEXT: [[TMP9:%.*]] = trunc i32 [[OP_RDX2]] to i16
19 ; CHECK-NEXT: store i16 [[TMP9]], ptr null, align 2
20 ; CHECK-NEXT: ret void
23 %.not = icmp sgt i32 0, %1
25 %3 = select i1 %.not, i32 0, i32 0
27 %.not.1 = icmp sgt i32 0, %4
29 %6 = select i1 %.not.1, i32 0, i32 %5
32 %.not.2 = icmp sgt i32 0, %8
33 %9 = select i1 %.not.2, i32 0, i32 0
35 %11 = zext i8 0 to i32
36 %.not.3 = icmp sgt i32 0, %11
37 %12 = select i1 %.not.3, i32 0, i32 0
38 %13 = xor i32 %12, %10
39 %14 = select i1 false, i32 0, i32 0
40 %15 = xor i32 %14, %13
41 %16 = select i1 false, i32 0, i32 %2
42 %17 = xor i32 %16, %15
43 %18 = select i1 false, i32 0, i32 %5
44 %19 = xor i32 %18, %17
45 %20 = trunc i32 %19 to i16
46 store i16 %20, ptr null, align 2