Allow SymbolUserOpInterface operators to be used in RemoveDeadValues Pass (#117405)
[llvm-project.git] / llvm / tools / llvm-exegesis / lib / RegisterAliasing.cpp
blobee612fb0dd6af69c4039000fe05dadf2fba75ed5
1 //===-- RegisterAliasing.cpp ------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include "RegisterAliasing.h"
11 namespace llvm {
12 namespace exegesis {
14 BitVector getAliasedBits(const MCRegisterInfo &RegInfo,
15 const BitVector &SourceBits) {
16 BitVector AliasedBits(RegInfo.getNumRegs());
17 for (const size_t PhysReg : SourceBits.set_bits()) {
18 using RegAliasItr = MCRegAliasIterator;
19 for (auto Itr = RegAliasItr(PhysReg, &RegInfo, true); Itr.isValid();
20 ++Itr) {
21 AliasedBits.set(*Itr);
24 return AliasedBits;
27 RegisterAliasingTracker::RegisterAliasingTracker(const MCRegisterInfo &RegInfo)
28 : SourceBits(RegInfo.getNumRegs()), AliasedBits(RegInfo.getNumRegs()),
29 Origins(RegInfo.getNumRegs()) {}
31 RegisterAliasingTracker::RegisterAliasingTracker(
32 const MCRegisterInfo &RegInfo, const BitVector &ReservedReg,
33 const MCRegisterClass &RegClass)
34 : RegisterAliasingTracker(RegInfo) {
35 for (MCPhysReg PhysReg : RegClass)
36 if (!ReservedReg[PhysReg]) // Removing reserved registers.
37 SourceBits.set(PhysReg);
38 FillOriginAndAliasedBits(RegInfo, SourceBits);
41 RegisterAliasingTracker::RegisterAliasingTracker(const MCRegisterInfo &RegInfo,
42 const MCPhysReg PhysReg)
43 : RegisterAliasingTracker(RegInfo) {
44 SourceBits.set(PhysReg);
45 FillOriginAndAliasedBits(RegInfo, SourceBits);
48 void RegisterAliasingTracker::FillOriginAndAliasedBits(
49 const MCRegisterInfo &RegInfo, const BitVector &SourceBits) {
50 using RegAliasItr = MCRegAliasIterator;
51 for (const size_t PhysReg : SourceBits.set_bits()) {
52 for (auto Itr = RegAliasItr(PhysReg, &RegInfo, true); Itr.isValid();
53 ++Itr) {
54 AliasedBits.set(*Itr);
55 Origins[*Itr] = PhysReg;
60 RegisterAliasingTrackerCache::RegisterAliasingTrackerCache(
61 const MCRegisterInfo &RegInfo, const BitVector &ReservedReg)
62 : RegInfo(RegInfo), ReservedReg(ReservedReg),
63 EmptyRegisters(RegInfo.getNumRegs()) {}
65 const RegisterAliasingTracker &
66 RegisterAliasingTrackerCache::getRegister(MCPhysReg PhysReg) const {
67 auto &Found = Registers[PhysReg];
68 if (!Found)
69 Found.reset(new RegisterAliasingTracker(RegInfo, PhysReg));
70 return *Found;
73 const RegisterAliasingTracker &
74 RegisterAliasingTrackerCache::getRegisterClass(unsigned RegClassIndex) const {
75 auto &Found = RegisterClasses[RegClassIndex];
76 const auto &RegClass = RegInfo.getRegClass(RegClassIndex);
77 if (!Found)
78 Found.reset(new RegisterAliasingTracker(RegInfo, ReservedReg, RegClass));
79 return *Found;
82 std::string debugString(const MCRegisterInfo &RegInfo, const BitVector &Regs) {
83 std::string Result;
84 for (const unsigned Reg : Regs.set_bits()) {
85 Result.append(RegInfo.getName(Reg));
86 Result.push_back(' ');
88 return Result;
91 } // namespace exegesis
92 } // namespace llvm