[AArch64] Add fpext and fpround costs (#119292)
[llvm-project.git] / llvm / unittests / tools / llvm-exegesis / PowerPC / AnalysisTest.cpp
blob1aca1cb974a63dae4d722475552e68b3311e8ea0
1 //===-- PPCAnalysisTest.cpp ---------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include "Analysis.h"
11 #include <cassert>
12 #include <memory>
14 #include "llvm/MC/TargetRegistry.h"
15 #include "llvm/Support/TargetSelect.h"
16 #include "gmock/gmock.h"
17 #include "gtest/gtest.h"
19 namespace llvm{
20 namespace exegesis {
21 namespace {
23 using testing::Pair;
24 using testing::UnorderedElementsAre;
26 class PPCAnalysisTest : public ::testing::Test {
27 protected:
28 PPCAnalysisTest() {
29 const std::string TT = "powerpc64le-unknown-linux";
30 std::string error;
31 const Target *const TheTarget = TargetRegistry::lookupTarget(TT, error);
32 if (!TheTarget) {
33 errs() << error << "\n";
34 return;
36 STI.reset(TheTarget->createMCSubtargetInfo(TT, "pwr9", ""));
38 // Compute the ProxResIdx of ports uses in tests.
39 const auto &SM = STI->getSchedModel();
40 for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
41 const std::string Name = SM.getProcResource(I)->Name;
42 if (Name == "ALU") {
43 ALUIdx = I;
44 } else if (Name == "ALUE") {
45 ALUEIdx = I;
46 } else if (Name == "ALUO") {
47 ALUOIdx = I;
48 } else if (Name == "IP_AGEN") {
49 IPAGENIdx = I;
52 EXPECT_NE(ALUIdx, 0);
53 EXPECT_NE(ALUEIdx, 0);
54 EXPECT_NE(ALUOIdx, 0);
55 EXPECT_NE(IPAGENIdx, 0);
58 static void SetUpTestCase() {
59 LLVMInitializePowerPCTargetInfo();
60 LLVMInitializePowerPCTarget();
61 LLVMInitializePowerPCTargetMC();
64 protected:
65 std::unique_ptr<const MCSubtargetInfo> STI;
66 uint16_t ALUIdx = 0;
67 uint16_t ALUEIdx = 0;
68 uint16_t ALUOIdx = 0;
69 uint16_t IPAGENIdx = 0;
72 TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_2ALU) {
73 const auto Pressure =
74 computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUIdx, 2, 0}});
75 EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUIdx, 2.0)));
78 TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_1ALUE) {
79 const auto Pressure =
80 computeIdealizedProcResPressure(STI->getSchedModel(), {{ALUEIdx, 2, 0}});
81 EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUEIdx, 2.0)));
84 TEST_F(PPCAnalysisTest, ComputeIdealizedProcResPressure_1ALU1IPAGEN) {
85 const auto Pressure = computeIdealizedProcResPressure(
86 STI->getSchedModel(), {{ALUIdx, 1, 0}, {IPAGENIdx, 1, 0}});
87 EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(ALUIdx, 1.0),Pair(IPAGENIdx, 1)));
89 } // namespace
90 } // namespace exegesis
91 } // namespace llvm