[RISCV][VLOPT] Add vector narrowing integer right shift instructions to isSupportedIn...
[llvm-project.git] / mlir / lib / TableGen / GenInfo.cpp
blob62a3d5283ef52e9a8c7933297a6a49b022900aef
1 //===- GenInfo.cpp - Generator info -----------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include "mlir/TableGen/GenInfo.h"
11 #include "mlir/TableGen/GenNameParser.h"
12 #include "llvm/Support/CommandLine.h"
13 #include "llvm/Support/ManagedStatic.h"
15 using namespace mlir;
17 static llvm::ManagedStatic<std::vector<GenInfo>> generatorRegistry;
19 GenRegistration::GenRegistration(StringRef arg, StringRef description,
20 const GenFunction &function) {
21 generatorRegistry->emplace_back(arg, description, function);
24 GenNameParser::GenNameParser(llvm::cl::Option &opt)
25 : llvm::cl::parser<const GenInfo *>(opt) {
26 for (const auto &kv : *generatorRegistry) {
27 addLiteralOption(kv.getGenArgument(), &kv, kv.getGenDescription());
31 void GenNameParser::printOptionInfo(const llvm::cl::Option &o,
32 size_t globalWidth) const {
33 GenNameParser *tp = const_cast<GenNameParser *>(this);
34 llvm::array_pod_sort(tp->Values.begin(), tp->Values.end(),
35 [](const GenNameParser::OptionInfo *vT1,
36 const GenNameParser::OptionInfo *vT2) {
37 return vT1->Name.compare(vT2->Name);
38 });
39 using llvm::cl::parser;
40 parser<const GenInfo *>::printOptionInfo(o, globalWidth);