1 //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements an allocation order for virtual registers.
11 // The preferred allocation order for a virtual register depends on allocation
12 // hints and target hooks. The AllocationOrder class encapsulates all of that.
14 //===----------------------------------------------------------------------===//
16 #include "AllocationOrder.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/CodeGen/RegisterClassInfo.h"
20 #include "llvm/CodeGen/VirtRegMap.h"
21 #include "llvm/Support/Debug.h"
22 #include "llvm/Support/raw_ostream.h"
26 #define DEBUG_TYPE "regalloc"
28 // Compare VirtRegMap::getRegAllocPref().
29 AllocationOrder
AllocationOrder::create(unsigned VirtReg
, const VirtRegMap
&VRM
,
30 const RegisterClassInfo
&RegClassInfo
,
31 const LiveRegMatrix
*Matrix
) {
32 const MachineFunction
&MF
= VRM
.getMachineFunction();
33 const TargetRegisterInfo
*TRI
= &VRM
.getTargetRegInfo();
34 auto Order
= RegClassInfo
.getOrder(MF
.getRegInfo().getRegClass(VirtReg
));
35 SmallVector
<MCPhysReg
, 16> Hints
;
37 TRI
->getRegAllocationHints(VirtReg
, Order
, Hints
, MF
, &VRM
, Matrix
);
42 for (unsigned I
= 0, E
= Hints
.size(); I
!= E
; ++I
)
43 dbgs() << ' ' << printReg(Hints
[I
], TRI
);
48 for (unsigned I
= 0, E
= Hints
.size(); I
!= E
; ++I
)
49 assert(is_contained(Order
, Hints
[I
]) &&
50 "Target hint is outside allocation order.");
52 return AllocationOrder(std::move(Hints
), Order
, HardHints
);