1 ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
3 ; Test for correct placement of 'lvl' instructions
5 ; Function Attrs: nounwind readonly
6 declare <256 x double> @llvm.ve.vl.vld.vssl(i64, ptr, i32)
7 declare void @llvm.ve.vl.vst.vssl(<256 x double>, i64, ptr, i32)
9 ; Check that the backend can handle constant VL as well as parametric VL
12 ; Function Attrs: nounwind
13 define void @switching_vl(i32 %evl, i32 %evl2, ptr %P, ptr %Q) {
14 ; CHECK-LABEL: switching_vl:
16 ; CHECK-NEXT: lea %s4, 256
18 ; CHECK-NEXT: vld %v0, 8, %s2
19 ; CHECK-NEXT: and %s0, %s0, (32)0
21 ; CHECK-NEXT: vst %v0, 16, %s3
22 ; CHECK-NEXT: lea %s4, 128
24 ; CHECK-NEXT: vld %v0, 16, %s2
25 ; CHECK-NEXT: and %s1, %s1, (32)0
27 ; CHECK-NEXT: vst %v0, 16, %s3
29 ; CHECK-NEXT: vld %v0, 8, %s2
31 ; CHECK-NEXT: vst %v0, 16, %s3
32 ; CHECK-NEXT: b.l.t (, %s10)
33 %l0 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %P, i32 256)
34 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %l0, i64 16, ptr %Q, i32 %evl)
35 %l1 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 16, ptr %P, i32 128)
36 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %l1, i64 16, ptr %Q, i32 %evl2)
37 %l2 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %P, i32 128)
38 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %l2, i64 16, ptr %Q, i32 %evl)
42 ; Check that no redundant 'lvl' is inserted when vector length does not change
45 ; Function Attrs: nounwind
46 define void @stable_vl(i32 %evl, ptr %P, ptr %Q) {
47 ; CHECK-LABEL: stable_vl:
49 ; CHECK-NEXT: and %s0, %s0, (32)0
51 ; CHECK-NEXT: vld %v0, 8, %s1
52 ; CHECK-NEXT: vst %v0, 16, %s2
53 ; CHECK-NEXT: vld %v0, 16, %s1
54 ; CHECK-NEXT: vst %v0, 16, %s2
55 ; CHECK-NEXT: vld %v0, 8, %s1
56 ; CHECK-NEXT: vst %v0, 16, %s2
57 ; CHECK-NEXT: b.l.t (, %s10)
58 %l0 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %P, i32 %evl)
59 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %l0, i64 16, ptr %Q, i32 %evl)
60 %l1 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 16, ptr %P, i32 %evl)
61 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %l1, i64 16, ptr %Q, i32 %evl)
62 %l2 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %P, i32 %evl)
63 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %l2, i64 16, ptr %Q, i32 %evl)
67 ;;; Check the case we have a call in the middle of vector instructions.
69 ; Function Attrs: nounwind
70 define void @call_invl(i32 %evl, ptr %P, ptr %Q) {
71 ; CHECK-LABEL: call_invl:
72 ; CHECK: .LBB{{[0-9]+}}_2:
73 ; CHECK-NEXT: st %s18, 288(, %s11) # 8-byte Folded Spill
74 ; CHECK-NEXT: st %s19, 296(, %s11) # 8-byte Folded Spill
75 ; CHECK-NEXT: st %s20, 304(, %s11) # 8-byte Folded Spill
76 ; CHECK-NEXT: or %s18, 0, %s1
77 ; CHECK-NEXT: and %s20, %s0, (32)0
78 ; CHECK-NEXT: lvl %s20
79 ; CHECK-NEXT: vld %v0, 8, %s1
80 ; CHECK-NEXT: or %s19, 0, %s2
81 ; CHECK-NEXT: vst %v0, 16, %s2
82 ; CHECK-NEXT: lea %s0, fun@lo
83 ; CHECK-NEXT: and %s0, %s0, (32)0
84 ; CHECK-NEXT: lea.sl %s12, fun@hi(, %s0)
85 ; CHECK-NEXT: bsic %s10, (, %s12)
86 ; CHECK-NEXT: lvl %s20
87 ; CHECK-NEXT: vld %v0, 16, %s18
88 ; CHECK-NEXT: vst %v0, 16, %s19
89 ; CHECK-NEXT: vld %v0, 8, %s18
90 ; CHECK-NEXT: vst %v0, 16, %s19
91 ; CHECK-NEXT: ld %s20, 304(, %s11) # 8-byte Folded Reload
92 ; CHECK-NEXT: ld %s19, 296(, %s11) # 8-byte Folded Reload
93 ; CHECK-NEXT: ld %s18, 288(, %s11) # 8-byte Folded Reload
94 ; CHECK-NEXT: or %s11, 0, %s9
95 %l0 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %P, i32 %evl)
96 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %l0, i64 16, ptr %Q, i32 %evl)
98 %l1 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 16, ptr %P, i32 %evl)
99 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %l1, i64 16, ptr %Q, i32 %evl)
100 %l2 = tail call <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %P, i32 %evl)
101 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %l2, i64 16, ptr %Q, i32 %evl)