flang/test/Lower/PowerPC/ppc-vec-insert-elem-order.f90

   1 ! RUN: %flang_fc1 -emit-fir %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="FIR" %s
   2 ! RUN: %flang_fc1 -emit-llvm %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="LLVMIR" %s
   3 ! REQUIRES: target=powerpc{{.*}}
   4
   5 !CHECK-LABEL: vec_insert_testf32i64
   6 subroutine vec_insert_testf32i64(v, x, i8)
   7   real(4) :: v
   8   vector(real(4)) :: x
   9   vector(real(4)) :: r
  10   integer(8) :: i8
  11   r = vec_insert(v, x, i8)
  12
  13 ! FIR: %[[v:.*]] = fir.load %arg{{[0-9]}} : !fir.ref<f32>
  14 ! FIR: %[[x:.*]] = fir.load %arg{{[0-9]}} : !fir.ref<!fir.vector<4:f32>>
  15 ! FIR: %[[i8:.*]] = fir.load %arg{{[0-9]}} : !fir.ref<i64>
  16 ! FIR: %[[vr:.*]] = fir.convert %[[x]] : (!fir.vector<4:f32>) -> vector<4xf32>
  17 ! FIR: %[[c:.*]] = arith.constant 4 : i64
  18 ! FIR: %[[urem:.*]] = llvm.urem %[[i8]], %[[c]] : i64
  19 ! FIR: %[[c3:.*]] = arith.constant 3 : i64
  20 ! FIR: %[[sub:.*]] = llvm.sub %[[c3]], %[[urem]] : i64
  21 ! FIR: %[[r:.*]] = vector.insertelement %[[v]], %[[vr]][%[[sub]] : i64] : vector<4xf32>
  22 ! FIR: %[[r_conv:.*]] = fir.convert %[[r]] : (vector<4xf32>) -> !fir.vector<4:f32>
  23 ! FIR: fir.store %[[r_conv]] to %{{[0-9]}} : !fir.ref<!fir.vector<4:f32>>
  24
  25 ! LLVMIR: %[[v:.*]] = load float, ptr %{{[0-9]}}, align 4
  26 ! LLVMIR: %[[x:.*]] = load <4 x float>, ptr %{{[0-9]}}, align 16
  27 ! LLVMIR: %[[i8:.*]] = load i64, ptr %{{[0-9]}}, align 8
  28 ! LLVMIR: %[[urem:.*]] = urem i64 %[[i8]], 4
  29 ! LLVMIR: %[[sub:.*]] = sub i64 3, %[[urem]]
  30 ! LLVMIR: %[[r:.*]] = insertelement <4 x float> %[[x]], float %[[v]], i64 %[[sub]]
  31 ! LLVMIR: store <4 x float> %[[r]], ptr %{{[0-9]}}, align 16
  32 end subroutine vec_insert_testf32i64
  33
  34 !CHECK-LABEL: vec_insert_testi64i8
  35 subroutine vec_insert_testi64i8(v, x, i1, i2, i4, i8)
  36   integer(8) :: v
  37   vector(integer(8)) :: x
  38   vector(integer(8)) :: r
  39   integer(1) :: i1
  40   r = vec_insert(v, x, i1)
  41
  42 ! FIR: %[[v:.*]] = fir.load %arg{{[0-9]}} : !fir.ref<i64>
  43 ! FIR: %[[x:.*]] = fir.load %arg{{[0-9]}} : !fir.ref<!fir.vector<2:i64>>
  44 ! FIR: %[[i1:.*]] = fir.load %arg{{[0-9]}} : !fir.ref<i8>
  45 ! FIR: %[[vr:.*]] = fir.convert %[[x]] : (!fir.vector<2:i64>) -> vector<2xi64>
  46 ! FIR: %[[c:.*]] = arith.constant 2 : i8
  47 ! FIR: %[[urem:.*]] = llvm.urem %[[i1]], %[[c]] : i8
  48 ! FIR: %[[c1:.*]] = arith.constant 1 : i8
  49 ! FIR: %[[sub:.*]] = llvm.sub %[[c1]], %[[urem]] : i8
  50 ! FIR: %[[r:.*]] = vector.insertelement %[[v]], %[[vr]][%[[sub]] : i8] : vector<2xi64>
  51 ! FIR: %[[r_conv:.*]] = fir.convert %[[r]] : (vector<2xi64>) -> !fir.vector<2:i64>
  52 ! FIR: fir.store %[[r_conv]] to %{{[0-9]}} : !fir.ref<!fir.vector<2:i64>>
  53
  54 ! LLVMIR: %[[v:.*]] = load i64, ptr %{{[0-9]}}, align 8
  55 ! LLVMIR: %[[x:.*]] = load <2 x i64>, ptr %{{[0-9]}}, align 16
  56 ! LLVMIR: %[[i1:.*]] = load i8, ptr %{{[0-9]}}, align 1
  57 ! LLVMIR: %[[urem:.*]] = urem i8 %[[i1]], 2
  58 ! LLVMIR: %[[sub:.*]] = sub i8 1, %[[urem]]
  59 ! LLVMIR: %[[r:.*]] = insertelement <2 x i64> %[[x]], i64 %[[v]], i8 %[[sub]]
  60 ! LLVMIR: store <2 x i64> %[[r]], ptr %{{[0-9]}}, align 16
  61 end subroutine vec_insert_testi64i8