1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
4 define void @test_icmp_eq_s32() { ret void }
5 define void @test_icmp_ne_s32() { ret void }
6 define void @test_icmp_ugt_s32() { ret void }
7 define void @test_icmp_uge_s32() { ret void }
8 define void @test_icmp_ult_s32() { ret void }
9 define void @test_icmp_ule_s32() { ret void }
10 define void @test_icmp_sgt_s32() { ret void }
11 define void @test_icmp_sge_s32() { ret void }
12 define void @test_icmp_slt_s32() { ret void }
13 define void @test_icmp_sle_s32() { ret void }
16 name: test_icmp_eq_s32
21 - { id: 0, class: gprb }
22 - { id: 1, class: gprb }
23 - { id: 2, class: gprb }
24 - { id: 3, class: gprb }
29 ; CHECK-LABEL: name: test_icmp_eq_s32
30 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
31 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
32 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
33 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr
34 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 0 /* CC::eq */, $cpsr
35 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg
36 ; CHECK: $r0 = COPY [[t2ANDri]]
37 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
40 %2(s1) = G_ICMP intpred(eq), %0(s32), %1
41 %3(s32) = G_ZEXT %2(s1)
43 BX_RET 14, $noreg, implicit $r0
46 name: test_icmp_ne_s32
51 - { id: 0, class: gprb }
52 - { id: 1, class: gprb }
53 - { id: 2, class: gprb }
54 - { id: 3, class: gprb }
59 ; CHECK-LABEL: name: test_icmp_ne_s32
60 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
61 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
62 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
63 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr
64 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 1 /* CC::ne */, $cpsr
65 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg
66 ; CHECK: $r0 = COPY [[t2ANDri]]
67 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
70 %2(s1) = G_ICMP intpred(ne), %0(s32), %1
71 %3(s32) = G_ZEXT %2(s1)
73 BX_RET 14, $noreg, implicit $r0
76 name: test_icmp_ugt_s32
81 - { id: 0, class: gprb }
82 - { id: 1, class: gprb }
83 - { id: 2, class: gprb }
84 - { id: 3, class: gprb }
89 ; CHECK-LABEL: name: test_icmp_ugt_s32
90 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
91 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
92 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
93 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr
94 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 8 /* CC::hi */, $cpsr
95 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg
96 ; CHECK: $r0 = COPY [[t2ANDri]]
97 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
100 %2(s1) = G_ICMP intpred(ugt), %0(s32), %1
101 %3(s32) = G_ZEXT %2(s1)
103 BX_RET 14, $noreg, implicit $r0
106 name: test_icmp_uge_s32
108 regBankSelected: true
111 - { id: 0, class: gprb }
112 - { id: 1, class: gprb }
113 - { id: 2, class: gprb }
114 - { id: 3, class: gprb }
119 ; CHECK-LABEL: name: test_icmp_uge_s32
120 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
121 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
122 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
123 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr
124 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 2 /* CC::hs */, $cpsr
125 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg
126 ; CHECK: $r0 = COPY [[t2ANDri]]
127 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
130 %2(s1) = G_ICMP intpred(uge), %0(s32), %1
131 %3(s32) = G_ZEXT %2(s1)
133 BX_RET 14, $noreg, implicit $r0
136 name: test_icmp_ult_s32
138 regBankSelected: true
141 - { id: 0, class: gprb }
142 - { id: 1, class: gprb }
143 - { id: 2, class: gprb }
144 - { id: 3, class: gprb }
149 ; CHECK-LABEL: name: test_icmp_ult_s32
150 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
151 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
152 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
153 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr
154 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 3 /* CC::lo */, $cpsr
155 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg
156 ; CHECK: $r0 = COPY [[t2ANDri]]
157 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
160 %2(s1) = G_ICMP intpred(ult), %0(s32), %1
161 %3(s32) = G_ZEXT %2(s1)
163 BX_RET 14, $noreg, implicit $r0
166 name: test_icmp_ule_s32
168 regBankSelected: true
171 - { id: 0, class: gprb }
172 - { id: 1, class: gprb }
173 - { id: 2, class: gprb }
174 - { id: 3, class: gprb }
179 ; CHECK-LABEL: name: test_icmp_ule_s32
180 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
181 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
182 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
183 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr
184 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 9 /* CC::ls */, $cpsr
185 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg
186 ; CHECK: $r0 = COPY [[t2ANDri]]
187 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
190 %2(s1) = G_ICMP intpred(ule), %0(s32), %1
191 %3(s32) = G_ZEXT %2(s1)
193 BX_RET 14, $noreg, implicit $r0
196 name: test_icmp_sgt_s32
198 regBankSelected: true
201 - { id: 0, class: gprb }
202 - { id: 1, class: gprb }
203 - { id: 2, class: gprb }
204 - { id: 3, class: gprb }
209 ; CHECK-LABEL: name: test_icmp_sgt_s32
210 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
211 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
212 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
213 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr
214 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 12 /* CC::gt */, $cpsr
215 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg
216 ; CHECK: $r0 = COPY [[t2ANDri]]
217 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
220 %2(s1) = G_ICMP intpred(sgt), %0(s32), %1
221 %3(s32) = G_ZEXT %2(s1)
223 BX_RET 14, $noreg, implicit $r0
226 name: test_icmp_sge_s32
228 regBankSelected: true
231 - { id: 0, class: gprb }
232 - { id: 1, class: gprb }
233 - { id: 2, class: gprb }
234 - { id: 3, class: gprb }
239 ; CHECK-LABEL: name: test_icmp_sge_s32
240 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
241 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
242 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
243 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr
244 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 10 /* CC::ge */, $cpsr
245 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg
246 ; CHECK: $r0 = COPY [[t2ANDri]]
247 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
250 %2(s1) = G_ICMP intpred(sge), %0(s32), %1
251 %3(s32) = G_ZEXT %2(s1)
253 BX_RET 14, $noreg, implicit $r0
256 name: test_icmp_slt_s32
258 regBankSelected: true
261 - { id: 0, class: gprb }
262 - { id: 1, class: gprb }
263 - { id: 2, class: gprb }
264 - { id: 3, class: gprb }
269 ; CHECK-LABEL: name: test_icmp_slt_s32
270 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
271 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
272 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
273 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr
274 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 11 /* CC::lt */, $cpsr
275 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg
276 ; CHECK: $r0 = COPY [[t2ANDri]]
277 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
280 %2(s1) = G_ICMP intpred(slt), %0(s32), %1
281 %3(s32) = G_ZEXT %2(s1)
283 BX_RET 14, $noreg, implicit $r0
286 name: test_icmp_sle_s32
288 regBankSelected: true
291 - { id: 0, class: gprb }
292 - { id: 1, class: gprb }
293 - { id: 2, class: gprb }
294 - { id: 3, class: gprb }
299 ; CHECK-LABEL: name: test_icmp_sle_s32
300 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
301 ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
302 ; CHECK: [[t2MOVi:%[0-9]+]]:rgpr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
303 ; CHECK: t2CMPrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, implicit-def $cpsr
304 ; CHECK: [[t2MOVCCi:%[0-9]+]]:rgpr = t2MOVCCi [[t2MOVi]], 1, 13 /* CC::le */, $cpsr
305 ; CHECK: [[t2ANDri:%[0-9]+]]:rgpr = t2ANDri [[t2MOVCCi]], 1, 14 /* CC::al */, $noreg, $noreg
306 ; CHECK: $r0 = COPY [[t2ANDri]]
307 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
310 %2(s1) = G_ICMP intpred(sle), %0(s32), %1
311 %3(s32) = G_ZEXT %2(s1)
313 BX_RET 14, $noreg, implicit $r0