1 ; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s
4 ; When realign-stack is set to false, make sure we are not creating stack
5 ; objects that are assumed to be 64-byte aligned.
7 define void @test1(ptr noalias sret(<16 x float>) %agg.result) nounwind ssp "no-realign-stack" {
9 ; CHECK: mov r[[PTR:[0-9]+]], r{{[0-9]+}}
10 ; CHECK: mov r[[NOTALIGNED:[0-9]+]], sp
11 ; CHECK: add r[[NOTALIGNED]], r[[NOTALIGNED]], #32
12 ; CHECK: add r[[PTR]], r[[PTR]], #32
13 ; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[NOTALIGNED]]:128]
14 ; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[PTR]]:128]
15 ; CHECK: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[PTR]]:128]
16 ; CHECK: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[NOTALIGNED]]:128]
18 %retval = alloca <16 x float>, align 64
19 %a2 = getelementptr inbounds float, ptr %retval, i64 8
21 %b2 = getelementptr inbounds float, ptr %agg.result, i64 8
23 %0 = load <4 x float>, ptr %a2, align 16
24 %1 = load <4 x float>, ptr %b2, align 16
25 store <4 x float> %0, ptr %b2, align 16
26 store <4 x float> %1, ptr %a2, align 16
30 define void @test2(ptr noalias sret(<16 x float>) %agg.result) nounwind ssp {
32 ; CHECK: mov r[[PTR:[0-9]+]], r{{[0-9]+}}
33 ; CHECK: mov r[[ALIGNED:[0-9]+]], sp
34 ; CHECK: orr r[[ALIGNED]], r[[ALIGNED]], #32
35 ; CHECK: add r[[PTR]], r[[PTR]], #32
36 ; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[ALIGNED]]:128]
37 ; CHECK: vld1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[PTR]]:128]
38 ; CHECK: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[PTR]]:128]
39 ; CHECK: vst1.64 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[ALIGNED]]:128]
41 %retval = alloca <16 x float>, align 64
42 %a2 = getelementptr inbounds float, ptr %retval, i64 8
44 %b2 = getelementptr inbounds float, ptr %agg.result, i64 8
46 %0 = load <4 x float>, ptr %a2, align 16
47 %1 = load <4 x float>, ptr %b2, align 16
48 store <4 x float> %0, ptr %b2, align 16
49 store <4 x float> %1, ptr %a2, align 16