1 ; RUN: llc -march=hexagon -hexagon-expand-condsets=0 < %s | FileCheck %s
11 @g0 = common global i16 0, align 2
13 ; Function Attrs: nounwind
14 define void @f0(ptr nocapture %a0, ptr nocapture %a1, ptr nocapture %a2) #0 {
16 %v0 = load i16, ptr @g0, align 2, !tbaa !0
17 %v1 = icmp eq i16 %v0, 3
18 %v2 = select i1 %v1, i32 -1, i32 34
19 %v4 = load i32, ptr %a0, align 4
20 %v5 = zext i32 %v4 to i64
21 %v6 = getelementptr inbounds %s.0, ptr %a0, i32 1, i32 0
22 %v7 = load i32, ptr %v6, align 4
23 %v8 = zext i32 %v7 to i64
24 %v9 = shl nuw i64 %v8, 32
25 %v10 = or i64 %v9, %v5
26 %v12 = load i64, ptr %a1, align 8, !tbaa !4
27 %v13 = tail call i64 @llvm.hexagon.M2.vrcmpyr.s0(i64 %v10, i64 %v12)
28 %v14 = tail call i64 @llvm.hexagon.S2.asr.i.p(i64 %v13, i32 14)
29 %v15 = lshr i64 %v14, 32
30 %v16 = trunc i64 %v15 to i32
31 %v17 = tail call i32 @llvm.hexagon.C2.cmpgti(i32 %v16, i32 0)
32 %v18 = trunc i64 %v14 to i32
33 %v19 = tail call i32 @llvm.hexagon.C2.mux(i32 %v17, i32 %v2, i32 %v18)
34 %v20 = zext i32 %v19 to i64
35 %v21 = getelementptr inbounds %s.1, ptr %a2, i32 2, i32 0
36 store i64 %v20, ptr %v21, align 8
40 ; Function Attrs: nounwind readnone
41 declare i64 @llvm.hexagon.M2.vrcmpyr.s0(i64, i64) #1
43 ; Function Attrs: nounwind readnone
44 declare i64 @llvm.hexagon.S2.asr.i.p(i64, i32) #1
46 ; Function Attrs: nounwind readnone
47 declare i32 @llvm.hexagon.C2.cmpgti(i32, i32) #1
49 ; Function Attrs: nounwind readnone
50 declare i32 @llvm.hexagon.C2.mux(i32, i32, i32) #1
52 attributes #0 = { nounwind }
53 attributes #1 = { nounwind readnone }
57 !2 = !{!"omnipotent char", !3}
58 !3 = !{!"Simple C/C++ TBAA"}
60 !5 = !{!"long long", !2}