| blob | 649aaf404b8c3651067f5ed88d008693b63572ff |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; Make sure that a negative value for the compare-and-swap is zero extended
3 ; from i8/i16 to i32 since it will be compared for equality.
4 ; RUN: llc -mtriple=powerpc64le-linux-gnu -verify-machineinstrs < %s | FileCheck %s
5 ; RUN: llc -mtriple=powerpc64le-linux-gnu -mcpu=pwr7 -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-P7
7 @str = private unnamed_addr constant [46 x i8] c"FAILED: __atomic_compare_exchange_n() failed.\00"
8 @str.1 = private unnamed_addr constant [59 x i8] c"FAILED: __atomic_compare_exchange_n() set the wrong value.\00"
9 @str.2 = private unnamed_addr constant [7 x i8] c"PASSED\00"
11 define signext i32 @main() nounwind {
12 ; CHECK-LABEL: main:
13 ; CHECK: # %bb.0: # %L.entry
14 ; CHECK-NEXT: mflr 0
15 ; CHECK-NEXT: stdu 1, -48(1)
16 ; CHECK-NEXT: li 3, -32477
17 ; CHECK-NEXT: std 0, 64(1)
18 ; CHECK-NEXT: li 4, 234
19 ; CHECK-NEXT: addi 6, 1, 46
20 ; CHECK-NEXT: sth 3, 46(1)
21 ; CHECK-NEXT: lis 3, 0
22 ; CHECK-NEXT: ori 3, 3, 33059
23 ; CHECK-NEXT: sync
24 ; CHECK-NEXT: .LBB0_1: # %L.entry
25 ; CHECK-NEXT: #
26 ; CHECK-NEXT: lharx 5, 0, 6
27 ; CHECK-NEXT: cmpw 5, 3
28 ; CHECK-NEXT: bne 0, .LBB0_3
29 ; CHECK-NEXT: # %bb.2: # %L.entry
30 ; CHECK-NEXT: #
31 ; CHECK-NEXT: sthcx. 4, 0, 6
32 ; CHECK-NEXT: bne 0, .LBB0_1
33 ; CHECK-NEXT: .LBB0_3: # %L.entry
34 ; CHECK-NEXT: cmplwi 5, 33059
35 ; CHECK-NEXT: lwsync
36 ; CHECK-NEXT: bne 0, .LBB0_6
37 ; CHECK-NEXT: # %bb.4: # %L.B0000
38 ; CHECK-NEXT: lhz 3, 46(1)
39 ; CHECK-NEXT: cmplwi 3, 234
40 ; CHECK-NEXT: bne 0, .LBB0_7
41 ; CHECK-NEXT: # %bb.5: # %L.B0001
42 ; CHECK-NEXT: addis 3, 2, .Lstr.2@toc@ha
43 ; CHECK-NEXT: addi 3, 3, .Lstr.2@toc@l
44 ; CHECK-NEXT: bl puts
45 ; CHECK-NEXT: nop
46 ; CHECK-NEXT: li 3, 0
47 ; CHECK-NEXT: b .LBB0_9
48 ; CHECK-NEXT: .LBB0_6: # %L.B0003
49 ; CHECK-NEXT: addis 3, 2, .Lstr@toc@ha
50 ; CHECK-NEXT: addi 3, 3, .Lstr@toc@l
51 ; CHECK-NEXT: b .LBB0_8
52 ; CHECK-NEXT: .LBB0_7: # %L.B0005
53 ; CHECK-NEXT: addis 3, 2, .Lstr.1@toc@ha
54 ; CHECK-NEXT: addi 3, 3, .Lstr.1@toc@l
55 ; CHECK-NEXT: .LBB0_8: # %L.B0003
56 ; CHECK-NEXT: bl puts
57 ; CHECK-NEXT: nop
58 ; CHECK-NEXT: li 3, 1
59 ; CHECK-NEXT: .LBB0_9: # %L.B0003
60 ; CHECK-NEXT: addi 1, 1, 48
61 ; CHECK-NEXT: ld 0, 16(1)
62 ; CHECK-NEXT: mtlr 0
63 ; CHECK-NEXT: blr
64 ;
65 ; CHECK-P7-LABEL: main:
66 ; CHECK-P7: # %bb.0: # %L.entry
67 ; CHECK-P7-NEXT: mflr 0
68 ; CHECK-P7-NEXT: stdu 1, -48(1)
69 ; CHECK-P7-NEXT: li 3, -32477
70 ; CHECK-P7-NEXT: lis 5, 0
71 ; CHECK-P7-NEXT: addi 4, 1, 46
72 ; CHECK-P7-NEXT: li 7, 0
73 ; CHECK-P7-NEXT: std 0, 64(1)
74 ; CHECK-P7-NEXT: sth 3, 46(1)
75 ; CHECK-P7-NEXT: li 6, 234
76 ; CHECK-P7-NEXT: rlwinm 3, 4, 3, 27, 27
77 ; CHECK-P7-NEXT: ori 5, 5, 33059
78 ; CHECK-P7-NEXT: ori 7, 7, 65535
79 ; CHECK-P7-NEXT: sync
80 ; CHECK-P7-NEXT: slw 6, 6, 3
81 ; CHECK-P7-NEXT: slw 8, 5, 3
82 ; CHECK-P7-NEXT: slw 5, 7, 3
83 ; CHECK-P7-NEXT: rldicr 4, 4, 0, 61
84 ; CHECK-P7-NEXT: and 6, 6, 5
85 ; CHECK-P7-NEXT: and 7, 8, 5
86 ; CHECK-P7-NEXT: .LBB0_1: # %L.entry
87 ; CHECK-P7-NEXT: #
88 ; CHECK-P7-NEXT: lwarx 9, 0, 4
89 ; CHECK-P7-NEXT: and 8, 9, 5
90 ; CHECK-P7-NEXT: cmpw 8, 7
91 ; CHECK-P7-NEXT: bne 0, .LBB0_3
92 ; CHECK-P7-NEXT: # %bb.2: # %L.entry
93 ; CHECK-P7-NEXT: #
94 ; CHECK-P7-NEXT: andc 9, 9, 5
95 ; CHECK-P7-NEXT: or 9, 9, 6
96 ; CHECK-P7-NEXT: stwcx. 9, 0, 4
97 ; CHECK-P7-NEXT: bne 0, .LBB0_1
98 ; CHECK-P7-NEXT: .LBB0_3: # %L.entry
99 ; CHECK-P7-NEXT: srw 3, 8, 3
100 ; CHECK-P7-NEXT: lwsync
101 ; CHECK-P7-NEXT: cmplwi 3, 33059
102 ; CHECK-P7-NEXT: bne 0, .LBB0_6
103 ; CHECK-P7-NEXT: # %bb.4: # %L.B0000
104 ; CHECK-P7-NEXT: lhz 3, 46(1)
105 ; CHECK-P7-NEXT: cmplwi 3, 234
106 ; CHECK-P7-NEXT: bne 0, .LBB0_7
107 ; CHECK-P7-NEXT: # %bb.5: # %L.B0001
108 ; CHECK-P7-NEXT: addis 3, 2, .Lstr.2@toc@ha
109 ; CHECK-P7-NEXT: addi 3, 3, .Lstr.2@toc@l
110 ; CHECK-P7-NEXT: bl puts
111 ; CHECK-P7-NEXT: nop
112 ; CHECK-P7-NEXT: li 3, 0
113 ; CHECK-P7-NEXT: b .LBB0_9
114 ; CHECK-P7-NEXT: .LBB0_6: # %L.B0003
115 ; CHECK-P7-NEXT: addis 3, 2, .Lstr@toc@ha
116 ; CHECK-P7-NEXT: addi 3, 3, .Lstr@toc@l
117 ; CHECK-P7-NEXT: b .LBB0_8
118 ; CHECK-P7-NEXT: .LBB0_7: # %L.B0005
119 ; CHECK-P7-NEXT: addis 3, 2, .Lstr.1@toc@ha
120 ; CHECK-P7-NEXT: addi 3, 3, .Lstr.1@toc@l
121 ; CHECK-P7-NEXT: .LBB0_8: # %L.B0003
122 ; CHECK-P7-NEXT: bl puts
123 ; CHECK-P7-NEXT: nop
124 ; CHECK-P7-NEXT: li 3, 1
125 ; CHECK-P7-NEXT: .LBB0_9: # %L.B0003
126 ; CHECK-P7-NEXT: addi 1, 1, 48
127 ; CHECK-P7-NEXT: ld 0, 16(1)
128 ; CHECK-P7-NEXT: mtlr 0
129 ; CHECK-P7-NEXT: blr
130 L.entry:
131 %value.addr = alloca i16, align 2
132 store i16 -32477, ptr %value.addr, align 2
133 %0 = cmpxchg ptr %value.addr, i16 -32477, i16 234 seq_cst seq_cst
134 %1 = extractvalue { i16, i1 } %0, 1
135 br i1 %1, label %L.B0000, label %L.B0003
137 L.B0003: ; preds = %L.entry
138 %puts = call i32 @puts(ptr @str)
139 ret i32 1
141 L.B0000: ; preds = %L.entry
142 %2 = load i16, ptr %value.addr, align 2
143 %3 = icmp eq i16 %2, 234
144 br i1 %3, label %L.B0001, label %L.B0005
146 L.B0005: ; preds = %L.B0000
147 %puts1 = call i32 @puts(ptr @str.1)
148 ret i32 1
150 L.B0001: ; preds = %L.B0000
151 %puts2 = call i32 @puts(ptr @str.2)
152 ret i32 0
153 }
155 ; Function Attrs: nounwind
156 declare i32 @puts(ptr nocapture readonly) #0