| blob | eadb1c4371c5bf52d4cb183c29a59d520d25eb06 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3 ; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4 ; RUN: FileCheck %s --check-prefix=CHECK-P8
5 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
6 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7 ; RUN: FileCheck %s --check-prefix=CHECK-P9
8 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
9 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
10 ; RUN: FileCheck %s --check-prefix=CHECK-BE
12 define i32 @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
13 ; CHECK-P8-LABEL: test2elt:
14 ; CHECK-P8: # %bb.0: # %entry
15 ; CHECK-P8-NEXT: mtfprd f0, r3
16 ; CHECK-P8-NEXT: xxswapd v2, vs0
17 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
18 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3
19 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
20 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
21 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
22 ; CHECK-P8-NEXT: mffprwz r4, f0
23 ; CHECK-P8-NEXT: mtvsrd v3, r4
24 ; CHECK-P8-NEXT: mffprwz r3, f1
25 ; CHECK-P8-NEXT: mtvsrd v2, r3
26 ; CHECK-P8-NEXT: vmrghh v2, v3, v2
27 ; CHECK-P8-NEXT: xxswapd vs0, v2
28 ; CHECK-P8-NEXT: mffprwz r3, f0
29 ; CHECK-P8-NEXT: blr
30 ;
31 ; CHECK-P9-LABEL: test2elt:
32 ; CHECK-P9: # %bb.0: # %entry
33 ; CHECK-P9-NEXT: mtfprd f0, r3
34 ; CHECK-P9-NEXT: xxswapd v2, vs0
35 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
36 ; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
37 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
38 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
39 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
40 ; CHECK-P9-NEXT: mffprwz r3, f1
41 ; CHECK-P9-NEXT: mtvsrd v2, r3
42 ; CHECK-P9-NEXT: mffprwz r3, f0
43 ; CHECK-P9-NEXT: mtvsrd v3, r3
44 ; CHECK-P9-NEXT: li r3, 0
45 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
46 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
47 ; CHECK-P9-NEXT: blr
48 ;
49 ; CHECK-BE-LABEL: test2elt:
50 ; CHECK-BE: # %bb.0: # %entry
51 ; CHECK-BE-NEXT: mtfprd f0, r3
52 ; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
53 ; CHECK-BE-NEXT: xscvspdpn f2, vs0
54 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
55 ; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
56 ; CHECK-BE-NEXT: lxv vs1, 0(r3)
57 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
58 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
59 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
60 ; CHECK-BE-NEXT: mffprwz r3, f2
61 ; CHECK-BE-NEXT: mtfprwz f2, r3
62 ; CHECK-BE-NEXT: mffprwz r3, f0
63 ; CHECK-BE-NEXT: mtvsrwz v2, r3
64 ; CHECK-BE-NEXT: li r3, 0
65 ; CHECK-BE-NEXT: xxperm v2, vs2, vs1
66 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
67 ; CHECK-BE-NEXT: blr
68 entry:
69 %0 = bitcast i64 %a.coerce to <2 x float>
70 %1 = fptoui <2 x float> %0 to <2 x i16>
71 %2 = bitcast <2 x i16> %1 to i32
72 ret i32 %2
73 }
75 define i64 @test4elt(<4 x float> %a) local_unnamed_addr #1 {
76 ; CHECK-P8-LABEL: test4elt:
77 ; CHECK-P8: # %bb.0: # %entry
78 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
79 ; CHECK-P8-NEXT: xscvspdpn f1, v2
80 ; CHECK-P8-NEXT: xxswapd vs2, v2
81 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
82 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
83 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
84 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
85 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
86 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
87 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
88 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
89 ; CHECK-P8-NEXT: mffprwz r3, f1
90 ; CHECK-P8-NEXT: mtvsrd v2, r3
91 ; CHECK-P8-NEXT: mffprwz r3, f0
92 ; CHECK-P8-NEXT: mffprwz r4, f2
93 ; CHECK-P8-NEXT: mtvsrd v3, r3
94 ; CHECK-P8-NEXT: mffprwz r3, f3
95 ; CHECK-P8-NEXT: mtvsrd v4, r4
96 ; CHECK-P8-NEXT: mtvsrd v5, r3
97 ; CHECK-P8-NEXT: vmrghh v3, v4, v3
98 ; CHECK-P8-NEXT: vmrghh v2, v2, v5
99 ; CHECK-P8-NEXT: xxmrglw vs0, v2, v3
100 ; CHECK-P8-NEXT: xxswapd vs0, vs0
101 ; CHECK-P8-NEXT: mffprd r3, f0
102 ; CHECK-P8-NEXT: blr
103 ;
104 ; CHECK-P9-LABEL: test4elt:
105 ; CHECK-P9: # %bb.0: # %entry
106 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
107 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
108 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
109 ; CHECK-P9-NEXT: mffprwz r3, f0
110 ; CHECK-P9-NEXT: xxswapd vs0, v2
111 ; CHECK-P9-NEXT: mtvsrd v3, r3
112 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
113 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
114 ; CHECK-P9-NEXT: mffprwz r3, f0
115 ; CHECK-P9-NEXT: xscvspdpn f0, v2
116 ; CHECK-P9-NEXT: mtvsrd v4, r3
117 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
118 ; CHECK-P9-NEXT: vmrghh v3, v4, v3
119 ; CHECK-P9-NEXT: mffprwz r3, f0
120 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1
121 ; CHECK-P9-NEXT: mtvsrd v4, r3
122 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
123 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
124 ; CHECK-P9-NEXT: mffprwz r3, f0
125 ; CHECK-P9-NEXT: mtvsrd v2, r3
126 ; CHECK-P9-NEXT: vmrghh v2, v4, v2
127 ; CHECK-P9-NEXT: xxmrglw vs0, v2, v3
128 ; CHECK-P9-NEXT: mfvsrld r3, vs0
129 ; CHECK-P9-NEXT: blr
130 ;
131 ; CHECK-BE-LABEL: test4elt:
132 ; CHECK-BE: # %bb.0: # %entry
133 ; CHECK-BE-NEXT: xxsldwi vs1, v2, v2, 3
134 ; CHECK-BE-NEXT: xxswapd vs2, v2
135 ; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
136 ; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
137 ; CHECK-BE-NEXT: xxsldwi vs3, v2, v2, 1
138 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
139 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
140 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
141 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
142 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
143 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
144 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
145 ; CHECK-BE-NEXT: mffprwz r3, f1
146 ; CHECK-BE-NEXT: mtfprwz f1, r3
147 ; CHECK-BE-NEXT: mffprwz r3, f2
148 ; CHECK-BE-NEXT: mtfprwz f2, r3
149 ; CHECK-BE-NEXT: xxperm vs1, vs2, vs0
150 ; CHECK-BE-NEXT: xscvspdpn f2, v2
151 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
152 ; CHECK-BE-NEXT: mffprwz r3, f2
153 ; CHECK-BE-NEXT: mtfprwz f2, r3
154 ; CHECK-BE-NEXT: mffprwz r3, f3
155 ; CHECK-BE-NEXT: mtfprwz f3, r3
156 ; CHECK-BE-NEXT: xxperm vs3, vs2, vs0
157 ; CHECK-BE-NEXT: xxmrghw vs0, vs3, vs1
158 ; CHECK-BE-NEXT: mffprd r3, f0
159 ; CHECK-BE-NEXT: blr
160 entry:
161 %0 = fptoui <4 x float> %a to <4 x i16>
162 %1 = bitcast <4 x i16> %0 to i64
163 ret i64 %1
164 }
166 define <8 x i16> @test8elt(ptr nocapture readonly) local_unnamed_addr #2 {
167 ; CHECK-P8-LABEL: test8elt:
168 ; CHECK-P8: # %bb.0: # %entry
169 ; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
170 ; CHECK-P8-NEXT: li r4, 16
171 ; CHECK-P8-NEXT: lxvd2x vs1, r3, r4
172 ; CHECK-P8-NEXT: xxswapd v2, vs0
173 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
174 ; CHECK-P8-NEXT: xxswapd v3, vs1
175 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
176 ; CHECK-P8-NEXT: xxsldwi vs2, v2, v2, 3
177 ; CHECK-P8-NEXT: xxsldwi vs4, v2, v2, 1
178 ; CHECK-P8-NEXT: xscvspdpn f3, v2
179 ; CHECK-P8-NEXT: xxsldwi vs6, v3, v3, 3
180 ; CHECK-P8-NEXT: xxsldwi vs7, v3, v3, 1
181 ; CHECK-P8-NEXT: xscvspdpn f5, v3
182 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
183 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
184 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
185 ; CHECK-P8-NEXT: xscvspdpn f6, vs6
186 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
187 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
188 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
189 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
190 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
191 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
192 ; CHECK-P8-NEXT: mffprwz r3, f0
193 ; CHECK-P8-NEXT: mffprwz r4, f3
194 ; CHECK-P8-NEXT: mtvsrd v2, r3
195 ; CHECK-P8-NEXT: mffprwz r3, f2
196 ; CHECK-P8-NEXT: xscvdpsxws f0, f6
197 ; CHECK-P8-NEXT: xscvdpsxws f2, f7
198 ; CHECK-P8-NEXT: mtvsrd v3, r4
199 ; CHECK-P8-NEXT: mffprwz r4, f4
200 ; CHECK-P8-NEXT: mtvsrd v4, r3
201 ; CHECK-P8-NEXT: mtvsrd v5, r4
202 ; CHECK-P8-NEXT: mffprwz r3, f1
203 ; CHECK-P8-NEXT: mffprwz r4, f5
204 ; CHECK-P8-NEXT: vmrghh v2, v2, v4
205 ; CHECK-P8-NEXT: vmrghh v3, v3, v5
206 ; CHECK-P8-NEXT: mtvsrd v4, r3
207 ; CHECK-P8-NEXT: mtvsrd v5, r4
208 ; CHECK-P8-NEXT: mffprwz r3, f0
209 ; CHECK-P8-NEXT: mffprwz r4, f2
210 ; CHECK-P8-NEXT: mtvsrd v0, r3
211 ; CHECK-P8-NEXT: mtvsrd v1, r4
212 ; CHECK-P8-NEXT: xxmrglw vs0, v3, v2
213 ; CHECK-P8-NEXT: vmrghh v4, v4, v0
214 ; CHECK-P8-NEXT: vmrghh v5, v5, v1
215 ; CHECK-P8-NEXT: xxmrglw vs1, v5, v4
216 ; CHECK-P8-NEXT: xxmrgld v2, vs1, vs0
217 ; CHECK-P8-NEXT: blr
218 ;
219 ; CHECK-P9-LABEL: test8elt:
220 ; CHECK-P9: # %bb.0: # %entry
221 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
222 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
223 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
224 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
225 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
226 ; CHECK-P9-NEXT: mffprwz r3, f2
227 ; CHECK-P9-NEXT: xxswapd vs2, vs1
228 ; CHECK-P9-NEXT: mtvsrd v2, r3
229 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
230 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
231 ; CHECK-P9-NEXT: mffprwz r3, f2
232 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
233 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
234 ; CHECK-P9-NEXT: mtvsrd v3, r3
235 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
236 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
237 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
238 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
239 ; CHECK-P9-NEXT: mffprwz r3, f2
240 ; CHECK-P9-NEXT: xxsldwi vs2, vs0, vs0, 3
241 ; CHECK-P9-NEXT: mtvsrd v3, r3
242 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
243 ; CHECK-P9-NEXT: mffprwz r3, f1
244 ; CHECK-P9-NEXT: mtvsrd v4, r3
245 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
246 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
247 ; CHECK-P9-NEXT: xxmrglw vs1, v3, v2
248 ; CHECK-P9-NEXT: mffprwz r3, f2
249 ; CHECK-P9-NEXT: xxswapd vs2, vs0
250 ; CHECK-P9-NEXT: mtvsrd v2, r3
251 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
252 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
253 ; CHECK-P9-NEXT: mffprwz r3, f2
254 ; CHECK-P9-NEXT: xscvspdpn f2, vs0
255 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
256 ; CHECK-P9-NEXT: mtvsrd v3, r3
257 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
258 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
259 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
260 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
261 ; CHECK-P9-NEXT: mffprwz r3, f2
262 ; CHECK-P9-NEXT: mtvsrd v3, r3
263 ; CHECK-P9-NEXT: mffprwz r3, f0
264 ; CHECK-P9-NEXT: mtvsrd v4, r3
265 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
266 ; CHECK-P9-NEXT: xxmrglw vs0, v3, v2
267 ; CHECK-P9-NEXT: xxmrgld v2, vs0, vs1
268 ; CHECK-P9-NEXT: blr
269 ;
270 ; CHECK-BE-LABEL: test8elt:
271 ; CHECK-BE: # %bb.0: # %entry
272 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
273 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
274 ; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
275 ; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
276 ; CHECK-BE-NEXT: lxv vs2, 0(r3)
277 ; CHECK-BE-NEXT: xxsldwi vs3, vs1, vs1, 3
278 ; CHECK-BE-NEXT: xxswapd vs4, vs1
279 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
280 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
281 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
282 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
283 ; CHECK-BE-NEXT: mffprwz r3, f3
284 ; CHECK-BE-NEXT: mtfprwz f3, r3
285 ; CHECK-BE-NEXT: mffprwz r3, f4
286 ; CHECK-BE-NEXT: mtfprwz f4, r3
287 ; CHECK-BE-NEXT: xxperm vs3, vs4, vs2
288 ; CHECK-BE-NEXT: xscvspdpn f4, vs1
289 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
290 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
291 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
292 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
293 ; CHECK-BE-NEXT: mffprwz r3, f4
294 ; CHECK-BE-NEXT: mtfprwz f4, r3
295 ; CHECK-BE-NEXT: mffprwz r3, f1
296 ; CHECK-BE-NEXT: mtfprwz f1, r3
297 ; CHECK-BE-NEXT: xxperm vs1, vs4, vs2
298 ; CHECK-BE-NEXT: xxswapd vs4, vs0
299 ; CHECK-BE-NEXT: xxmrghw vs1, vs1, vs3
300 ; CHECK-BE-NEXT: xxsldwi vs3, vs0, vs0, 3
301 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
302 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
303 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
304 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
305 ; CHECK-BE-NEXT: mffprwz r3, f3
306 ; CHECK-BE-NEXT: mtfprwz f3, r3
307 ; CHECK-BE-NEXT: mffprwz r3, f4
308 ; CHECK-BE-NEXT: mtfprwz f4, r3
309 ; CHECK-BE-NEXT: xxperm vs3, vs4, vs2
310 ; CHECK-BE-NEXT: xscvspdpn f4, vs0
311 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
312 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
313 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
314 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
315 ; CHECK-BE-NEXT: mffprwz r3, f4
316 ; CHECK-BE-NEXT: mtfprwz f4, r3
317 ; CHECK-BE-NEXT: mffprwz r3, f0
318 ; CHECK-BE-NEXT: mtfprwz f0, r3
319 ; CHECK-BE-NEXT: xxperm vs0, vs4, vs2
320 ; CHECK-BE-NEXT: xxmrghw vs0, vs0, vs3
321 ; CHECK-BE-NEXT: xxmrghd v2, vs0, vs1
322 ; CHECK-BE-NEXT: blr
323 entry:
324 %a = load <8 x float>, ptr %0, align 32
325 %1 = fptoui <8 x float> %a to <8 x i16>
326 ret <8 x i16> %1
327 }
329 define void @test16elt(ptr noalias nocapture sret(<16 x i16>) %agg.result, ptr nocapture readonly) local_unnamed_addr #3 {
330 ; CHECK-P8-LABEL: test16elt:
331 ; CHECK-P8: # %bb.0: # %entry
332 ; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
333 ; CHECK-P8-NEXT: li r5, 16
334 ; CHECK-P8-NEXT: li r6, 32
335 ; CHECK-P8-NEXT: lxvd2x vs1, r4, r5
336 ; CHECK-P8-NEXT: lxvd2x vs2, r4, r6
337 ; CHECK-P8-NEXT: li r6, 48
338 ; CHECK-P8-NEXT: lxvd2x vs3, r4, r6
339 ; CHECK-P8-NEXT: xxswapd v2, vs0
340 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
341 ; CHECK-P8-NEXT: xscvspdpn f4, vs1
342 ; CHECK-P8-NEXT: xxswapd v3, vs1
343 ; CHECK-P8-NEXT: xscvspdpn f1, vs2
344 ; CHECK-P8-NEXT: xxswapd v4, vs2
345 ; CHECK-P8-NEXT: xxsldwi vs6, v2, v2, 3
346 ; CHECK-P8-NEXT: xxsldwi vs8, v2, v2, 1
347 ; CHECK-P8-NEXT: xscvspdpn f7, v2
348 ; CHECK-P8-NEXT: xxsldwi vs9, v3, v3, 3
349 ; CHECK-P8-NEXT: xscvspdpn f5, vs3
350 ; CHECK-P8-NEXT: xxswapd v0, vs3
351 ; CHECK-P8-NEXT: xscvspdpn f6, vs6
352 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
353 ; CHECK-P8-NEXT: xscvspdpn f8, vs8
354 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
355 ; CHECK-P8-NEXT: xscvspdpn f9, vs9
356 ; CHECK-P8-NEXT: xscvspdpn f2, v3
357 ; CHECK-P8-NEXT: xscvdpsxws f6, f6
358 ; CHECK-P8-NEXT: mffprwz r4, f0
359 ; CHECK-P8-NEXT: xscvdpsxws f0, f7
360 ; CHECK-P8-NEXT: xxsldwi vs7, v0, v0, 3
361 ; CHECK-P8-NEXT: mtvsrd v2, r4
362 ; CHECK-P8-NEXT: mffprwz r4, f4
363 ; CHECK-P8-NEXT: xscvdpsxws f4, f8
364 ; CHECK-P8-NEXT: mtvsrd v5, r4
365 ; CHECK-P8-NEXT: mffprwz r4, f6
366 ; CHECK-P8-NEXT: xscvdpsxws f6, f9
367 ; CHECK-P8-NEXT: xscvspdpn f10, v4
368 ; CHECK-P8-NEXT: mtvsrd v1, r4
369 ; CHECK-P8-NEXT: mffprwz r4, f0
370 ; CHECK-P8-NEXT: xxsldwi vs0, v3, v3, 1
371 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
372 ; CHECK-P8-NEXT: xscvspdpn f3, v0
373 ; CHECK-P8-NEXT: mtvsrd v3, r4
374 ; CHECK-P8-NEXT: mffprwz r4, f4
375 ; CHECK-P8-NEXT: xxsldwi vs4, v4, v4, 3
376 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
377 ; CHECK-P8-NEXT: vmrghh v2, v2, v1
378 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
379 ; CHECK-P8-NEXT: mtvsrd v1, r4
380 ; CHECK-P8-NEXT: mffprwz r4, f6
381 ; CHECK-P8-NEXT: xxsldwi vs6, v4, v4, 1
382 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
383 ; CHECK-P8-NEXT: vmrghh v3, v3, v1
384 ; CHECK-P8-NEXT: mtvsrd v1, r4
385 ; CHECK-P8-NEXT: mffprwz r4, f1
386 ; CHECK-P8-NEXT: xscvdpsxws f1, f10
387 ; CHECK-P8-NEXT: vmrghh v4, v5, v1
388 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
389 ; CHECK-P8-NEXT: mtvsrd v5, r4
390 ; CHECK-P8-NEXT: mffprwz r4, f5
391 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
392 ; CHECK-P8-NEXT: mtvsrd v1, r4
393 ; CHECK-P8-NEXT: mffprwz r4, f2
394 ; CHECK-P8-NEXT: xxsldwi vs2, v0, v0, 1
395 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
396 ; CHECK-P8-NEXT: xscvspdpn f6, vs6
397 ; CHECK-P8-NEXT: mtvsrd v6, r4
398 ; CHECK-P8-NEXT: mffprwz r4, f1
399 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
400 ; CHECK-P8-NEXT: xscvdpsxws f1, f4
401 ; CHECK-P8-NEXT: mtvsrd v7, r4
402 ; CHECK-P8-NEXT: mffprwz r4, f3
403 ; CHECK-P8-NEXT: xscvdpsxws f3, f6
404 ; CHECK-P8-NEXT: mtvsrd v0, r4
405 ; CHECK-P8-NEXT: mffprwz r4, f0
406 ; CHECK-P8-NEXT: xscvspdpn f0, vs2
407 ; CHECK-P8-NEXT: mtvsrd v8, r4
408 ; CHECK-P8-NEXT: mffprwz r4, f1
409 ; CHECK-P8-NEXT: xscvdpsxws f1, f7
410 ; CHECK-P8-NEXT: mtvsrd v9, r4
411 ; CHECK-P8-NEXT: mffprwz r4, f3
412 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
413 ; CHECK-P8-NEXT: vmrghh v6, v6, v8
414 ; CHECK-P8-NEXT: mtvsrd v8, r4
415 ; CHECK-P8-NEXT: mffprwz r4, f1
416 ; CHECK-P8-NEXT: vmrghh v5, v5, v9
417 ; CHECK-P8-NEXT: mtvsrd v9, r4
418 ; CHECK-P8-NEXT: mffprwz r4, f0
419 ; CHECK-P8-NEXT: xxmrglw vs0, v3, v2
420 ; CHECK-P8-NEXT: vmrghh v7, v7, v8
421 ; CHECK-P8-NEXT: xxmrglw vs1, v6, v4
422 ; CHECK-P8-NEXT: mtvsrd v8, r4
423 ; CHECK-P8-NEXT: vmrghh v1, v1, v9
424 ; CHECK-P8-NEXT: vmrghh v0, v0, v8
425 ; CHECK-P8-NEXT: xxmrgld v2, vs1, vs0
426 ; CHECK-P8-NEXT: xxmrglw vs2, v7, v5
427 ; CHECK-P8-NEXT: xxswapd vs1, v2
428 ; CHECK-P8-NEXT: xxmrglw vs3, v0, v1
429 ; CHECK-P8-NEXT: xxmrgld v3, vs3, vs2
430 ; CHECK-P8-NEXT: xxswapd vs0, v3
431 ; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
432 ; CHECK-P8-NEXT: stxvd2x vs1, 0, r3
433 ; CHECK-P8-NEXT: blr
434 ;
435 ; CHECK-P9-LABEL: test16elt:
436 ; CHECK-P9: # %bb.0: # %entry
437 ; CHECK-P9-NEXT: lxv vs1, 0(r4)
438 ; CHECK-P9-NEXT: lxv vs0, 16(r4)
439 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
440 ; CHECK-P9-NEXT: xxswapd vs3, vs1
441 ; CHECK-P9-NEXT: xscvspdpn f4, vs1
442 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
443 ; CHECK-P9-NEXT: xxsldwi vs5, vs0, vs0, 3
444 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
445 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
446 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
447 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
448 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
449 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
450 ; CHECK-P9-NEXT: mffprwz r5, f2
451 ; CHECK-P9-NEXT: xxswapd vs2, vs0
452 ; CHECK-P9-NEXT: mtvsrd v2, r5
453 ; CHECK-P9-NEXT: mffprwz r5, f3
454 ; CHECK-P9-NEXT: xscvdpsxws f3, f4
455 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
456 ; CHECK-P9-NEXT: mtvsrd v3, r5
457 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
458 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
459 ; CHECK-P9-NEXT: mffprwz r5, f3
460 ; CHECK-P9-NEXT: xscvspdpn f3, vs5
461 ; CHECK-P9-NEXT: mtvsrd v3, r5
462 ; CHECK-P9-NEXT: mffprwz r5, f1
463 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
464 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
465 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
466 ; CHECK-P9-NEXT: mtvsrd v4, r5
467 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
468 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
469 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
470 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
471 ; CHECK-P9-NEXT: mffprwz r5, f1
472 ; CHECK-P9-NEXT: mtvsrd v4, r5
473 ; CHECK-P9-NEXT: mffprwz r5, f3
474 ; CHECK-P9-NEXT: mtvsrd v5, r5
475 ; CHECK-P9-NEXT: mffprwz r5, f2
476 ; CHECK-P9-NEXT: xxmrglw vs2, v3, v2
477 ; CHECK-P9-NEXT: mtvsrd v0, r5
478 ; CHECK-P9-NEXT: mffprwz r5, f0
479 ; CHECK-P9-NEXT: lxv vs0, 32(r4)
480 ; CHECK-P9-NEXT: vmrghh v5, v0, v5
481 ; CHECK-P9-NEXT: mtvsrd v0, r5
482 ; CHECK-P9-NEXT: vmrghh v4, v4, v0
483 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
484 ; CHECK-P9-NEXT: xxswapd vs3, vs0
485 ; CHECK-P9-NEXT: xscvspdpn f4, vs0
486 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
487 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
488 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
489 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
490 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
491 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
492 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
493 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
494 ; CHECK-P9-NEXT: mffprwz r5, f1
495 ; CHECK-P9-NEXT: lxv vs1, 48(r4)
496 ; CHECK-P9-NEXT: mffprwz r4, f4
497 ; CHECK-P9-NEXT: mtvsrd v2, r5
498 ; CHECK-P9-NEXT: mffprwz r5, f3
499 ; CHECK-P9-NEXT: xxmrglw vs3, v4, v5
500 ; CHECK-P9-NEXT: mtvsrd v3, r5
501 ; CHECK-P9-NEXT: xxmrgld vs2, vs3, vs2
502 ; CHECK-P9-NEXT: xxsldwi vs3, vs1, vs1, 3
503 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
504 ; CHECK-P9-NEXT: mtvsrd v3, r4
505 ; CHECK-P9-NEXT: mffprwz r4, f0
506 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
507 ; CHECK-P9-NEXT: mtvsrd v4, r4
508 ; CHECK-P9-NEXT: stxv vs2, 0(r3)
509 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
510 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
511 ; CHECK-P9-NEXT: xxmrglw vs0, v3, v2
512 ; CHECK-P9-NEXT: mffprwz r4, f3
513 ; CHECK-P9-NEXT: xxswapd vs3, vs1
514 ; CHECK-P9-NEXT: mtvsrd v2, r4
515 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
516 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
517 ; CHECK-P9-NEXT: mffprwz r4, f3
518 ; CHECK-P9-NEXT: xscvspdpn f3, vs1
519 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
520 ; CHECK-P9-NEXT: mtvsrd v3, r4
521 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
522 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
523 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
524 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
525 ; CHECK-P9-NEXT: mffprwz r4, f3
526 ; CHECK-P9-NEXT: mtvsrd v3, r4
527 ; CHECK-P9-NEXT: mffprwz r4, f1
528 ; CHECK-P9-NEXT: mtvsrd v4, r4
529 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
530 ; CHECK-P9-NEXT: xxmrglw vs1, v3, v2
531 ; CHECK-P9-NEXT: xxmrgld vs0, vs1, vs0
532 ; CHECK-P9-NEXT: stxv vs0, 16(r3)
533 ; CHECK-P9-NEXT: blr
534 ;
535 ; CHECK-BE-LABEL: test16elt:
536 ; CHECK-BE: # %bb.0: # %entry
537 ; CHECK-BE-NEXT: lxv vs2, 16(r4)
538 ; CHECK-BE-NEXT: lxv vs1, 0(r4)
539 ; CHECK-BE-NEXT: addis r5, r2, .LCPI3_0@toc@ha
540 ; CHECK-BE-NEXT: lxv vs0, 48(r4)
541 ; CHECK-BE-NEXT: addi r5, r5, .LCPI3_0@toc@l
542 ; CHECK-BE-NEXT: lxv vs3, 0(r5)
543 ; CHECK-BE-NEXT: xscvspdpn f6, vs2
544 ; CHECK-BE-NEXT: xxsldwi vs4, vs2, vs2, 3
545 ; CHECK-BE-NEXT: xscvspdpn f9, vs1
546 ; CHECK-BE-NEXT: xxswapd vs5, vs2
547 ; CHECK-BE-NEXT: xxsldwi vs2, vs2, vs2, 1
548 ; CHECK-BE-NEXT: xxsldwi vs7, vs1, vs1, 3
549 ; CHECK-BE-NEXT: xxswapd vs8, vs1
550 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
551 ; CHECK-BE-NEXT: xxsldwi vs10, vs0, vs0, 3
552 ; CHECK-BE-NEXT: xxswapd vs11, vs0
553 ; CHECK-BE-NEXT: xscvdpsxws f6, f6
554 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
555 ; CHECK-BE-NEXT: xscvdpsxws f9, f9
556 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
557 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
558 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
559 ; CHECK-BE-NEXT: xscvspdpn f8, vs8
560 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
561 ; CHECK-BE-NEXT: xscvspdpn f10, vs10
562 ; CHECK-BE-NEXT: xscvspdpn f11, vs11
563 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
564 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
565 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
566 ; CHECK-BE-NEXT: xscvdpsxws f7, f7
567 ; CHECK-BE-NEXT: xscvdpsxws f8, f8
568 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
569 ; CHECK-BE-NEXT: xscvdpsxws f10, f10
570 ; CHECK-BE-NEXT: xscvdpsxws f11, f11
571 ; CHECK-BE-NEXT: mffprwz r5, f6
572 ; CHECK-BE-NEXT: mtfprwz f6, r5
573 ; CHECK-BE-NEXT: mffprwz r5, f9
574 ; CHECK-BE-NEXT: mtfprwz f9, r5
575 ; CHECK-BE-NEXT: mffprwz r5, f4
576 ; CHECK-BE-NEXT: mtfprwz f4, r5
577 ; CHECK-BE-NEXT: mffprwz r5, f5
578 ; CHECK-BE-NEXT: mtfprwz f5, r5
579 ; CHECK-BE-NEXT: mffprwz r5, f2
580 ; CHECK-BE-NEXT: xxperm vs4, vs5, vs3
581 ; CHECK-BE-NEXT: xscvspdpn f5, vs0
582 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
583 ; CHECK-BE-NEXT: mtfprwz f2, r5
584 ; CHECK-BE-NEXT: mffprwz r5, f7
585 ; CHECK-BE-NEXT: mtfprwz f7, r5
586 ; CHECK-BE-NEXT: mffprwz r5, f8
587 ; CHECK-BE-NEXT: xxperm vs2, vs6, vs3
588 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
589 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
590 ; CHECK-BE-NEXT: mtfprwz f8, r5
591 ; CHECK-BE-NEXT: mffprwz r5, f1
592 ; CHECK-BE-NEXT: xxmrghw vs2, vs2, vs4
593 ; CHECK-BE-NEXT: lxv vs4, 32(r4)
594 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
595 ; CHECK-BE-NEXT: mtfprwz f1, r5
596 ; CHECK-BE-NEXT: xxperm vs7, vs8, vs3
597 ; CHECK-BE-NEXT: mffprwz r5, f10
598 ; CHECK-BE-NEXT: xxperm vs1, vs9, vs3
599 ; CHECK-BE-NEXT: mtfprwz f10, r5
600 ; CHECK-BE-NEXT: mffprwz r5, f11
601 ; CHECK-BE-NEXT: mffprwz r4, f5
602 ; CHECK-BE-NEXT: mtfprwz f11, r5
603 ; CHECK-BE-NEXT: xxmrghw vs1, vs1, vs7
604 ; CHECK-BE-NEXT: mtfprwz f5, r4
605 ; CHECK-BE-NEXT: xxperm vs10, vs11, vs3
606 ; CHECK-BE-NEXT: mffprwz r4, f0
607 ; CHECK-BE-NEXT: xxmrghd vs1, vs1, vs2
608 ; CHECK-BE-NEXT: xxsldwi vs2, vs4, vs4, 3
609 ; CHECK-BE-NEXT: mtfprwz f0, r4
610 ; CHECK-BE-NEXT: xxperm vs0, vs5, vs3
611 ; CHECK-BE-NEXT: xxswapd vs5, vs4
612 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
613 ; CHECK-BE-NEXT: stxv vs1, 0(r3)
614 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
615 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
616 ; CHECK-BE-NEXT: xxmrghw vs0, vs0, vs10
617 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
618 ; CHECK-BE-NEXT: mffprwz r4, f2
619 ; CHECK-BE-NEXT: mtfprwz f2, r4
620 ; CHECK-BE-NEXT: mffprwz r4, f5
621 ; CHECK-BE-NEXT: mtfprwz f5, r4
622 ; CHECK-BE-NEXT: xxperm vs2, vs5, vs3
623 ; CHECK-BE-NEXT: xscvspdpn f5, vs4
624 ; CHECK-BE-NEXT: xxsldwi vs4, vs4, vs4, 1
625 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
626 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
627 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
628 ; CHECK-BE-NEXT: mffprwz r4, f5
629 ; CHECK-BE-NEXT: mtfprwz f5, r4
630 ; CHECK-BE-NEXT: mffprwz r4, f4
631 ; CHECK-BE-NEXT: mtfprwz f4, r4
632 ; CHECK-BE-NEXT: xxperm vs4, vs5, vs3
633 ; CHECK-BE-NEXT: xxmrghw vs2, vs4, vs2
634 ; CHECK-BE-NEXT: xxmrghd vs0, vs2, vs0
635 ; CHECK-BE-NEXT: stxv vs0, 16(r3)
636 ; CHECK-BE-NEXT: blr
637 entry:
638 %a = load <16 x float>, ptr %0, align 64
639 %1 = fptoui <16 x float> %a to <16 x i16>
640 store <16 x i16> %1, ptr %agg.result, align 32
641 ret void
642 }
644 define i32 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
645 ; CHECK-P8-LABEL: test2elt_signed:
646 ; CHECK-P8: # %bb.0: # %entry
647 ; CHECK-P8-NEXT: mtfprd f0, r3
648 ; CHECK-P8-NEXT: xxswapd v2, vs0
649 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
650 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3
651 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
652 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
653 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
654 ; CHECK-P8-NEXT: mffprwz r4, f0
655 ; CHECK-P8-NEXT: mtvsrd v3, r4
656 ; CHECK-P8-NEXT: mffprwz r3, f1
657 ; CHECK-P8-NEXT: mtvsrd v2, r3
658 ; CHECK-P8-NEXT: vmrghh v2, v3, v2
659 ; CHECK-P8-NEXT: xxswapd vs0, v2
660 ; CHECK-P8-NEXT: mffprwz r3, f0
661 ; CHECK-P8-NEXT: blr
662 ;
663 ; CHECK-P9-LABEL: test2elt_signed:
664 ; CHECK-P9: # %bb.0: # %entry
665 ; CHECK-P9-NEXT: mtfprd f0, r3
666 ; CHECK-P9-NEXT: xxswapd v2, vs0
667 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
668 ; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
669 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
670 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
671 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
672 ; CHECK-P9-NEXT: mffprwz r3, f1
673 ; CHECK-P9-NEXT: mtvsrd v2, r3
674 ; CHECK-P9-NEXT: mffprwz r3, f0
675 ; CHECK-P9-NEXT: mtvsrd v3, r3
676 ; CHECK-P9-NEXT: li r3, 0
677 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
678 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
679 ; CHECK-P9-NEXT: blr
680 ;
681 ; CHECK-BE-LABEL: test2elt_signed:
682 ; CHECK-BE: # %bb.0: # %entry
683 ; CHECK-BE-NEXT: mtfprd f0, r3
684 ; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
685 ; CHECK-BE-NEXT: xscvspdpn f2, vs0
686 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
687 ; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
688 ; CHECK-BE-NEXT: lxv vs1, 0(r3)
689 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
690 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
691 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
692 ; CHECK-BE-NEXT: mffprwz r3, f2
693 ; CHECK-BE-NEXT: mtfprwz f2, r3
694 ; CHECK-BE-NEXT: mffprwz r3, f0
695 ; CHECK-BE-NEXT: mtvsrwz v2, r3
696 ; CHECK-BE-NEXT: li r3, 0
697 ; CHECK-BE-NEXT: xxperm v2, vs2, vs1
698 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
699 ; CHECK-BE-NEXT: blr
700 entry:
701 %0 = bitcast i64 %a.coerce to <2 x float>
702 %1 = fptosi <2 x float> %0 to <2 x i16>
703 %2 = bitcast <2 x i16> %1 to i32
704 ret i32 %2
705 }
707 define i64 @test4elt_signed(<4 x float> %a) local_unnamed_addr #1 {
708 ; CHECK-P8-LABEL: test4elt_signed:
709 ; CHECK-P8: # %bb.0: # %entry
710 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
711 ; CHECK-P8-NEXT: xscvspdpn f1, v2
712 ; CHECK-P8-NEXT: xxswapd vs2, v2
713 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
714 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
715 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
716 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
717 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
718 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
719 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
720 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
721 ; CHECK-P8-NEXT: mffprwz r3, f1
722 ; CHECK-P8-NEXT: mtvsrd v2, r3
723 ; CHECK-P8-NEXT: mffprwz r3, f0
724 ; CHECK-P8-NEXT: mffprwz r4, f2
725 ; CHECK-P8-NEXT: mtvsrd v3, r3
726 ; CHECK-P8-NEXT: mffprwz r3, f3
727 ; CHECK-P8-NEXT: mtvsrd v4, r4
728 ; CHECK-P8-NEXT: mtvsrd v5, r3
729 ; CHECK-P8-NEXT: vmrghh v3, v4, v3
730 ; CHECK-P8-NEXT: vmrghh v2, v2, v5
731 ; CHECK-P8-NEXT: xxmrglw vs0, v2, v3
732 ; CHECK-P8-NEXT: xxswapd vs0, vs0
733 ; CHECK-P8-NEXT: mffprd r3, f0
734 ; CHECK-P8-NEXT: blr
735 ;
736 ; CHECK-P9-LABEL: test4elt_signed:
737 ; CHECK-P9: # %bb.0: # %entry
738 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
739 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
740 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
741 ; CHECK-P9-NEXT: mffprwz r3, f0
742 ; CHECK-P9-NEXT: xxswapd vs0, v2
743 ; CHECK-P9-NEXT: mtvsrd v3, r3
744 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
745 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
746 ; CHECK-P9-NEXT: mffprwz r3, f0
747 ; CHECK-P9-NEXT: xscvspdpn f0, v2
748 ; CHECK-P9-NEXT: mtvsrd v4, r3
749 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
750 ; CHECK-P9-NEXT: vmrghh v3, v4, v3
751 ; CHECK-P9-NEXT: mffprwz r3, f0
752 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1
753 ; CHECK-P9-NEXT: mtvsrd v4, r3
754 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
755 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
756 ; CHECK-P9-NEXT: mffprwz r3, f0
757 ; CHECK-P9-NEXT: mtvsrd v2, r3
758 ; CHECK-P9-NEXT: vmrghh v2, v4, v2
759 ; CHECK-P9-NEXT: xxmrglw vs0, v2, v3
760 ; CHECK-P9-NEXT: mfvsrld r3, vs0
761 ; CHECK-P9-NEXT: blr
762 ;
763 ; CHECK-BE-LABEL: test4elt_signed:
764 ; CHECK-BE: # %bb.0: # %entry
765 ; CHECK-BE-NEXT: xxsldwi vs1, v2, v2, 3
766 ; CHECK-BE-NEXT: xxswapd vs2, v2
767 ; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
768 ; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
769 ; CHECK-BE-NEXT: xxsldwi vs3, v2, v2, 1
770 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
771 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
772 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
773 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
774 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
775 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
776 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
777 ; CHECK-BE-NEXT: mffprwz r3, f1
778 ; CHECK-BE-NEXT: mtfprwz f1, r3
779 ; CHECK-BE-NEXT: mffprwz r3, f2
780 ; CHECK-BE-NEXT: mtfprwz f2, r3
781 ; CHECK-BE-NEXT: xxperm vs1, vs2, vs0
782 ; CHECK-BE-NEXT: xscvspdpn f2, v2
783 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
784 ; CHECK-BE-NEXT: mffprwz r3, f2
785 ; CHECK-BE-NEXT: mtfprwz f2, r3
786 ; CHECK-BE-NEXT: mffprwz r3, f3
787 ; CHECK-BE-NEXT: mtfprwz f3, r3
788 ; CHECK-BE-NEXT: xxperm vs3, vs2, vs0
789 ; CHECK-BE-NEXT: xxmrghw vs0, vs3, vs1
790 ; CHECK-BE-NEXT: mffprd r3, f0
791 ; CHECK-BE-NEXT: blr
792 entry:
793 %0 = fptosi <4 x float> %a to <4 x i16>
794 %1 = bitcast <4 x i16> %0 to i64
795 ret i64 %1
796 }
798 define <8 x i16> @test8elt_signed(ptr nocapture readonly) local_unnamed_addr #2 {
799 ; CHECK-P8-LABEL: test8elt_signed:
800 ; CHECK-P8: # %bb.0: # %entry
801 ; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
802 ; CHECK-P8-NEXT: li r4, 16
803 ; CHECK-P8-NEXT: lxvd2x vs1, r3, r4
804 ; CHECK-P8-NEXT: xxswapd v2, vs0
805 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
806 ; CHECK-P8-NEXT: xxswapd v3, vs1
807 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
808 ; CHECK-P8-NEXT: xxsldwi vs2, v2, v2, 3
809 ; CHECK-P8-NEXT: xxsldwi vs4, v2, v2, 1
810 ; CHECK-P8-NEXT: xscvspdpn f3, v2
811 ; CHECK-P8-NEXT: xxsldwi vs6, v3, v3, 3
812 ; CHECK-P8-NEXT: xxsldwi vs7, v3, v3, 1
813 ; CHECK-P8-NEXT: xscvspdpn f5, v3
814 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
815 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
816 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
817 ; CHECK-P8-NEXT: xscvspdpn f6, vs6
818 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
819 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
820 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
821 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
822 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
823 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
824 ; CHECK-P8-NEXT: mffprwz r3, f0
825 ; CHECK-P8-NEXT: mffprwz r4, f3
826 ; CHECK-P8-NEXT: mtvsrd v2, r3
827 ; CHECK-P8-NEXT: mffprwz r3, f2
828 ; CHECK-P8-NEXT: xscvdpsxws f0, f6
829 ; CHECK-P8-NEXT: xscvdpsxws f2, f7
830 ; CHECK-P8-NEXT: mtvsrd v3, r4
831 ; CHECK-P8-NEXT: mffprwz r4, f4
832 ; CHECK-P8-NEXT: mtvsrd v4, r3
833 ; CHECK-P8-NEXT: mtvsrd v5, r4
834 ; CHECK-P8-NEXT: mffprwz r3, f1
835 ; CHECK-P8-NEXT: mffprwz r4, f5
836 ; CHECK-P8-NEXT: vmrghh v2, v2, v4
837 ; CHECK-P8-NEXT: vmrghh v3, v3, v5
838 ; CHECK-P8-NEXT: mtvsrd v4, r3
839 ; CHECK-P8-NEXT: mtvsrd v5, r4
840 ; CHECK-P8-NEXT: mffprwz r3, f0
841 ; CHECK-P8-NEXT: mffprwz r4, f2
842 ; CHECK-P8-NEXT: mtvsrd v0, r3
843 ; CHECK-P8-NEXT: mtvsrd v1, r4
844 ; CHECK-P8-NEXT: xxmrglw vs0, v3, v2
845 ; CHECK-P8-NEXT: vmrghh v4, v4, v0
846 ; CHECK-P8-NEXT: vmrghh v5, v5, v1
847 ; CHECK-P8-NEXT: xxmrglw vs1, v5, v4
848 ; CHECK-P8-NEXT: xxmrgld v2, vs1, vs0
849 ; CHECK-P8-NEXT: blr
850 ;
851 ; CHECK-P9-LABEL: test8elt_signed:
852 ; CHECK-P9: # %bb.0: # %entry
853 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
854 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
855 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
856 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
857 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
858 ; CHECK-P9-NEXT: mffprwz r3, f2
859 ; CHECK-P9-NEXT: xxswapd vs2, vs1
860 ; CHECK-P9-NEXT: mtvsrd v2, r3
861 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
862 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
863 ; CHECK-P9-NEXT: mffprwz r3, f2
864 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
865 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
866 ; CHECK-P9-NEXT: mtvsrd v3, r3
867 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
868 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
869 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
870 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
871 ; CHECK-P9-NEXT: mffprwz r3, f2
872 ; CHECK-P9-NEXT: xxsldwi vs2, vs0, vs0, 3
873 ; CHECK-P9-NEXT: mtvsrd v3, r3
874 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
875 ; CHECK-P9-NEXT: mffprwz r3, f1
876 ; CHECK-P9-NEXT: mtvsrd v4, r3
877 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
878 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
879 ; CHECK-P9-NEXT: xxmrglw vs1, v3, v2
880 ; CHECK-P9-NEXT: mffprwz r3, f2
881 ; CHECK-P9-NEXT: xxswapd vs2, vs0
882 ; CHECK-P9-NEXT: mtvsrd v2, r3
883 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
884 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
885 ; CHECK-P9-NEXT: mffprwz r3, f2
886 ; CHECK-P9-NEXT: xscvspdpn f2, vs0
887 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
888 ; CHECK-P9-NEXT: mtvsrd v3, r3
889 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
890 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
891 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
892 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
893 ; CHECK-P9-NEXT: mffprwz r3, f2
894 ; CHECK-P9-NEXT: mtvsrd v3, r3
895 ; CHECK-P9-NEXT: mffprwz r3, f0
896 ; CHECK-P9-NEXT: mtvsrd v4, r3
897 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
898 ; CHECK-P9-NEXT: xxmrglw vs0, v3, v2
899 ; CHECK-P9-NEXT: xxmrgld v2, vs0, vs1
900 ; CHECK-P9-NEXT: blr
901 ;
902 ; CHECK-BE-LABEL: test8elt_signed:
903 ; CHECK-BE: # %bb.0: # %entry
904 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
905 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
906 ; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0@toc@ha
907 ; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0@toc@l
908 ; CHECK-BE-NEXT: lxv vs2, 0(r3)
909 ; CHECK-BE-NEXT: xxsldwi vs3, vs1, vs1, 3
910 ; CHECK-BE-NEXT: xxswapd vs4, vs1
911 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
912 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
913 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
914 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
915 ; CHECK-BE-NEXT: mffprwz r3, f3
916 ; CHECK-BE-NEXT: mtfprwz f3, r3
917 ; CHECK-BE-NEXT: mffprwz r3, f4
918 ; CHECK-BE-NEXT: mtfprwz f4, r3
919 ; CHECK-BE-NEXT: xxperm vs3, vs4, vs2
920 ; CHECK-BE-NEXT: xscvspdpn f4, vs1
921 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
922 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
923 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
924 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
925 ; CHECK-BE-NEXT: mffprwz r3, f4
926 ; CHECK-BE-NEXT: mtfprwz f4, r3
927 ; CHECK-BE-NEXT: mffprwz r3, f1
928 ; CHECK-BE-NEXT: mtfprwz f1, r3
929 ; CHECK-BE-NEXT: xxperm vs1, vs4, vs2
930 ; CHECK-BE-NEXT: xxswapd vs4, vs0
931 ; CHECK-BE-NEXT: xxmrghw vs1, vs1, vs3
932 ; CHECK-BE-NEXT: xxsldwi vs3, vs0, vs0, 3
933 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
934 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
935 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
936 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
937 ; CHECK-BE-NEXT: mffprwz r3, f3
938 ; CHECK-BE-NEXT: mtfprwz f3, r3
939 ; CHECK-BE-NEXT: mffprwz r3, f4
940 ; CHECK-BE-NEXT: mtfprwz f4, r3
941 ; CHECK-BE-NEXT: xxperm vs3, vs4, vs2
942 ; CHECK-BE-NEXT: xscvspdpn f4, vs0
943 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
944 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
945 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
946 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
947 ; CHECK-BE-NEXT: mffprwz r3, f4
948 ; CHECK-BE-NEXT: mtfprwz f4, r3
949 ; CHECK-BE-NEXT: mffprwz r3, f0
950 ; CHECK-BE-NEXT: mtfprwz f0, r3
951 ; CHECK-BE-NEXT: xxperm vs0, vs4, vs2
952 ; CHECK-BE-NEXT: xxmrghw vs0, vs0, vs3
953 ; CHECK-BE-NEXT: xxmrghd v2, vs0, vs1
954 ; CHECK-BE-NEXT: blr
955 entry:
956 %a = load <8 x float>, ptr %0, align 32
957 %1 = fptosi <8 x float> %a to <8 x i16>
958 ret <8 x i16> %1
959 }
961 define void @test16elt_signed(ptr noalias nocapture sret(<16 x i16>) %agg.result, ptr nocapture readonly) local_unnamed_addr #3 {
962 ; CHECK-P8-LABEL: test16elt_signed:
963 ; CHECK-P8: # %bb.0: # %entry
964 ; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
965 ; CHECK-P8-NEXT: li r5, 16
966 ; CHECK-P8-NEXT: li r6, 32
967 ; CHECK-P8-NEXT: lxvd2x vs1, r4, r5
968 ; CHECK-P8-NEXT: lxvd2x vs2, r4, r6
969 ; CHECK-P8-NEXT: li r6, 48
970 ; CHECK-P8-NEXT: lxvd2x vs3, r4, r6
971 ; CHECK-P8-NEXT: xxswapd v2, vs0
972 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
973 ; CHECK-P8-NEXT: xscvspdpn f4, vs1
974 ; CHECK-P8-NEXT: xxswapd v3, vs1
975 ; CHECK-P8-NEXT: xscvspdpn f1, vs2
976 ; CHECK-P8-NEXT: xxswapd v4, vs2
977 ; CHECK-P8-NEXT: xxsldwi vs6, v2, v2, 3
978 ; CHECK-P8-NEXT: xxsldwi vs8, v2, v2, 1
979 ; CHECK-P8-NEXT: xscvspdpn f7, v2
980 ; CHECK-P8-NEXT: xxsldwi vs9, v3, v3, 3
981 ; CHECK-P8-NEXT: xscvspdpn f5, vs3
982 ; CHECK-P8-NEXT: xxswapd v0, vs3
983 ; CHECK-P8-NEXT: xscvspdpn f6, vs6
984 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
985 ; CHECK-P8-NEXT: xscvspdpn f8, vs8
986 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
987 ; CHECK-P8-NEXT: xscvspdpn f9, vs9
988 ; CHECK-P8-NEXT: xscvspdpn f2, v3
989 ; CHECK-P8-NEXT: xscvdpsxws f6, f6
990 ; CHECK-P8-NEXT: mffprwz r4, f0
991 ; CHECK-P8-NEXT: xscvdpsxws f0, f7
992 ; CHECK-P8-NEXT: xxsldwi vs7, v0, v0, 3
993 ; CHECK-P8-NEXT: mtvsrd v2, r4
994 ; CHECK-P8-NEXT: mffprwz r4, f4
995 ; CHECK-P8-NEXT: xscvdpsxws f4, f8
996 ; CHECK-P8-NEXT: mtvsrd v5, r4
997 ; CHECK-P8-NEXT: mffprwz r4, f6
998 ; CHECK-P8-NEXT: xscvdpsxws f6, f9
999 ; CHECK-P8-NEXT: xscvspdpn f10, v4
1000 ; CHECK-P8-NEXT: mtvsrd v1, r4
1001 ; CHECK-P8-NEXT: mffprwz r4, f0
1002 ; CHECK-P8-NEXT: xxsldwi vs0, v3, v3, 1
1003 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
1004 ; CHECK-P8-NEXT: xscvspdpn f3, v0
1005 ; CHECK-P8-NEXT: mtvsrd v3, r4
1006 ; CHECK-P8-NEXT: mffprwz r4, f4
1007 ; CHECK-P8-NEXT: xxsldwi vs4, v4, v4, 3
1008 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
1009 ; CHECK-P8-NEXT: vmrghh v2, v2, v1
1010 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
1011 ; CHECK-P8-NEXT: mtvsrd v1, r4
1012 ; CHECK-P8-NEXT: mffprwz r4, f6
1013 ; CHECK-P8-NEXT: xxsldwi vs6, v4, v4, 1
1014 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
1015 ; CHECK-P8-NEXT: vmrghh v3, v3, v1
1016 ; CHECK-P8-NEXT: mtvsrd v1, r4
1017 ; CHECK-P8-NEXT: mffprwz r4, f1
1018 ; CHECK-P8-NEXT: xscvdpsxws f1, f10
1019 ; CHECK-P8-NEXT: vmrghh v4, v5, v1
1020 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
1021 ; CHECK-P8-NEXT: mtvsrd v5, r4
1022 ; CHECK-P8-NEXT: mffprwz r4, f5
1023 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
1024 ; CHECK-P8-NEXT: mtvsrd v1, r4
1025 ; CHECK-P8-NEXT: mffprwz r4, f2
1026 ; CHECK-P8-NEXT: xxsldwi vs2, v0, v0, 1
1027 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
1028 ; CHECK-P8-NEXT: xscvspdpn f6, vs6
1029 ; CHECK-P8-NEXT: mtvsrd v6, r4
1030 ; CHECK-P8-NEXT: mffprwz r4, f1
1031 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
1032 ; CHECK-P8-NEXT: xscvdpsxws f1, f4
1033 ; CHECK-P8-NEXT: mtvsrd v7, r4
1034 ; CHECK-P8-NEXT: mffprwz r4, f3
1035 ; CHECK-P8-NEXT: xscvdpsxws f3, f6
1036 ; CHECK-P8-NEXT: mtvsrd v0, r4
1037 ; CHECK-P8-NEXT: mffprwz r4, f0
1038 ; CHECK-P8-NEXT: xscvspdpn f0, vs2
1039 ; CHECK-P8-NEXT: mtvsrd v8, r4
1040 ; CHECK-P8-NEXT: mffprwz r4, f1
1041 ; CHECK-P8-NEXT: xscvdpsxws f1, f7
1042 ; CHECK-P8-NEXT: mtvsrd v9, r4
1043 ; CHECK-P8-NEXT: mffprwz r4, f3
1044 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
1045 ; CHECK-P8-NEXT: vmrghh v6, v6, v8
1046 ; CHECK-P8-NEXT: mtvsrd v8, r4
1047 ; CHECK-P8-NEXT: mffprwz r4, f1
1048 ; CHECK-P8-NEXT: vmrghh v5, v5, v9
1049 ; CHECK-P8-NEXT: mtvsrd v9, r4
1050 ; CHECK-P8-NEXT: mffprwz r4, f0
1051 ; CHECK-P8-NEXT: xxmrglw vs0, v3, v2
1052 ; CHECK-P8-NEXT: vmrghh v7, v7, v8
1053 ; CHECK-P8-NEXT: xxmrglw vs1, v6, v4
1054 ; CHECK-P8-NEXT: mtvsrd v8, r4
1055 ; CHECK-P8-NEXT: vmrghh v1, v1, v9
1056 ; CHECK-P8-NEXT: vmrghh v0, v0, v8
1057 ; CHECK-P8-NEXT: xxmrgld v2, vs1, vs0
1058 ; CHECK-P8-NEXT: xxmrglw vs2, v7, v5
1059 ; CHECK-P8-NEXT: xxswapd vs1, v2
1060 ; CHECK-P8-NEXT: xxmrglw vs3, v0, v1
1061 ; CHECK-P8-NEXT: xxmrgld v3, vs3, vs2
1062 ; CHECK-P8-NEXT: xxswapd vs0, v3
1063 ; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
1064 ; CHECK-P8-NEXT: stxvd2x vs1, 0, r3
1065 ; CHECK-P8-NEXT: blr
1066 ;
1067 ; CHECK-P9-LABEL: test16elt_signed:
1068 ; CHECK-P9: # %bb.0: # %entry
1069 ; CHECK-P9-NEXT: lxv vs1, 0(r4)
1070 ; CHECK-P9-NEXT: lxv vs0, 16(r4)
1071 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
1072 ; CHECK-P9-NEXT: xxswapd vs3, vs1
1073 ; CHECK-P9-NEXT: xscvspdpn f4, vs1
1074 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
1075 ; CHECK-P9-NEXT: xxsldwi vs5, vs0, vs0, 3
1076 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1077 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1078 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1079 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1080 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1081 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1082 ; CHECK-P9-NEXT: mffprwz r5, f2
1083 ; CHECK-P9-NEXT: xxswapd vs2, vs0
1084 ; CHECK-P9-NEXT: mtvsrd v2, r5
1085 ; CHECK-P9-NEXT: mffprwz r5, f3
1086 ; CHECK-P9-NEXT: xscvdpsxws f3, f4
1087 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1088 ; CHECK-P9-NEXT: mtvsrd v3, r5
1089 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
1090 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1091 ; CHECK-P9-NEXT: mffprwz r5, f3
1092 ; CHECK-P9-NEXT: xscvspdpn f3, vs5
1093 ; CHECK-P9-NEXT: mtvsrd v3, r5
1094 ; CHECK-P9-NEXT: mffprwz r5, f1
1095 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
1096 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
1097 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1098 ; CHECK-P9-NEXT: mtvsrd v4, r5
1099 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1100 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1101 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
1102 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1103 ; CHECK-P9-NEXT: mffprwz r5, f1
1104 ; CHECK-P9-NEXT: mtvsrd v4, r5
1105 ; CHECK-P9-NEXT: mffprwz r5, f3
1106 ; CHECK-P9-NEXT: mtvsrd v5, r5
1107 ; CHECK-P9-NEXT: mffprwz r5, f2
1108 ; CHECK-P9-NEXT: xxmrglw vs2, v3, v2
1109 ; CHECK-P9-NEXT: mtvsrd v0, r5
1110 ; CHECK-P9-NEXT: mffprwz r5, f0
1111 ; CHECK-P9-NEXT: lxv vs0, 32(r4)
1112 ; CHECK-P9-NEXT: vmrghh v5, v0, v5
1113 ; CHECK-P9-NEXT: mtvsrd v0, r5
1114 ; CHECK-P9-NEXT: vmrghh v4, v4, v0
1115 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
1116 ; CHECK-P9-NEXT: xxswapd vs3, vs0
1117 ; CHECK-P9-NEXT: xscvspdpn f4, vs0
1118 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
1119 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1120 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1121 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1122 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
1123 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1124 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1125 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1126 ; CHECK-P9-NEXT: mffprwz r5, f1
1127 ; CHECK-P9-NEXT: lxv vs1, 48(r4)
1128 ; CHECK-P9-NEXT: mffprwz r4, f4
1129 ; CHECK-P9-NEXT: mtvsrd v2, r5
1130 ; CHECK-P9-NEXT: mffprwz r5, f3
1131 ; CHECK-P9-NEXT: xxmrglw vs3, v4, v5
1132 ; CHECK-P9-NEXT: mtvsrd v3, r5
1133 ; CHECK-P9-NEXT: xxmrgld vs2, vs3, vs2
1134 ; CHECK-P9-NEXT: xxsldwi vs3, vs1, vs1, 3
1135 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
1136 ; CHECK-P9-NEXT: mtvsrd v3, r4
1137 ; CHECK-P9-NEXT: mffprwz r4, f0
1138 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1139 ; CHECK-P9-NEXT: mtvsrd v4, r4
1140 ; CHECK-P9-NEXT: stxv vs2, 0(r3)
1141 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
1142 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1143 ; CHECK-P9-NEXT: xxmrglw vs0, v3, v2
1144 ; CHECK-P9-NEXT: mffprwz r4, f3
1145 ; CHECK-P9-NEXT: xxswapd vs3, vs1
1146 ; CHECK-P9-NEXT: mtvsrd v2, r4
1147 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1148 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1149 ; CHECK-P9-NEXT: mffprwz r4, f3
1150 ; CHECK-P9-NEXT: xscvspdpn f3, vs1
1151 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
1152 ; CHECK-P9-NEXT: mtvsrd v3, r4
1153 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1154 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1155 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
1156 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1157 ; CHECK-P9-NEXT: mffprwz r4, f3
1158 ; CHECK-P9-NEXT: mtvsrd v3, r4
1159 ; CHECK-P9-NEXT: mffprwz r4, f1
1160 ; CHECK-P9-NEXT: mtvsrd v4, r4
1161 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
1162 ; CHECK-P9-NEXT: xxmrglw vs1, v3, v2
1163 ; CHECK-P9-NEXT: xxmrgld vs0, vs1, vs0
1164 ; CHECK-P9-NEXT: stxv vs0, 16(r3)
1165 ; CHECK-P9-NEXT: blr
1166 ;
1167 ; CHECK-BE-LABEL: test16elt_signed:
1168 ; CHECK-BE: # %bb.0: # %entry
1169 ; CHECK-BE-NEXT: lxv vs2, 16(r4)
1170 ; CHECK-BE-NEXT: lxv vs1, 0(r4)
1171 ; CHECK-BE-NEXT: addis r5, r2, .LCPI7_0@toc@ha
1172 ; CHECK-BE-NEXT: lxv vs0, 48(r4)
1173 ; CHECK-BE-NEXT: addi r5, r5, .LCPI7_0@toc@l
1174 ; CHECK-BE-NEXT: lxv vs3, 0(r5)
1175 ; CHECK-BE-NEXT: xscvspdpn f6, vs2
1176 ; CHECK-BE-NEXT: xxsldwi vs4, vs2, vs2, 3
1177 ; CHECK-BE-NEXT: xscvspdpn f9, vs1
1178 ; CHECK-BE-NEXT: xxswapd vs5, vs2
1179 ; CHECK-BE-NEXT: xxsldwi vs2, vs2, vs2, 1
1180 ; CHECK-BE-NEXT: xxsldwi vs7, vs1, vs1, 3
1181 ; CHECK-BE-NEXT: xxswapd vs8, vs1
1182 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
1183 ; CHECK-BE-NEXT: xxsldwi vs10, vs0, vs0, 3
1184 ; CHECK-BE-NEXT: xxswapd vs11, vs0
1185 ; CHECK-BE-NEXT: xscvdpsxws f6, f6
1186 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
1187 ; CHECK-BE-NEXT: xscvdpsxws f9, f9
1188 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
1189 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1190 ; CHECK-BE-NEXT: xscvspdpn f7, vs7
1191 ; CHECK-BE-NEXT: xscvspdpn f8, vs8
1192 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1193 ; CHECK-BE-NEXT: xscvspdpn f10, vs10
1194 ; CHECK-BE-NEXT: xscvspdpn f11, vs11
1195 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1196 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
1197 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1198 ; CHECK-BE-NEXT: xscvdpsxws f7, f7
1199 ; CHECK-BE-NEXT: xscvdpsxws f8, f8
1200 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1201 ; CHECK-BE-NEXT: xscvdpsxws f10, f10
1202 ; CHECK-BE-NEXT: xscvdpsxws f11, f11
1203 ; CHECK-BE-NEXT: mffprwz r5, f6
1204 ; CHECK-BE-NEXT: mtfprwz f6, r5
1205 ; CHECK-BE-NEXT: mffprwz r5, f9
1206 ; CHECK-BE-NEXT: mtfprwz f9, r5
1207 ; CHECK-BE-NEXT: mffprwz r5, f4
1208 ; CHECK-BE-NEXT: mtfprwz f4, r5
1209 ; CHECK-BE-NEXT: mffprwz r5, f5
1210 ; CHECK-BE-NEXT: mtfprwz f5, r5
1211 ; CHECK-BE-NEXT: mffprwz r5, f2
1212 ; CHECK-BE-NEXT: xxperm vs4, vs5, vs3
1213 ; CHECK-BE-NEXT: xscvspdpn f5, vs0
1214 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
1215 ; CHECK-BE-NEXT: mtfprwz f2, r5
1216 ; CHECK-BE-NEXT: mffprwz r5, f7
1217 ; CHECK-BE-NEXT: mtfprwz f7, r5
1218 ; CHECK-BE-NEXT: mffprwz r5, f8
1219 ; CHECK-BE-NEXT: xxperm vs2, vs6, vs3
1220 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1221 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
1222 ; CHECK-BE-NEXT: mtfprwz f8, r5
1223 ; CHECK-BE-NEXT: mffprwz r5, f1
1224 ; CHECK-BE-NEXT: xxmrghw vs2, vs2, vs4
1225 ; CHECK-BE-NEXT: lxv vs4, 32(r4)
1226 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1227 ; CHECK-BE-NEXT: mtfprwz f1, r5
1228 ; CHECK-BE-NEXT: xxperm vs7, vs8, vs3
1229 ; CHECK-BE-NEXT: mffprwz r5, f10
1230 ; CHECK-BE-NEXT: xxperm vs1, vs9, vs3
1231 ; CHECK-BE-NEXT: mtfprwz f10, r5
1232 ; CHECK-BE-NEXT: mffprwz r5, f11
1233 ; CHECK-BE-NEXT: mffprwz r4, f5
1234 ; CHECK-BE-NEXT: mtfprwz f11, r5
1235 ; CHECK-BE-NEXT: xxmrghw vs1, vs1, vs7
1236 ; CHECK-BE-NEXT: mtfprwz f5, r4
1237 ; CHECK-BE-NEXT: xxperm vs10, vs11, vs3
1238 ; CHECK-BE-NEXT: mffprwz r4, f0
1239 ; CHECK-BE-NEXT: xxmrghd vs1, vs1, vs2
1240 ; CHECK-BE-NEXT: xxsldwi vs2, vs4, vs4, 3
1241 ; CHECK-BE-NEXT: mtfprwz f0, r4
1242 ; CHECK-BE-NEXT: xxperm vs0, vs5, vs3
1243 ; CHECK-BE-NEXT: xxswapd vs5, vs4
1244 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1245 ; CHECK-BE-NEXT: stxv vs1, 0(r3)
1246 ; CHECK-BE-NEXT: xscvspdpn f5, vs5
1247 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1248 ; CHECK-BE-NEXT: xxmrghw vs0, vs0, vs10
1249 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
1250 ; CHECK-BE-NEXT: mffprwz r4, f2
1251 ; CHECK-BE-NEXT: mtfprwz f2, r4
1252 ; CHECK-BE-NEXT: mffprwz r4, f5
1253 ; CHECK-BE-NEXT: mtfprwz f5, r4
1254 ; CHECK-BE-NEXT: xxperm vs2, vs5, vs3
1255 ; CHECK-BE-NEXT: xscvspdpn f5, vs4
1256 ; CHECK-BE-NEXT: xxsldwi vs4, vs4, vs4, 1
1257 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
1258 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
1259 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1260 ; CHECK-BE-NEXT: mffprwz r4, f5
1261 ; CHECK-BE-NEXT: mtfprwz f5, r4
1262 ; CHECK-BE-NEXT: mffprwz r4, f4
1263 ; CHECK-BE-NEXT: mtfprwz f4, r4
1264 ; CHECK-BE-NEXT: xxperm vs4, vs5, vs3
1265 ; CHECK-BE-NEXT: xxmrghw vs2, vs4, vs2
1266 ; CHECK-BE-NEXT: xxmrghd vs0, vs2, vs0
1267 ; CHECK-BE-NEXT: stxv vs0, 16(r3)
1268 ; CHECK-BE-NEXT: blr
1269 entry:
1270 %a = load <16 x float>, ptr %0, align 64
1271 %1 = fptosi <16 x float> %a to <16 x i16>
1272 store <16 x i16> %1, ptr %agg.result, align 32
1273 ret void
1274 }