[AMDGPU] Test codegen'ing True16 additions.

[llvm-project.git] / polly / lib / External / isl / test_inputs / schedule / flat2.st

domain: "{ S[a, i1] : 0 <= a <= 9 and -1 + a <= 2i1 <= a }"
child:
  schedule: "[{ S[a, i1] -> [(a)] }]"
  permutable: 1
  coincident: [ 1 ]