[AMDGPU] Test codegen'ing True16 additions.

[llvm-project.git] / polly / lib / External / isl / test_inputs / schedule / flat4.st

domain: "{ S[0, a, i2, i3] : 0 <= a <= 9 and -1 + a <= 2i2 <= a and -3 + a <= 4i3 <= a }"
child:
  schedule: "[{ S[i0, a, i2, i3] -> [(a)] }]"
  permutable: 1
  coincident: [ 1 ]