[AMDGPU] Test codegen'ing True16 additions.

[llvm-project.git] / polly / lib / External / isl / test_inputs / schedule / flat6.st

domain: "{ S[a, b] : b <= 9 - a and b <= 0 and 10b >= -a }"
child:
  schedule: "[{ S[a, b] -> [(a)] }]"
  permutable: 1
  coincident: [ 1 ]