[AMDGPU] Test codegen'ing True16 additions.

[llvm-project.git] / polly / lib / External / isl / test_inputs / schedule / fork1.sc

# Check the decomposition of the topological sort.
# This decomposition is only performed by the incremental scheduler.
# OPTIONS: --no-schedule-whole-component
domain: { A[]; B[]; C[] }
validity: { A[] -> C[]; B[] -> C[] }