clang/test/CodeGen/WebAssembly/wasm-varargs.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature
   2 // RUN: %clang_cc1 -triple wasm32-unknown-unknown -o - -emit-llvm %s | FileCheck %s
   3
   4 #include <stdarg.h>
   5
   6 // CHECK-LABEL: define {{[^@]+}}@test_i32
   7 // CHECK-SAME: (ptr noundef [[FMT:%.*]], ...) #[[ATTR0:[0-9]+]] {
   8 // CHECK-NEXT:  entry:
   9 // CHECK-NEXT:    [[FMT_ADDR:%.*]] = alloca ptr, align 4
  10 // CHECK-NEXT:    [[VA:%.*]] = alloca ptr, align 4
  11 // CHECK-NEXT:    [[V:%.*]] = alloca i32, align 4
  12 // CHECK-NEXT:    store ptr [[FMT]], ptr [[FMT_ADDR]], align 4
  13 // CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
  14 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
  15 // CHECK-NEXT:    [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
  16 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
  17 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARGP_CUR]], align 4
  18 // CHECK-NEXT:    store i32 [[TMP0]], ptr [[V]], align 4
  19 // CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
  20 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[V]], align 4
  21 // CHECK-NEXT:    ret i32 [[TMP1]]
  22 //
  23 int test_i32(char *fmt, ...) {
  24   va_list va;
  25
  26   va_start(va, fmt);
  27   int v = va_arg(va, int);
  28   va_end(va);
  29
  30   return v;
  31 }
  32
  33
  34 // CHECK-LABEL: define {{[^@]+}}@test_i64
  35 // CHECK-SAME: (ptr noundef [[FMT:%.*]], ...) #[[ATTR0]] {
  36 // CHECK-NEXT:  entry:
  37 // CHECK-NEXT:    [[FMT_ADDR:%.*]] = alloca ptr, align 4
  38 // CHECK-NEXT:    [[VA:%.*]] = alloca ptr, align 4
  39 // CHECK-NEXT:    [[V:%.*]] = alloca i64, align 8
  40 // CHECK-NEXT:    store ptr [[FMT]], ptr [[FMT_ADDR]], align 4
  41 // CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
  42 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
  43 // CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 7
  44 // CHECK-NEXT:    [[ARGP_CUR_ALIGNED:%.*]] = call ptr @llvm.ptrmask.p0.i32(ptr [[TMP0]], i32 -8)
  45 // CHECK-NEXT:    [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR_ALIGNED]], i32 8
  46 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
  47 // CHECK-NEXT:    [[TMP1:%.*]] = load i64, ptr [[ARGP_CUR_ALIGNED]], align 8
  48 // CHECK-NEXT:    store i64 [[TMP1]], ptr [[V]], align 8
  49 // CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
  50 // CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[V]], align 8
  51 // CHECK-NEXT:    ret i64 [[TMP2]]
  52 //
  53 long long test_i64(char *fmt, ...) {
  54   va_list va;
  55
  56   va_start(va, fmt);
  57   long long v = va_arg(va, long long);
  58   va_end(va);
  59
  60   return v;
  61 }
  62
  63
  64 struct S {
  65   int x;
  66   int y;
  67   int z;
  68 };
  69
  70 // CHECK-LABEL: define {{[^@]+}}@test_struct
  71 // CHECK-SAME: (ptr dead_on_unwind noalias writable sret([[STRUCT_S:%.*]]) align 4 [[AGG_RESULT:%.*]], ptr noundef [[FMT:%.*]], ...) #[[ATTR0]] {
  72 // CHECK-NEXT:  entry:
  73 // CHECK-NEXT:    [[FMT_ADDR:%.*]] = alloca ptr, align 4
  74 // CHECK-NEXT:    [[VA:%.*]] = alloca ptr, align 4
  75 // CHECK-NEXT:    store ptr [[FMT]], ptr [[FMT_ADDR]], align 4
  76 // CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
  77 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
  78 // CHECK-NEXT:    [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
  79 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
  80 // CHECK-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARGP_CUR]], align 4
  81 // CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[AGG_RESULT]], ptr align 4 [[TMP0]], i32 12, i1 false)
  82 // CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
  83 // CHECK-NEXT:    ret void
  84 //
  85 struct S test_struct(char *fmt, ...) {
  86   va_list va;
  87
  88   va_start(va, fmt);
  89   struct S v = va_arg(va, struct S);
  90   va_end(va);
  91
  92   return v;
  93 }
  94
  95
  96 struct Z {};
  97
  98 // CHECK-LABEL: define {{[^@]+}}@test_empty_struct
  99 // CHECK-SAME: (ptr dead_on_unwind noalias writable sret([[STRUCT_S:%.*]]) align 4 [[AGG_RESULT:%.*]], ptr noundef [[FMT:%.*]], ...) #[[ATTR0]] {
 100 // CHECK-NEXT:  entry:
 101 // CHECK-NEXT:    [[FMT_ADDR:%.*]] = alloca ptr, align 4
 102 // CHECK-NEXT:    [[VA:%.*]] = alloca ptr, align 4
 103 // CHECK-NEXT:    [[U:%.*]] = alloca [[STRUCT_Z:%.*]], align 1
 104 // CHECK-NEXT:    store ptr [[FMT]], ptr [[FMT_ADDR]], align 4
 105 // CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 106 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
 107 // CHECK-NEXT:    [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 0
 108 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
 109 // CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 1 [[U]], ptr align 4 [[ARGP_CUR]], i32 0, i1 false)
 110 // CHECK-NEXT:    [[ARGP_CUR1:%.*]] = load ptr, ptr [[VA]], align 4
 111 // CHECK-NEXT:    [[ARGP_NEXT2:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR1]], i32 4
 112 // CHECK-NEXT:    store ptr [[ARGP_NEXT2]], ptr [[VA]], align 4
 113 // CHECK-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARGP_CUR1]], align 4
 114 // CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[AGG_RESULT]], ptr align 4 [[TMP0]], i32 12, i1 false)
 115 // CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 116 // CHECK-NEXT:    ret void
 117 //
 118 struct S test_empty_struct(char *fmt, ...) {
 119   va_list va;
 120
 121   va_start(va, fmt);
 122   struct Z u = va_arg(va, struct Z);
 123   struct S v = va_arg(va, struct S);
 124   va_end(va);
 125
 126   return v;
 127 }
 128