clang/test/Headers/gpuintrin.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
   2 // RUN: %clang_cc1 -internal-isystem %S/Inputs/include \
   3 // RUN:   -internal-isystem %S/../../lib/Headers/ \
   4 // RUN:   -triple amdgcn-amd-amdhsa -emit-llvm %s -o - \
   5 // RUN: | FileCheck %s --check-prefix=AMDGPU
   6 //
   7 // RUN: %clang_cc1 -internal-isystem %S/Inputs/include \
   8 // RUN:   -internal-isystem %S/../../lib/Headers/ \
   9 // RUN:   -target-feature +ptx62 \
  10 // RUN:   -triple nvptx64-nvidia-cuda -emit-llvm %s -o - \
  11 // RUN: | FileCheck %s --check-prefix=NVPTX
  12
  13 #include <gpuintrin.h>
  14
  15 // AMDGPU-LABEL: define protected amdgpu_kernel void @foo(
  16 // AMDGPU-SAME: ) #[[ATTR0:[0-9]+]] {
  17 // AMDGPU-NEXT:  [[ENTRY:.*:]]
  18 // AMDGPU-NEXT:    [[CALL:%.*]] = call i32 @__gpu_num_blocks_x() #[[ATTR7:[0-9]+]]
  19 // AMDGPU-NEXT:    [[CALL1:%.*]] = call i32 @__gpu_num_blocks_y() #[[ATTR7]]
  20 // AMDGPU-NEXT:    [[CALL2:%.*]] = call i32 @__gpu_num_blocks_z() #[[ATTR7]]
  21 // AMDGPU-NEXT:    [[CALL3:%.*]] = call i32 @__gpu_num_blocks(i32 noundef 0) #[[ATTR7]]
  22 // AMDGPU-NEXT:    [[CALL4:%.*]] = call i32 @__gpu_block_id_x() #[[ATTR7]]
  23 // AMDGPU-NEXT:    [[CALL5:%.*]] = call i32 @__gpu_block_id_y() #[[ATTR7]]
  24 // AMDGPU-NEXT:    [[CALL6:%.*]] = call i32 @__gpu_block_id_z() #[[ATTR7]]
  25 // AMDGPU-NEXT:    [[CALL7:%.*]] = call i32 @__gpu_block_id(i32 noundef 0) #[[ATTR7]]
  26 // AMDGPU-NEXT:    [[CALL8:%.*]] = call i32 @__gpu_num_threads_x() #[[ATTR7]]
  27 // AMDGPU-NEXT:    [[CALL9:%.*]] = call i32 @__gpu_num_threads_y() #[[ATTR7]]
  28 // AMDGPU-NEXT:    [[CALL10:%.*]] = call i32 @__gpu_num_threads_z() #[[ATTR7]]
  29 // AMDGPU-NEXT:    [[CALL11:%.*]] = call i32 @__gpu_num_threads(i32 noundef 0) #[[ATTR7]]
  30 // AMDGPU-NEXT:    [[CALL12:%.*]] = call i32 @__gpu_thread_id_x() #[[ATTR7]]
  31 // AMDGPU-NEXT:    [[CALL13:%.*]] = call i32 @__gpu_thread_id_y() #[[ATTR7]]
  32 // AMDGPU-NEXT:    [[CALL14:%.*]] = call i32 @__gpu_thread_id_z() #[[ATTR7]]
  33 // AMDGPU-NEXT:    [[CALL15:%.*]] = call i32 @__gpu_thread_id(i32 noundef 0) #[[ATTR7]]
  34 // AMDGPU-NEXT:    [[CALL16:%.*]] = call i32 @__gpu_num_lanes() #[[ATTR7]]
  35 // AMDGPU-NEXT:    [[CALL17:%.*]] = call i32 @__gpu_lane_id() #[[ATTR7]]
  36 // AMDGPU-NEXT:    [[CALL18:%.*]] = call i64 @__gpu_lane_mask() #[[ATTR7]]
  37 // AMDGPU-NEXT:    [[CALL19:%.*]] = call i32 @__gpu_read_first_lane_u32(i64 noundef -1, i32 noundef -1) #[[ATTR7]]
  38 // AMDGPU-NEXT:    [[CALL20:%.*]] = call i64 @__gpu_ballot(i64 noundef -1, i1 noundef zeroext true) #[[ATTR7]]
  39 // AMDGPU-NEXT:    call void @__gpu_sync_threads() #[[ATTR7]]
  40 // AMDGPU-NEXT:    call void @__gpu_sync_lane(i64 noundef -1) #[[ATTR7]]
  41 // AMDGPU-NEXT:    [[CALL21:%.*]] = call i32 @__gpu_shuffle_idx_u32(i64 noundef -1, i32 noundef -1, i32 noundef -1) #[[ATTR7]]
  42 // AMDGPU-NEXT:    [[CALL22:%.*]] = call i64 @__gpu_first_lane_id(i64 noundef -1) #[[ATTR7]]
  43 // AMDGPU-NEXT:    [[CALL23:%.*]] = call zeroext i1 @__gpu_is_first_in_lane(i64 noundef -1) #[[ATTR7]]
  44 // AMDGPU-NEXT:    call void @__gpu_exit() #[[ATTR8:[0-9]+]]
  45 // AMDGPU-NEXT:    unreachable
  46 //
  47 // NVPTX-LABEL: define protected void @foo(
  48 // NVPTX-SAME: ) #[[ATTR0:[0-9]+]] {
  49 // NVPTX-NEXT:  [[ENTRY:.*:]]
  50 // NVPTX-NEXT:    [[CALL:%.*]] = call i32 @__gpu_num_blocks_x() #[[ATTR6:[0-9]+]]
  51 // NVPTX-NEXT:    [[CALL1:%.*]] = call i32 @__gpu_num_blocks_y() #[[ATTR6]]
  52 // NVPTX-NEXT:    [[CALL2:%.*]] = call i32 @__gpu_num_blocks_z() #[[ATTR6]]
  53 // NVPTX-NEXT:    [[CALL3:%.*]] = call i32 @__gpu_num_blocks(i32 noundef 0) #[[ATTR6]]
  54 // NVPTX-NEXT:    [[CALL4:%.*]] = call i32 @__gpu_block_id_x() #[[ATTR6]]
  55 // NVPTX-NEXT:    [[CALL5:%.*]] = call i32 @__gpu_block_id_y() #[[ATTR6]]
  56 // NVPTX-NEXT:    [[CALL6:%.*]] = call i32 @__gpu_block_id_z() #[[ATTR6]]
  57 // NVPTX-NEXT:    [[CALL7:%.*]] = call i32 @__gpu_block_id(i32 noundef 0) #[[ATTR6]]
  58 // NVPTX-NEXT:    [[CALL8:%.*]] = call i32 @__gpu_num_threads_x() #[[ATTR6]]
  59 // NVPTX-NEXT:    [[CALL9:%.*]] = call i32 @__gpu_num_threads_y() #[[ATTR6]]
  60 // NVPTX-NEXT:    [[CALL10:%.*]] = call i32 @__gpu_num_threads_z() #[[ATTR6]]
  61 // NVPTX-NEXT:    [[CALL11:%.*]] = call i32 @__gpu_num_threads(i32 noundef 0) #[[ATTR6]]
  62 // NVPTX-NEXT:    [[CALL12:%.*]] = call i32 @__gpu_thread_id_x() #[[ATTR6]]
  63 // NVPTX-NEXT:    [[CALL13:%.*]] = call i32 @__gpu_thread_id_y() #[[ATTR6]]
  64 // NVPTX-NEXT:    [[CALL14:%.*]] = call i32 @__gpu_thread_id_z() #[[ATTR6]]
  65 // NVPTX-NEXT:    [[CALL15:%.*]] = call i32 @__gpu_thread_id(i32 noundef 0) #[[ATTR6]]
  66 // NVPTX-NEXT:    [[CALL16:%.*]] = call i32 @__gpu_num_lanes() #[[ATTR6]]
  67 // NVPTX-NEXT:    [[CALL17:%.*]] = call i32 @__gpu_lane_id() #[[ATTR6]]
  68 // NVPTX-NEXT:    [[CALL18:%.*]] = call i64 @__gpu_lane_mask() #[[ATTR6]]
  69 // NVPTX-NEXT:    [[CALL19:%.*]] = call i32 @__gpu_read_first_lane_u32(i64 noundef -1, i32 noundef -1) #[[ATTR6]]
  70 // NVPTX-NEXT:    [[CALL20:%.*]] = call i64 @__gpu_ballot(i64 noundef -1, i1 noundef zeroext true) #[[ATTR6]]
  71 // NVPTX-NEXT:    call void @__gpu_sync_threads() #[[ATTR6]]
  72 // NVPTX-NEXT:    call void @__gpu_sync_lane(i64 noundef -1) #[[ATTR6]]
  73 // NVPTX-NEXT:    [[CALL21:%.*]] = call i32 @__gpu_shuffle_idx_u32(i64 noundef -1, i32 noundef -1, i32 noundef -1) #[[ATTR6]]
  74 // NVPTX-NEXT:    [[CALL22:%.*]] = call i64 @__gpu_first_lane_id(i64 noundef -1) #[[ATTR6]]
  75 // NVPTX-NEXT:    [[CALL23:%.*]] = call zeroext i1 @__gpu_is_first_in_lane(i64 noundef -1) #[[ATTR6]]
  76 // NVPTX-NEXT:    call void @__gpu_exit() #[[ATTR7:[0-9]+]]
  77 // NVPTX-NEXT:    unreachable
  78 //
  79 __gpu_kernel void foo() {
  80   __gpu_num_blocks_x();
  81   __gpu_num_blocks_y();
  82   __gpu_num_blocks_z();
  83   __gpu_num_blocks(0);
  84   __gpu_block_id_x();
  85   __gpu_block_id_y();
  86   __gpu_block_id_z();
  87   __gpu_block_id(0);
  88   __gpu_num_threads_x();
  89   __gpu_num_threads_y();
  90   __gpu_num_threads_z();
  91   __gpu_num_threads(0);
  92   __gpu_thread_id_x();
  93   __gpu_thread_id_y();
  94   __gpu_thread_id_z();
  95   __gpu_thread_id(0);
  96   __gpu_num_lanes();
  97   __gpu_lane_id();
  98   __gpu_lane_mask();
  99   __gpu_read_first_lane_u32(-1, -1);
 100   __gpu_ballot(-1, 1);
 101   __gpu_sync_threads();
 102   __gpu_sync_lane(-1);
 103   __gpu_shuffle_idx_u32(-1, -1, -1);
 104   __gpu_first_lane_id(-1);
 105   __gpu_is_first_in_lane(-1);
 106   __gpu_exit();
 107 }