clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // expected-no-diagnostics
   3 #ifndef HEADER
   4 #define HEADER
   5 // Test host codegen.
   6 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK2
   8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
  10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4
  11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
  13
  14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  20
  21 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region)
  22 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
  23 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK10
  24 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
  25 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
  26 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
  27 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK12
  28 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
  29 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
  30
  31 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
  32 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  33 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
  34 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  35 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
  36 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  37 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
  38 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  39
  40 #ifdef CK1
  41
  42
  43 int target_teams_fun(int *g){
  44   int n = 1000;
  45   int a[1000];
  46   int te = n / 128;
  47   int th = 128;
  48   // discard n_addr
  49   // discard capture expressions for te and th
  50
  51   #pragma omp target teams loop num_teams(te), thread_limit(th)
  52   for(int i = 0; i < n; i++) {
  53     a[i] = 0;
  54   }
  55
  56   {{{
  57   #pragma omp target teams loop is_device_ptr(g)
  58   for(int i = 0; i < n; i++) {
  59     a[i] = g[0];
  60   }
  61   }}}
  62
  63   // outlined target regions
  64
  65
  66
  67
  68   return a[0];
  69 }
  70
  71 #endif // CK1
  72 #endif // HEADER
  73 // CHECK1-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
  74 // CHECK1-SAME: (ptr noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
  75 // CHECK1-NEXT:  entry:
  76 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
  77 // CHECK1-NEXT:    [[N:%.*]] = alloca i32, align 4
  78 // CHECK1-NEXT:    [[A:%.*]] = alloca [1000 x i32], align 4
  79 // CHECK1-NEXT:    [[TE:%.*]] = alloca i32, align 4
  80 // CHECK1-NEXT:    [[TH:%.*]] = alloca i32, align 4
  81 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
  82 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
  83 // CHECK1-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
  84 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
  85 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8
  86 // CHECK1-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
  87 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
  88 // CHECK1-NEXT:    store i32 1000, ptr [[N]], align 4
  89 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
  90 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
  91 // CHECK1-NEXT:    store i32 [[DIV]], ptr [[TE]], align 4
  92 // CHECK1-NEXT:    store i32 128, ptr [[TH]], align 4
  93 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TE]], align 4
  94 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
  95 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TH]], align 4
  96 // CHECK1-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
  97 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
  98 // CHECK1-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 4
  99 // CHECK1-NEXT:    [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
 100 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 101 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
 102 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
 103 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 104 // CHECK1-NEXT:    store i32 [[TMP7]], ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4
 105 // CHECK1-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED2]], align 8
 106 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i64 [[TMP4]], ptr [[A]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2:[0-9]+]]
 107 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[N]], align 4
 108 // CHECK1-NEXT:    store i32 [[TMP9]], ptr [[N_CASTED3]], align 4
 109 // CHECK1-NEXT:    [[TMP10:%.*]] = load i64, ptr [[N_CASTED3]], align 8
 110 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 111 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57(i64 [[TMP10]], ptr [[A]], ptr [[TMP11]]) #[[ATTR2]]
 112 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i64 0, i64 0
 113 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
 114 // CHECK1-NEXT:    ret i32 [[TMP12]]
 115 //
 116 //
 117 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51
 118 // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
 119 // CHECK1-NEXT:  entry:
 120 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 121 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 122 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
 123 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
 124 // CHECK1-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 125 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3:[0-9]+]])
 126 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 127 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 128 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
 129 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8
 130 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 131 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
 132 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
 133 // CHECK1-NEXT:    call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
 134 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4
 135 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[N_CASTED]], align 4
 136 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, ptr [[N_CASTED]], align 8
 137 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined, i64 [[TMP5]], ptr [[TMP1]])
 138 // CHECK1-NEXT:    ret void
 139 //
 140 //
 141 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined
 142 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
 143 // CHECK1-NEXT:  entry:
 144 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 145 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 146 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 147 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 148 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 149 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 150 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 151 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 152 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 153 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 154 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 155 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 156 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 157 // CHECK1-NEXT:    [[I3:%.*]] = alloca i32, align 4
 158 // CHECK1-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 159 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 160 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 161 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 162 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 163 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 164 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 165 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 166 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 167 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
 168 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 169 // CHECK1-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
 170 // CHECK1-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 171 // CHECK1-NEXT:    store i32 0, ptr [[I]], align 4
 172 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 173 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
 174 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
 175 // CHECK1:       omp.precond.then:
 176 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 177 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 178 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
 179 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 180 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 181 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 182 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
 183 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 184 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 185 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 186 // CHECK1-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
 187 // CHECK1-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 188 // CHECK1:       cond.true:
 189 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 190 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 191 // CHECK1:       cond.false:
 192 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 193 // CHECK1-NEXT:    br label [[COND_END]]
 194 // CHECK1:       cond.end:
 195 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
 196 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 197 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 198 // CHECK1-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
 199 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 200 // CHECK1:       omp.inner.for.cond:
 201 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 202 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 203 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 204 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 205 // CHECK1:       omp.inner.for.body:
 206 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 207 // CHECK1-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
 208 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 209 // CHECK1-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
 210 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
 211 // CHECK1-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4
 212 // CHECK1-NEXT:    [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8
 213 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]])
 214 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 215 // CHECK1:       omp.inner.for.inc:
 216 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 217 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 218 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
 219 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 220 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 221 // CHECK1:       omp.inner.for.end:
 222 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 223 // CHECK1:       omp.loop.exit:
 224 // CHECK1-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 225 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
 226 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
 227 // CHECK1-NEXT:    br label [[OMP_PRECOND_END]]
 228 // CHECK1:       omp.precond.end:
 229 // CHECK1-NEXT:    ret void
 230 //
 231 //
 232 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined
 233 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
 234 // CHECK1-NEXT:  entry:
 235 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 236 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 237 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 238 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 239 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 240 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 241 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 242 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 243 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 244 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 245 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 246 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 247 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 248 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 249 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 250 // CHECK1-NEXT:    [[I4:%.*]] = alloca i32, align 4
 251 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 252 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 253 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 254 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 255 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 256 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 257 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 258 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 259 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 260 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 261 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
 262 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 263 // CHECK1-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
 264 // CHECK1-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 265 // CHECK1-NEXT:    store i32 0, ptr [[I]], align 4
 266 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 267 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
 268 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
 269 // CHECK1:       omp.precond.then:
 270 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 271 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 272 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
 273 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 274 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
 275 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 276 // CHECK1-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
 277 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 278 // CHECK1-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
 279 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 280 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 281 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 282 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
 283 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 284 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 285 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 286 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
 287 // CHECK1-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 288 // CHECK1:       cond.true:
 289 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 290 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 291 // CHECK1:       cond.false:
 292 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 293 // CHECK1-NEXT:    br label [[COND_END]]
 294 // CHECK1:       cond.end:
 295 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
 296 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 297 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 298 // CHECK1-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
 299 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 300 // CHECK1:       omp.inner.for.cond:
 301 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 302 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 303 // CHECK1-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
 304 // CHECK1-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 305 // CHECK1:       omp.inner.for.body:
 306 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 307 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
 308 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 309 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
 310 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I4]], align 4
 311 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
 312 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
 313 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
 314 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 315 // CHECK1:       omp.body.continue:
 316 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 317 // CHECK1:       omp.inner.for.inc:
 318 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 319 // CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP18]], 1
 320 // CHECK1-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
 321 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 322 // CHECK1:       omp.inner.for.end:
 323 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 324 // CHECK1:       omp.loop.exit:
 325 // CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 326 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
 327 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP20]])
 328 // CHECK1-NEXT:    br label [[OMP_PRECOND_END]]
 329 // CHECK1:       omp.precond.end:
 330 // CHECK1-NEXT:    ret void
 331 //
 332 //
 333 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57
 334 // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
 335 // CHECK1-NEXT:  entry:
 336 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 337 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 338 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 339 // CHECK1-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 340 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 341 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 342 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 343 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 344 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 345 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[N_CASTED]], align 4
 346 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[N_CASTED]], align 8
 347 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 348 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined, i64 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]])
 349 // CHECK1-NEXT:    ret void
 350 //
 351 //
 352 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined
 353 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
 354 // CHECK1-NEXT:  entry:
 355 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 356 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 357 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 358 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 359 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 360 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 361 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 362 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 363 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 364 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 365 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 366 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 367 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 368 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 369 // CHECK1-NEXT:    [[I3:%.*]] = alloca i32, align 4
 370 // CHECK1-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 371 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 372 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 373 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 374 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 375 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 376 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 377 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 378 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 379 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 380 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
 381 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 382 // CHECK1-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
 383 // CHECK1-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 384 // CHECK1-NEXT:    store i32 0, ptr [[I]], align 4
 385 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 386 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
 387 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
 388 // CHECK1:       omp.precond.then:
 389 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 390 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 391 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
 392 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 393 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 394 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 395 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
 396 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 397 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 398 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 399 // CHECK1-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
 400 // CHECK1-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 401 // CHECK1:       cond.true:
 402 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 403 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 404 // CHECK1:       cond.false:
 405 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 406 // CHECK1-NEXT:    br label [[COND_END]]
 407 // CHECK1:       cond.end:
 408 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
 409 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 410 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 411 // CHECK1-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
 412 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 413 // CHECK1:       omp.inner.for.cond:
 414 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 415 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 416 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 417 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 418 // CHECK1:       omp.inner.for.body:
 419 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 420 // CHECK1-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
 421 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 422 // CHECK1-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
 423 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
 424 // CHECK1-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4
 425 // CHECK1-NEXT:    [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8
 426 // CHECK1-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 427 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], ptr [[TMP20]])
 428 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 429 // CHECK1:       omp.inner.for.inc:
 430 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 431 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 432 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
 433 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 434 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 435 // CHECK1:       omp.inner.for.end:
 436 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 437 // CHECK1:       omp.loop.exit:
 438 // CHECK1-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 439 // CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
 440 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
 441 // CHECK1-NEXT:    br label [[OMP_PRECOND_END]]
 442 // CHECK1:       omp.precond.end:
 443 // CHECK1-NEXT:    ret void
 444 //
 445 //
 446 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined.omp_outlined
 447 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
 448 // CHECK1-NEXT:  entry:
 449 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 450 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 451 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 452 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 453 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 454 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 455 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 456 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 457 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 458 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 459 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 460 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 461 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 462 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 463 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 464 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 465 // CHECK1-NEXT:    [[I4:%.*]] = alloca i32, align 4
 466 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 467 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 468 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 469 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 470 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 471 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 472 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 473 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 474 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 475 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 476 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 477 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
 478 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 479 // CHECK1-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
 480 // CHECK1-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 481 // CHECK1-NEXT:    store i32 0, ptr [[I]], align 4
 482 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 483 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
 484 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
 485 // CHECK1:       omp.precond.then:
 486 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 487 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 488 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
 489 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 490 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
 491 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 492 // CHECK1-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
 493 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 494 // CHECK1-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
 495 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 496 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 497 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 498 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
 499 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 500 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 501 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 502 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
 503 // CHECK1-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 504 // CHECK1:       cond.true:
 505 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 506 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 507 // CHECK1:       cond.false:
 508 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 509 // CHECK1-NEXT:    br label [[COND_END]]
 510 // CHECK1:       cond.end:
 511 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
 512 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 513 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 514 // CHECK1-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
 515 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 516 // CHECK1:       omp.inner.for.cond:
 517 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 518 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 519 // CHECK1-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
 520 // CHECK1-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 521 // CHECK1:       omp.inner.for.body:
 522 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 523 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
 524 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 525 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
 526 // CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 527 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 0
 528 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
 529 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4
 530 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
 531 // CHECK1-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
 532 // CHECK1-NEXT:    store i32 [[TMP18]], ptr [[ARRAYIDX7]], align 4
 533 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 534 // CHECK1:       omp.body.continue:
 535 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 536 // CHECK1:       omp.inner.for.inc:
 537 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 538 // CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
 539 // CHECK1-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
 540 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 541 // CHECK1:       omp.inner.for.end:
 542 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 543 // CHECK1:       omp.loop.exit:
 544 // CHECK1-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 545 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
 546 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
 547 // CHECK1-NEXT:    br label [[OMP_PRECOND_END]]
 548 // CHECK1:       omp.precond.end:
 549 // CHECK1-NEXT:    ret void
 550 //
 551 //
 552 // CHECK2-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
 553 // CHECK2-SAME: (ptr noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
 554 // CHECK2-NEXT:  entry:
 555 // CHECK2-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 556 // CHECK2-NEXT:    [[N:%.*]] = alloca i32, align 4
 557 // CHECK2-NEXT:    [[A:%.*]] = alloca [1000 x i32], align 4
 558 // CHECK2-NEXT:    [[TE:%.*]] = alloca i32, align 4
 559 // CHECK2-NEXT:    [[TH:%.*]] = alloca i32, align 4
 560 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 561 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 562 // CHECK2-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 563 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
 564 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8
 565 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8
 566 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8
 567 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8
 568 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 569 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
 570 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
 571 // CHECK2-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 572 // CHECK2-NEXT:    [[N_CASTED7:%.*]] = alloca i64, align 8
 573 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x ptr], align 8
 574 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x ptr], align 8
 575 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x ptr], align 8
 576 // CHECK2-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
 577 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
 578 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
 579 // CHECK2-NEXT:    [[KERNEL_ARGS18:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 580 // CHECK2-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 581 // CHECK2-NEXT:    store i32 1000, ptr [[N]], align 4
 582 // CHECK2-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
 583 // CHECK2-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
 584 // CHECK2-NEXT:    store i32 [[DIV]], ptr [[TE]], align 4
 585 // CHECK2-NEXT:    store i32 128, ptr [[TH]], align 4
 586 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TE]], align 4
 587 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 588 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TH]], align 4
 589 // CHECK2-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 590 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
 591 // CHECK2-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 4
 592 // CHECK2-NEXT:    [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
 593 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 594 // CHECK2-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
 595 // CHECK2-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
 596 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 597 // CHECK2-NEXT:    store i32 [[TMP7]], ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4
 598 // CHECK2-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED2]], align 8
 599 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 600 // CHECK2-NEXT:    store i64 [[TMP4]], ptr [[TMP9]], align 8
 601 // CHECK2-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 602 // CHECK2-NEXT:    store i64 [[TMP4]], ptr [[TMP10]], align 8
 603 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 604 // CHECK2-NEXT:    store ptr null, ptr [[TMP11]], align 8
 605 // CHECK2-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 606 // CHECK2-NEXT:    store ptr [[A]], ptr [[TMP12]], align 8
 607 // CHECK2-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 608 // CHECK2-NEXT:    store ptr [[A]], ptr [[TMP13]], align 8
 609 // CHECK2-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
 610 // CHECK2-NEXT:    store ptr null, ptr [[TMP14]], align 8
 611 // CHECK2-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
 612 // CHECK2-NEXT:    store i64 [[TMP6]], ptr [[TMP15]], align 8
 613 // CHECK2-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
 614 // CHECK2-NEXT:    store i64 [[TMP6]], ptr [[TMP16]], align 8
 615 // CHECK2-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
 616 // CHECK2-NEXT:    store ptr null, ptr [[TMP17]], align 8
 617 // CHECK2-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
 618 // CHECK2-NEXT:    store i64 [[TMP8]], ptr [[TMP18]], align 8
 619 // CHECK2-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
 620 // CHECK2-NEXT:    store i64 [[TMP8]], ptr [[TMP19]], align 8
 621 // CHECK2-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
 622 // CHECK2-NEXT:    store ptr null, ptr [[TMP20]], align 8
 623 // CHECK2-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 624 // CHECK2-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 625 // CHECK2-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 626 // CHECK2-NEXT:    [[TMP24:%.*]] = load i32, ptr [[N]], align 4
 627 // CHECK2-NEXT:    store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_3]], align 4
 628 // CHECK2-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
 629 // CHECK2-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP25]], 0
 630 // CHECK2-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB]], 1
 631 // CHECK2-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1
 632 // CHECK2-NEXT:    store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_4]], align 4
 633 // CHECK2-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
 634 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP26]], 1
 635 // CHECK2-NEXT:    [[TMP27:%.*]] = zext i32 [[ADD]] to i64
 636 // CHECK2-NEXT:    [[TMP28:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP23]], 0
 637 // CHECK2-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 638 // CHECK2-NEXT:    store i32 3, ptr [[TMP29]], align 4
 639 // CHECK2-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 640 // CHECK2-NEXT:    store i32 4, ptr [[TMP30]], align 4
 641 // CHECK2-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 642 // CHECK2-NEXT:    store ptr [[TMP21]], ptr [[TMP31]], align 8
 643 // CHECK2-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 644 // CHECK2-NEXT:    store ptr [[TMP22]], ptr [[TMP32]], align 8
 645 // CHECK2-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 646 // CHECK2-NEXT:    store ptr @.offload_sizes, ptr [[TMP33]], align 8
 647 // CHECK2-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 648 // CHECK2-NEXT:    store ptr @.offload_maptypes, ptr [[TMP34]], align 8
 649 // CHECK2-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 650 // CHECK2-NEXT:    store ptr null, ptr [[TMP35]], align 8
 651 // CHECK2-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 652 // CHECK2-NEXT:    store ptr null, ptr [[TMP36]], align 8
 653 // CHECK2-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 654 // CHECK2-NEXT:    store i64 [[TMP27]], ptr [[TMP37]], align 8
 655 // CHECK2-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 656 // CHECK2-NEXT:    store i64 0, ptr [[TMP38]], align 8
 657 // CHECK2-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 658 // CHECK2-NEXT:    store [3 x i32] [i32 -1, i32 0, i32 0], ptr [[TMP39]], align 4
 659 // CHECK2-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 660 // CHECK2-NEXT:    store [3 x i32] [[TMP28]], ptr [[TMP40]], align 4
 661 // CHECK2-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 662 // CHECK2-NEXT:    store i32 0, ptr [[TMP41]], align 4
 663 // CHECK2-NEXT:    [[TMP42:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 -1, i32 [[TMP23]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.region_id, ptr [[KERNEL_ARGS]])
 664 // CHECK2-NEXT:    [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
 665 // CHECK2-NEXT:    br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 666 // CHECK2:       omp_offload.failed:
 667 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i64 [[TMP4]], ptr [[A]], i64 [[TMP6]], i64 [[TMP8]]) #[[ATTR2:[0-9]+]]
 668 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 669 // CHECK2:       omp_offload.cont:
 670 // CHECK2-NEXT:    [[TMP44:%.*]] = load i32, ptr [[N]], align 4
 671 // CHECK2-NEXT:    store i32 [[TMP44]], ptr [[N_CASTED7]], align 4
 672 // CHECK2-NEXT:    [[TMP45:%.*]] = load i64, ptr [[N_CASTED7]], align 8
 673 // CHECK2-NEXT:    [[TMP46:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 674 // CHECK2-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
 675 // CHECK2-NEXT:    store i64 [[TMP45]], ptr [[TMP47]], align 8
 676 // CHECK2-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
 677 // CHECK2-NEXT:    store i64 [[TMP45]], ptr [[TMP48]], align 8
 678 // CHECK2-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
 679 // CHECK2-NEXT:    store ptr null, ptr [[TMP49]], align 8
 680 // CHECK2-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
 681 // CHECK2-NEXT:    store ptr [[A]], ptr [[TMP50]], align 8
 682 // CHECK2-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
 683 // CHECK2-NEXT:    store ptr [[A]], ptr [[TMP51]], align 8
 684 // CHECK2-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
 685 // CHECK2-NEXT:    store ptr null, ptr [[TMP52]], align 8
 686 // CHECK2-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2
 687 // CHECK2-NEXT:    store ptr [[TMP46]], ptr [[TMP53]], align 8
 688 // CHECK2-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 2
 689 // CHECK2-NEXT:    store ptr [[TMP46]], ptr [[TMP54]], align 8
 690 // CHECK2-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 2
 691 // CHECK2-NEXT:    store ptr null, ptr [[TMP55]], align 8
 692 // CHECK2-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
 693 // CHECK2-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
 694 // CHECK2-NEXT:    [[TMP58:%.*]] = load i32, ptr [[N]], align 4
 695 // CHECK2-NEXT:    store i32 [[TMP58]], ptr [[DOTCAPTURE_EXPR_12]], align 4
 696 // CHECK2-NEXT:    [[TMP59:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4
 697 // CHECK2-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[TMP59]], 0
 698 // CHECK2-NEXT:    [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
 699 // CHECK2-NEXT:    [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1
 700 // CHECK2-NEXT:    store i32 [[SUB16]], ptr [[DOTCAPTURE_EXPR_13]], align 4
 701 // CHECK2-NEXT:    [[TMP60:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4
 702 // CHECK2-NEXT:    [[ADD17:%.*]] = add nsw i32 [[TMP60]], 1
 703 // CHECK2-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD17]] to i64
 704 // CHECK2-NEXT:    [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 0
 705 // CHECK2-NEXT:    store i32 3, ptr [[TMP62]], align 4
 706 // CHECK2-NEXT:    [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 1
 707 // CHECK2-NEXT:    store i32 3, ptr [[TMP63]], align 4
 708 // CHECK2-NEXT:    [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 2
 709 // CHECK2-NEXT:    store ptr [[TMP56]], ptr [[TMP64]], align 8
 710 // CHECK2-NEXT:    [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 3
 711 // CHECK2-NEXT:    store ptr [[TMP57]], ptr [[TMP65]], align 8
 712 // CHECK2-NEXT:    [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 4
 713 // CHECK2-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP66]], align 8
 714 // CHECK2-NEXT:    [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 5
 715 // CHECK2-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP67]], align 8
 716 // CHECK2-NEXT:    [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 6
 717 // CHECK2-NEXT:    store ptr null, ptr [[TMP68]], align 8
 718 // CHECK2-NEXT:    [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 7
 719 // CHECK2-NEXT:    store ptr null, ptr [[TMP69]], align 8
 720 // CHECK2-NEXT:    [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 8
 721 // CHECK2-NEXT:    store i64 [[TMP61]], ptr [[TMP70]], align 8
 722 // CHECK2-NEXT:    [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 9
 723 // CHECK2-NEXT:    store i64 0, ptr [[TMP71]], align 8
 724 // CHECK2-NEXT:    [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 10
 725 // CHECK2-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP72]], align 4
 726 // CHECK2-NEXT:    [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 11
 727 // CHECK2-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP73]], align 4
 728 // CHECK2-NEXT:    [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 12
 729 // CHECK2-NEXT:    store i32 0, ptr [[TMP74]], align 4
 730 // CHECK2-NEXT:    [[TMP75:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.region_id, ptr [[KERNEL_ARGS18]])
 731 // CHECK2-NEXT:    [[TMP76:%.*]] = icmp ne i32 [[TMP75]], 0
 732 // CHECK2-NEXT:    br i1 [[TMP76]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]]
 733 // CHECK2:       omp_offload.failed19:
 734 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57(i64 [[TMP45]], ptr [[A]], ptr [[TMP46]]) #[[ATTR2]]
 735 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT20]]
 736 // CHECK2:       omp_offload.cont20:
 737 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i64 0, i64 0
 738 // CHECK2-NEXT:    [[TMP77:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
 739 // CHECK2-NEXT:    ret i32 [[TMP77]]
 740 //
 741 //
 742 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51
 743 // CHECK2-SAME: (i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
 744 // CHECK2-NEXT:  entry:
 745 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 746 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 747 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
 748 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
 749 // CHECK2-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 750 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])
 751 // CHECK2-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 752 // CHECK2-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 753 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
 754 // CHECK2-NEXT:    store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8
 755 // CHECK2-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 756 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
 757 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
 758 // CHECK2-NEXT:    call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
 759 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4
 760 // CHECK2-NEXT:    store i32 [[TMP4]], ptr [[N_CASTED]], align 4
 761 // CHECK2-NEXT:    [[TMP5:%.*]] = load i64, ptr [[N_CASTED]], align 8
 762 // CHECK2-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined, i64 [[TMP5]], ptr [[TMP1]])
 763 // CHECK2-NEXT:    ret void
 764 //
 765 //
 766 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined
 767 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
 768 // CHECK2-NEXT:  entry:
 769 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 770 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 771 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 772 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 773 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 774 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 775 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 776 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 777 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
 778 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 779 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 780 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 781 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 782 // CHECK2-NEXT:    [[I3:%.*]] = alloca i32, align 4
 783 // CHECK2-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 784 // CHECK2-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 785 // CHECK2-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 786 // CHECK2-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 787 // CHECK2-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 788 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 789 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 790 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 791 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 792 // CHECK2-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
 793 // CHECK2-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 794 // CHECK2-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
 795 // CHECK2-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 796 // CHECK2-NEXT:    store i32 0, ptr [[I]], align 4
 797 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 798 // CHECK2-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
 799 // CHECK2-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
 800 // CHECK2:       omp.precond.then:
 801 // CHECK2-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 802 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 803 // CHECK2-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
 804 // CHECK2-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 805 // CHECK2-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 806 // CHECK2-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 807 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
 808 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 809 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 810 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 811 // CHECK2-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
 812 // CHECK2-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 813 // CHECK2:       cond.true:
 814 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 815 // CHECK2-NEXT:    br label [[COND_END:%.*]]
 816 // CHECK2:       cond.false:
 817 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 818 // CHECK2-NEXT:    br label [[COND_END]]
 819 // CHECK2:       cond.end:
 820 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
 821 // CHECK2-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 822 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 823 // CHECK2-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
 824 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 825 // CHECK2:       omp.inner.for.cond:
 826 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 827 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 828 // CHECK2-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 829 // CHECK2-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 830 // CHECK2:       omp.inner.for.body:
 831 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 832 // CHECK2-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
 833 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 834 // CHECK2-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
 835 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
 836 // CHECK2-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4
 837 // CHECK2-NEXT:    [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8
 838 // CHECK2-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]])
 839 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 840 // CHECK2:       omp.inner.for.inc:
 841 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 842 // CHECK2-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 843 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
 844 // CHECK2-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 845 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
 846 // CHECK2:       omp.inner.for.end:
 847 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 848 // CHECK2:       omp.loop.exit:
 849 // CHECK2-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 850 // CHECK2-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
 851 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
 852 // CHECK2-NEXT:    br label [[OMP_PRECOND_END]]
 853 // CHECK2:       omp.precond.end:
 854 // CHECK2-NEXT:    ret void
 855 //
 856 //
 857 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined
 858 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
 859 // CHECK2-NEXT:  entry:
 860 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 861 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 862 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 863 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 864 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 865 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 866 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 867 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 868 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 869 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 870 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
 871 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 872 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 873 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 874 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 875 // CHECK2-NEXT:    [[I4:%.*]] = alloca i32, align 4
 876 // CHECK2-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 877 // CHECK2-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 878 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 879 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 880 // CHECK2-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 881 // CHECK2-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 882 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 883 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 884 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 885 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 886 // CHECK2-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
 887 // CHECK2-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 888 // CHECK2-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
 889 // CHECK2-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 890 // CHECK2-NEXT:    store i32 0, ptr [[I]], align 4
 891 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 892 // CHECK2-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
 893 // CHECK2-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
 894 // CHECK2:       omp.precond.then:
 895 // CHECK2-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 896 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 897 // CHECK2-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
 898 // CHECK2-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 899 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
 900 // CHECK2-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 901 // CHECK2-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
 902 // CHECK2-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 903 // CHECK2-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
 904 // CHECK2-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 905 // CHECK2-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 906 // CHECK2-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 907 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
 908 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 909 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 910 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 911 // CHECK2-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
 912 // CHECK2-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 913 // CHECK2:       cond.true:
 914 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 915 // CHECK2-NEXT:    br label [[COND_END:%.*]]
 916 // CHECK2:       cond.false:
 917 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 918 // CHECK2-NEXT:    br label [[COND_END]]
 919 // CHECK2:       cond.end:
 920 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
 921 // CHECK2-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 922 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 923 // CHECK2-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
 924 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 925 // CHECK2:       omp.inner.for.cond:
 926 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 927 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 928 // CHECK2-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
 929 // CHECK2-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 930 // CHECK2:       omp.inner.for.body:
 931 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 932 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
 933 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 934 // CHECK2-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
 935 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I4]], align 4
 936 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
 937 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
 938 // CHECK2-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
 939 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 940 // CHECK2:       omp.body.continue:
 941 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 942 // CHECK2:       omp.inner.for.inc:
 943 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 944 // CHECK2-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP18]], 1
 945 // CHECK2-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
 946 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
 947 // CHECK2:       omp.inner.for.end:
 948 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 949 // CHECK2:       omp.loop.exit:
 950 // CHECK2-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 951 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
 952 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP20]])
 953 // CHECK2-NEXT:    br label [[OMP_PRECOND_END]]
 954 // CHECK2:       omp.precond.end:
 955 // CHECK2-NEXT:    ret void
 956 //
 957 //
 958 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57
 959 // CHECK2-SAME: (i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
 960 // CHECK2-NEXT:  entry:
 961 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 962 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 963 // CHECK2-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 964 // CHECK2-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 965 // CHECK2-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 966 // CHECK2-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 967 // CHECK2-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 968 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 969 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 970 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[N_CASTED]], align 4
 971 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, ptr [[N_CASTED]], align 8
 972 // CHECK2-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 973 // CHECK2-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined, i64 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]])
 974 // CHECK2-NEXT:    ret void
 975 //
 976 //
 977 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined
 978 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
 979 // CHECK2-NEXT:  entry:
 980 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 981 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 982 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 983 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 984 // CHECK2-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 985 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 986 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 987 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 988 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 989 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
 990 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 991 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 992 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 993 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 994 // CHECK2-NEXT:    [[I3:%.*]] = alloca i32, align 4
 995 // CHECK2-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 996 // CHECK2-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 997 // CHECK2-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 998 // CHECK2-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 999 // CHECK2-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1000 // CHECK2-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
1001 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1002 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1003 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1004 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1005 // CHECK2-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1006 // CHECK2-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1007 // CHECK2-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1008 // CHECK2-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1009 // CHECK2-NEXT:    store i32 0, ptr [[I]], align 4
1010 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1011 // CHECK2-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1012 // CHECK2-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1013 // CHECK2:       omp.precond.then:
1014 // CHECK2-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1015 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1016 // CHECK2-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
1017 // CHECK2-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1018 // CHECK2-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1019 // CHECK2-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1020 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1021 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1022 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1023 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1024 // CHECK2-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1025 // CHECK2-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1026 // CHECK2:       cond.true:
1027 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1028 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1029 // CHECK2:       cond.false:
1030 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1031 // CHECK2-NEXT:    br label [[COND_END]]
1032 // CHECK2:       cond.end:
1033 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1034 // CHECK2-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1035 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1036 // CHECK2-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1037 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1038 // CHECK2:       omp.inner.for.cond:
1039 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1040 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1041 // CHECK2-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1042 // CHECK2-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1043 // CHECK2:       omp.inner.for.body:
1044 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1045 // CHECK2-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1046 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1047 // CHECK2-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1048 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
1049 // CHECK2-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4
1050 // CHECK2-NEXT:    [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8
1051 // CHECK2-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[G_ADDR]], align 8
1052 // CHECK2-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], ptr [[TMP20]])
1053 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1054 // CHECK2:       omp.inner.for.inc:
1055 // CHECK2-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1056 // CHECK2-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1057 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1058 // CHECK2-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1059 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1060 // CHECK2:       omp.inner.for.end:
1061 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1062 // CHECK2:       omp.loop.exit:
1063 // CHECK2-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1064 // CHECK2-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
1065 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
1066 // CHECK2-NEXT:    br label [[OMP_PRECOND_END]]
1067 // CHECK2:       omp.precond.end:
1068 // CHECK2-NEXT:    ret void
1069 //
1070 //
1071 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined.omp_outlined
1072 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
1073 // CHECK2-NEXT:  entry:
1074 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1075 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1076 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1077 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1078 // CHECK2-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
1079 // CHECK2-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1080 // CHECK2-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
1081 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1082 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1083 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1084 // CHECK2-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1085 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1086 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1087 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1088 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1089 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1090 // CHECK2-NEXT:    [[I4:%.*]] = alloca i32, align 4
1091 // CHECK2-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1092 // CHECK2-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1093 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1094 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1095 // CHECK2-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
1096 // CHECK2-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1097 // CHECK2-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
1098 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1099 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1100 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1101 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1102 // CHECK2-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1103 // CHECK2-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1104 // CHECK2-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1105 // CHECK2-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1106 // CHECK2-NEXT:    store i32 0, ptr [[I]], align 4
1107 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1108 // CHECK2-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1109 // CHECK2-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1110 // CHECK2:       omp.precond.then:
1111 // CHECK2-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1112 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1113 // CHECK2-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
1114 // CHECK2-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1115 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
1116 // CHECK2-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1117 // CHECK2-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
1118 // CHECK2-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1119 // CHECK2-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
1120 // CHECK2-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1121 // CHECK2-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1122 // CHECK2-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1123 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1124 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1125 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1126 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1127 // CHECK2-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1128 // CHECK2-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1129 // CHECK2:       cond.true:
1130 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1131 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1132 // CHECK2:       cond.false:
1133 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1134 // CHECK2-NEXT:    br label [[COND_END]]
1135 // CHECK2:       cond.end:
1136 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1137 // CHECK2-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1138 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1139 // CHECK2-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1140 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1141 // CHECK2:       omp.inner.for.cond:
1142 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1143 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1144 // CHECK2-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1145 // CHECK2-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1146 // CHECK2:       omp.inner.for.body:
1147 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1148 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1149 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1150 // CHECK2-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
1151 // CHECK2-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 8
1152 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 0
1153 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
1154 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4
1155 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
1156 // CHECK2-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
1157 // CHECK2-NEXT:    store i32 [[TMP18]], ptr [[ARRAYIDX7]], align 4
1158 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1159 // CHECK2:       omp.body.continue:
1160 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1161 // CHECK2:       omp.inner.for.inc:
1162 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1163 // CHECK2-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
1164 // CHECK2-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
1165 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1166 // CHECK2:       omp.inner.for.end:
1167 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1168 // CHECK2:       omp.loop.exit:
1169 // CHECK2-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1170 // CHECK2-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1171 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
1172 // CHECK2-NEXT:    br label [[OMP_PRECOND_END]]
1173 // CHECK2:       omp.precond.end:
1174 // CHECK2-NEXT:    ret void
1175 //
1176 //
1177 // CHECK4-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
1178 // CHECK4-SAME: (ptr noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
1179 // CHECK4-NEXT:  entry:
1180 // CHECK4-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
1181 // CHECK4-NEXT:    [[N:%.*]] = alloca i32, align 4
1182 // CHECK4-NEXT:    [[A:%.*]] = alloca [1000 x i32], align 4
1183 // CHECK4-NEXT:    [[TE:%.*]] = alloca i32, align 4
1184 // CHECK4-NEXT:    [[TH:%.*]] = alloca i32, align 4
1185 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1186 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1187 // CHECK4-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
1188 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1189 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4
1190 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4
1191 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4
1192 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4
1193 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1194 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1195 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1196 // CHECK4-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1197 // CHECK4-NEXT:    [[N_CASTED7:%.*]] = alloca i32, align 4
1198 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x ptr], align 4
1199 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x ptr], align 4
1200 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x ptr], align 4
1201 // CHECK4-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
1202 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
1203 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
1204 // CHECK4-NEXT:    [[KERNEL_ARGS18:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1205 // CHECK4-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
1206 // CHECK4-NEXT:    store i32 1000, ptr [[N]], align 4
1207 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
1208 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1209 // CHECK4-NEXT:    store i32 [[DIV]], ptr [[TE]], align 4
1210 // CHECK4-NEXT:    store i32 128, ptr [[TH]], align 4
1211 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TE]], align 4
1212 // CHECK4-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1213 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TH]], align 4
1214 // CHECK4-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1215 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
1216 // CHECK4-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 4
1217 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 4
1218 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1219 // CHECK4-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
1220 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
1221 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1222 // CHECK4-NEXT:    store i32 [[TMP7]], ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4
1223 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4
1224 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1225 // CHECK4-NEXT:    store i32 [[TMP4]], ptr [[TMP9]], align 4
1226 // CHECK4-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1227 // CHECK4-NEXT:    store i32 [[TMP4]], ptr [[TMP10]], align 4
1228 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1229 // CHECK4-NEXT:    store ptr null, ptr [[TMP11]], align 4
1230 // CHECK4-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1231 // CHECK4-NEXT:    store ptr [[A]], ptr [[TMP12]], align 4
1232 // CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1233 // CHECK4-NEXT:    store ptr [[A]], ptr [[TMP13]], align 4
1234 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1235 // CHECK4-NEXT:    store ptr null, ptr [[TMP14]], align 4
1236 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1237 // CHECK4-NEXT:    store i32 [[TMP6]], ptr [[TMP15]], align 4
1238 // CHECK4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1239 // CHECK4-NEXT:    store i32 [[TMP6]], ptr [[TMP16]], align 4
1240 // CHECK4-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1241 // CHECK4-NEXT:    store ptr null, ptr [[TMP17]], align 4
1242 // CHECK4-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1243 // CHECK4-NEXT:    store i32 [[TMP8]], ptr [[TMP18]], align 4
1244 // CHECK4-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1245 // CHECK4-NEXT:    store i32 [[TMP8]], ptr [[TMP19]], align 4
1246 // CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1247 // CHECK4-NEXT:    store ptr null, ptr [[TMP20]], align 4
1248 // CHECK4-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1249 // CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1250 // CHECK4-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1251 // CHECK4-NEXT:    [[TMP24:%.*]] = load i32, ptr [[N]], align 4
1252 // CHECK4-NEXT:    store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_3]], align 4
1253 // CHECK4-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
1254 // CHECK4-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP25]], 0
1255 // CHECK4-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB]], 1
1256 // CHECK4-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1
1257 // CHECK4-NEXT:    store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_4]], align 4
1258 // CHECK4-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1259 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP26]], 1
1260 // CHECK4-NEXT:    [[TMP27:%.*]] = zext i32 [[ADD]] to i64
1261 // CHECK4-NEXT:    [[TMP28:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP23]], 0
1262 // CHECK4-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1263 // CHECK4-NEXT:    store i32 3, ptr [[TMP29]], align 4
1264 // CHECK4-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1265 // CHECK4-NEXT:    store i32 4, ptr [[TMP30]], align 4
1266 // CHECK4-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1267 // CHECK4-NEXT:    store ptr [[TMP21]], ptr [[TMP31]], align 4
1268 // CHECK4-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1269 // CHECK4-NEXT:    store ptr [[TMP22]], ptr [[TMP32]], align 4
1270 // CHECK4-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1271 // CHECK4-NEXT:    store ptr @.offload_sizes, ptr [[TMP33]], align 4
1272 // CHECK4-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1273 // CHECK4-NEXT:    store ptr @.offload_maptypes, ptr [[TMP34]], align 4
1274 // CHECK4-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1275 // CHECK4-NEXT:    store ptr null, ptr [[TMP35]], align 4
1276 // CHECK4-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1277 // CHECK4-NEXT:    store ptr null, ptr [[TMP36]], align 4
1278 // CHECK4-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1279 // CHECK4-NEXT:    store i64 [[TMP27]], ptr [[TMP37]], align 8
1280 // CHECK4-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1281 // CHECK4-NEXT:    store i64 0, ptr [[TMP38]], align 8
1282 // CHECK4-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1283 // CHECK4-NEXT:    store [3 x i32] [i32 -1, i32 0, i32 0], ptr [[TMP39]], align 4
1284 // CHECK4-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1285 // CHECK4-NEXT:    store [3 x i32] [[TMP28]], ptr [[TMP40]], align 4
1286 // CHECK4-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1287 // CHECK4-NEXT:    store i32 0, ptr [[TMP41]], align 4
1288 // CHECK4-NEXT:    [[TMP42:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 -1, i32 [[TMP23]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.region_id, ptr [[KERNEL_ARGS]])
1289 // CHECK4-NEXT:    [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0
1290 // CHECK4-NEXT:    br i1 [[TMP43]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1291 // CHECK4:       omp_offload.failed:
1292 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51(i32 [[TMP4]], ptr [[A]], i32 [[TMP6]], i32 [[TMP8]]) #[[ATTR2:[0-9]+]]
1293 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1294 // CHECK4:       omp_offload.cont:
1295 // CHECK4-NEXT:    [[TMP44:%.*]] = load i32, ptr [[N]], align 4
1296 // CHECK4-NEXT:    store i32 [[TMP44]], ptr [[N_CASTED7]], align 4
1297 // CHECK4-NEXT:    [[TMP45:%.*]] = load i32, ptr [[N_CASTED7]], align 4
1298 // CHECK4-NEXT:    [[TMP46:%.*]] = load ptr, ptr [[G_ADDR]], align 4
1299 // CHECK4-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
1300 // CHECK4-NEXT:    store i32 [[TMP45]], ptr [[TMP47]], align 4
1301 // CHECK4-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
1302 // CHECK4-NEXT:    store i32 [[TMP45]], ptr [[TMP48]], align 4
1303 // CHECK4-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
1304 // CHECK4-NEXT:    store ptr null, ptr [[TMP49]], align 4
1305 // CHECK4-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
1306 // CHECK4-NEXT:    store ptr [[A]], ptr [[TMP50]], align 4
1307 // CHECK4-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
1308 // CHECK4-NEXT:    store ptr [[A]], ptr [[TMP51]], align 4
1309 // CHECK4-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
1310 // CHECK4-NEXT:    store ptr null, ptr [[TMP52]], align 4
1311 // CHECK4-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2
1312 // CHECK4-NEXT:    store ptr [[TMP46]], ptr [[TMP53]], align 4
1313 // CHECK4-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 2
1314 // CHECK4-NEXT:    store ptr [[TMP46]], ptr [[TMP54]], align 4
1315 // CHECK4-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 2
1316 // CHECK4-NEXT:    store ptr null, ptr [[TMP55]], align 4
1317 // CHECK4-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
1318 // CHECK4-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
1319 // CHECK4-NEXT:    [[TMP58:%.*]] = load i32, ptr [[N]], align 4
1320 // CHECK4-NEXT:    store i32 [[TMP58]], ptr [[DOTCAPTURE_EXPR_12]], align 4
1321 // CHECK4-NEXT:    [[TMP59:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4
1322 // CHECK4-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[TMP59]], 0
1323 // CHECK4-NEXT:    [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
1324 // CHECK4-NEXT:    [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1
1325 // CHECK4-NEXT:    store i32 [[SUB16]], ptr [[DOTCAPTURE_EXPR_13]], align 4
1326 // CHECK4-NEXT:    [[TMP60:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4
1327 // CHECK4-NEXT:    [[ADD17:%.*]] = add nsw i32 [[TMP60]], 1
1328 // CHECK4-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD17]] to i64
1329 // CHECK4-NEXT:    [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 0
1330 // CHECK4-NEXT:    store i32 3, ptr [[TMP62]], align 4
1331 // CHECK4-NEXT:    [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 1
1332 // CHECK4-NEXT:    store i32 3, ptr [[TMP63]], align 4
1333 // CHECK4-NEXT:    [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 2
1334 // CHECK4-NEXT:    store ptr [[TMP56]], ptr [[TMP64]], align 4
1335 // CHECK4-NEXT:    [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 3
1336 // CHECK4-NEXT:    store ptr [[TMP57]], ptr [[TMP65]], align 4
1337 // CHECK4-NEXT:    [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 4
1338 // CHECK4-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP66]], align 4
1339 // CHECK4-NEXT:    [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 5
1340 // CHECK4-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP67]], align 4
1341 // CHECK4-NEXT:    [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 6
1342 // CHECK4-NEXT:    store ptr null, ptr [[TMP68]], align 4
1343 // CHECK4-NEXT:    [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 7
1344 // CHECK4-NEXT:    store ptr null, ptr [[TMP69]], align 4
1345 // CHECK4-NEXT:    [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 8
1346 // CHECK4-NEXT:    store i64 [[TMP61]], ptr [[TMP70]], align 8
1347 // CHECK4-NEXT:    [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 9
1348 // CHECK4-NEXT:    store i64 0, ptr [[TMP71]], align 8
1349 // CHECK4-NEXT:    [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 10
1350 // CHECK4-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP72]], align 4
1351 // CHECK4-NEXT:    [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 11
1352 // CHECK4-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP73]], align 4
1353 // CHECK4-NEXT:    [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 12
1354 // CHECK4-NEXT:    store i32 0, ptr [[TMP74]], align 4
1355 // CHECK4-NEXT:    [[TMP75:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.region_id, ptr [[KERNEL_ARGS18]])
1356 // CHECK4-NEXT:    [[TMP76:%.*]] = icmp ne i32 [[TMP75]], 0
1357 // CHECK4-NEXT:    br i1 [[TMP76]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]]
1358 // CHECK4:       omp_offload.failed19:
1359 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57(i32 [[TMP45]], ptr [[A]], ptr [[TMP46]]) #[[ATTR2]]
1360 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT20]]
1361 // CHECK4:       omp_offload.cont20:
1362 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i32 0, i32 0
1363 // CHECK4-NEXT:    [[TMP77:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
1364 // CHECK4-NEXT:    ret i32 [[TMP77]]
1365 //
1366 //
1367 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51
1368 // CHECK4-SAME: (i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
1369 // CHECK4-NEXT:  entry:
1370 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1371 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1372 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1373 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
1374 // CHECK4-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
1375 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])
1376 // CHECK4-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1377 // CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1378 // CHECK4-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
1379 // CHECK4-NEXT:    store i32 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
1380 // CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1381 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
1382 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
1383 // CHECK4-NEXT:    call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
1384 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4
1385 // CHECK4-NEXT:    store i32 [[TMP4]], ptr [[N_CASTED]], align 4
1386 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4
1387 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined, i32 [[TMP5]], ptr [[TMP1]])
1388 // CHECK4-NEXT:    ret void
1389 //
1390 //
1391 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined
1392 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
1393 // CHECK4-NEXT:  entry:
1394 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1395 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1396 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1397 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1398 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1399 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1400 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1401 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1402 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
1403 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1404 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1405 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1406 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1407 // CHECK4-NEXT:    [[I3:%.*]] = alloca i32, align 4
1408 // CHECK4-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
1409 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1410 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1411 // CHECK4-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1412 // CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1413 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1414 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1415 // CHECK4-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1416 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1417 // CHECK4-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1418 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1419 // CHECK4-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1420 // CHECK4-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1421 // CHECK4-NEXT:    store i32 0, ptr [[I]], align 4
1422 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1423 // CHECK4-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1424 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1425 // CHECK4:       omp.precond.then:
1426 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1427 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1428 // CHECK4-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
1429 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1430 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1431 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1432 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1433 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1434 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1435 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1436 // CHECK4-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1437 // CHECK4-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1438 // CHECK4:       cond.true:
1439 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1440 // CHECK4-NEXT:    br label [[COND_END:%.*]]
1441 // CHECK4:       cond.false:
1442 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1443 // CHECK4-NEXT:    br label [[COND_END]]
1444 // CHECK4:       cond.end:
1445 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1446 // CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1447 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1448 // CHECK4-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1449 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1450 // CHECK4:       omp.inner.for.cond:
1451 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1452 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1453 // CHECK4-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1454 // CHECK4-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1455 // CHECK4:       omp.inner.for.body:
1456 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1457 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1458 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4
1459 // CHECK4-NEXT:    store i32 [[TMP16]], ptr [[N_CASTED]], align 4
1460 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4
1461 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], ptr [[TMP0]])
1462 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1463 // CHECK4:       omp.inner.for.inc:
1464 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1465 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1466 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1467 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1468 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
1469 // CHECK4:       omp.inner.for.end:
1470 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1471 // CHECK4:       omp.loop.exit:
1472 // CHECK4-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1473 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
1474 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
1475 // CHECK4-NEXT:    br label [[OMP_PRECOND_END]]
1476 // CHECK4:       omp.precond.end:
1477 // CHECK4-NEXT:    ret void
1478 //
1479 //
1480 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined
1481 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
1482 // CHECK4-NEXT:  entry:
1483 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1484 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1485 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1486 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1487 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1488 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1489 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1490 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1491 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1492 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1493 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
1494 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1495 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1496 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1497 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1498 // CHECK4-NEXT:    [[I3:%.*]] = alloca i32, align 4
1499 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1500 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1501 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1502 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1503 // CHECK4-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1504 // CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1505 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1506 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1507 // CHECK4-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1508 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1509 // CHECK4-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1510 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1511 // CHECK4-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1512 // CHECK4-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1513 // CHECK4-NEXT:    store i32 0, ptr [[I]], align 4
1514 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1515 // CHECK4-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1516 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1517 // CHECK4:       omp.precond.then:
1518 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1519 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1520 // CHECK4-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
1521 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1522 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1523 // CHECK4-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4
1524 // CHECK4-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
1525 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1526 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1527 // CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1528 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1529 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1530 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1531 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1532 // CHECK4-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1533 // CHECK4-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1534 // CHECK4:       cond.true:
1535 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1536 // CHECK4-NEXT:    br label [[COND_END:%.*]]
1537 // CHECK4:       cond.false:
1538 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1539 // CHECK4-NEXT:    br label [[COND_END]]
1540 // CHECK4:       cond.end:
1541 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1542 // CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1543 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1544 // CHECK4-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1545 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1546 // CHECK4:       omp.inner.for.cond:
1547 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1548 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1549 // CHECK4-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1550 // CHECK4-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1551 // CHECK4:       omp.inner.for.body:
1552 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1553 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1554 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1555 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
1556 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I3]], align 4
1557 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP17]]
1558 // CHECK4-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
1559 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1560 // CHECK4:       omp.body.continue:
1561 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1562 // CHECK4:       omp.inner.for.inc:
1563 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1564 // CHECK4-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
1565 // CHECK4-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
1566 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
1567 // CHECK4:       omp.inner.for.end:
1568 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1569 // CHECK4:       omp.loop.exit:
1570 // CHECK4-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1571 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
1572 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP20]])
1573 // CHECK4-NEXT:    br label [[OMP_PRECOND_END]]
1574 // CHECK4:       omp.precond.end:
1575 // CHECK4-NEXT:    ret void
1576 //
1577 //
1578 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57
1579 // CHECK4-SAME: (i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
1580 // CHECK4-NEXT:  entry:
1581 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1582 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1583 // CHECK4-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
1584 // CHECK4-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
1585 // CHECK4-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1586 // CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1587 // CHECK4-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
1588 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1589 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1590 // CHECK4-NEXT:    store i32 [[TMP1]], ptr [[N_CASTED]], align 4
1591 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_CASTED]], align 4
1592 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 4
1593 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined, i32 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]])
1594 // CHECK4-NEXT:    ret void
1595 //
1596 //
1597 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined
1598 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
1599 // CHECK4-NEXT:  entry:
1600 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1601 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1602 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1603 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1604 // CHECK4-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
1605 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1606 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1607 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1608 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1609 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
1610 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1611 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1612 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1613 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1614 // CHECK4-NEXT:    [[I3:%.*]] = alloca i32, align 4
1615 // CHECK4-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
1616 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1617 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1618 // CHECK4-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1619 // CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1620 // CHECK4-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
1621 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1622 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1623 // CHECK4-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1624 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1625 // CHECK4-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1626 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1627 // CHECK4-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1628 // CHECK4-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1629 // CHECK4-NEXT:    store i32 0, ptr [[I]], align 4
1630 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1631 // CHECK4-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1632 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1633 // CHECK4:       omp.precond.then:
1634 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1635 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1636 // CHECK4-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
1637 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1638 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1639 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1640 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1641 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1642 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1643 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1644 // CHECK4-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1645 // CHECK4-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1646 // CHECK4:       cond.true:
1647 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1648 // CHECK4-NEXT:    br label [[COND_END:%.*]]
1649 // CHECK4:       cond.false:
1650 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1651 // CHECK4-NEXT:    br label [[COND_END]]
1652 // CHECK4:       cond.end:
1653 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1654 // CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1655 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1656 // CHECK4-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1657 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1658 // CHECK4:       omp.inner.for.cond:
1659 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1660 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1661 // CHECK4-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1662 // CHECK4-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1663 // CHECK4:       omp.inner.for.body:
1664 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1665 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1666 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4
1667 // CHECK4-NEXT:    store i32 [[TMP16]], ptr [[N_CASTED]], align 4
1668 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4
1669 // CHECK4-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[G_ADDR]], align 4
1670 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], ptr [[TMP0]], ptr [[TMP18]])
1671 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1672 // CHECK4:       omp.inner.for.inc:
1673 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1674 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1675 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1676 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1677 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
1678 // CHECK4:       omp.inner.for.end:
1679 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1680 // CHECK4:       omp.loop.exit:
1681 // CHECK4-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1682 // CHECK4-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1683 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
1684 // CHECK4-NEXT:    br label [[OMP_PRECOND_END]]
1685 // CHECK4:       omp.precond.end:
1686 // CHECK4-NEXT:    ret void
1687 //
1688 //
1689 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined.omp_outlined
1690 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
1691 // CHECK4-NEXT:  entry:
1692 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1693 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1694 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1695 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1696 // CHECK4-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1697 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1698 // CHECK4-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
1699 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1700 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1701 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1702 // CHECK4-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1703 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
1704 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1705 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1706 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1707 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1708 // CHECK4-NEXT:    [[I3:%.*]] = alloca i32, align 4
1709 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1710 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1711 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1712 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1713 // CHECK4-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1714 // CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1715 // CHECK4-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
1716 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1717 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1718 // CHECK4-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1719 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1720 // CHECK4-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1721 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1722 // CHECK4-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1723 // CHECK4-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1724 // CHECK4-NEXT:    store i32 0, ptr [[I]], align 4
1725 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1726 // CHECK4-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1727 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1728 // CHECK4:       omp.precond.then:
1729 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1730 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1731 // CHECK4-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
1732 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1733 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1734 // CHECK4-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4
1735 // CHECK4-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
1736 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1737 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1738 // CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1739 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1740 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1741 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1742 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1743 // CHECK4-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1744 // CHECK4-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1745 // CHECK4:       cond.true:
1746 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1747 // CHECK4-NEXT:    br label [[COND_END:%.*]]
1748 // CHECK4:       cond.false:
1749 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1750 // CHECK4-NEXT:    br label [[COND_END]]
1751 // CHECK4:       cond.end:
1752 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1753 // CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1754 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1755 // CHECK4-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1756 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1757 // CHECK4:       omp.inner.for.cond:
1758 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1759 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1760 // CHECK4-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1761 // CHECK4-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1762 // CHECK4:       omp.inner.for.body:
1763 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1764 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1765 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1766 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
1767 // CHECK4-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 4
1768 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 0
1769 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
1770 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I3]], align 4
1771 // CHECK4-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP19]]
1772 // CHECK4-NEXT:    store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4
1773 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1774 // CHECK4:       omp.body.continue:
1775 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1776 // CHECK4:       omp.inner.for.inc:
1777 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1778 // CHECK4-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
1779 // CHECK4-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
1780 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
1781 // CHECK4:       omp.inner.for.end:
1782 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1783 // CHECK4:       omp.loop.exit:
1784 // CHECK4-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1785 // CHECK4-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1786 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
1787 // CHECK4-NEXT:    br label [[OMP_PRECOND_END]]
1788 // CHECK4:       omp.precond.end:
1789 // CHECK4-NEXT:    ret void
1790 //
1791 //
1792 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51
1793 // CHECK10-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
1794 // CHECK10-NEXT:  entry:
1795 // CHECK10-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1796 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
1797 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1798 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1799 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
1800 // CHECK10-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
1801 // CHECK10-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3:[0-9]+]])
1802 // CHECK10-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1803 // CHECK10-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
1804 // CHECK10-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1805 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
1806 // CHECK10-NEXT:    store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8
1807 // CHECK10-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1808 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
1809 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
1810 // CHECK10-NEXT:    call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
1811 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4
1812 // CHECK10-NEXT:    store i32 [[TMP4]], ptr [[N_CASTED]], align 4
1813 // CHECK10-NEXT:    [[TMP5:%.*]] = load i64, ptr [[N_CASTED]], align 8
1814 // CHECK10-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined, i64 [[TMP5]], ptr [[TMP1]])
1815 // CHECK10-NEXT:    ret void
1816 //
1817 //
1818 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined
1819 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
1820 // CHECK10-NEXT:  entry:
1821 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1822 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1823 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
1824 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1825 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1826 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1827 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1828 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1829 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
1830 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1831 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1832 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1833 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1834 // CHECK10-NEXT:    [[I3:%.*]] = alloca i32, align 4
1835 // CHECK10-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
1836 // CHECK10-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1837 // CHECK10-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1838 // CHECK10-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
1839 // CHECK10-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1840 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1841 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1842 // CHECK10-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1843 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1844 // CHECK10-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1845 // CHECK10-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1846 // CHECK10-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1847 // CHECK10-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1848 // CHECK10-NEXT:    store i32 0, ptr [[I]], align 4
1849 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1850 // CHECK10-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1851 // CHECK10-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1852 // CHECK10:       omp.precond.then:
1853 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1854 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1855 // CHECK10-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
1856 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1857 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1858 // CHECK10-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1859 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1860 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1861 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1862 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1863 // CHECK10-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1864 // CHECK10-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1865 // CHECK10:       cond.true:
1866 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1867 // CHECK10-NEXT:    br label [[COND_END:%.*]]
1868 // CHECK10:       cond.false:
1869 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1870 // CHECK10-NEXT:    br label [[COND_END]]
1871 // CHECK10:       cond.end:
1872 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1873 // CHECK10-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1874 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1875 // CHECK10-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1876 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1877 // CHECK10:       omp.inner.for.cond:
1878 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1879 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1880 // CHECK10-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1881 // CHECK10-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1882 // CHECK10:       omp.inner.for.body:
1883 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1884 // CHECK10-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1885 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1886 // CHECK10-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1887 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
1888 // CHECK10-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4
1889 // CHECK10-NEXT:    [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8
1890 // CHECK10-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]])
1891 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1892 // CHECK10:       omp.inner.for.inc:
1893 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1894 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1895 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1896 // CHECK10-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1897 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
1898 // CHECK10:       omp.inner.for.end:
1899 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1900 // CHECK10:       omp.loop.exit:
1901 // CHECK10-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1902 // CHECK10-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
1903 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
1904 // CHECK10-NEXT:    br label [[OMP_PRECOND_END]]
1905 // CHECK10:       omp.precond.end:
1906 // CHECK10-NEXT:    ret void
1907 //
1908 //
1909 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined
1910 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
1911 // CHECK10-NEXT:  entry:
1912 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1913 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1914 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1915 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1916 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
1917 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1918 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1919 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1920 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1921 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1922 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
1923 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1924 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1925 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1926 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1927 // CHECK10-NEXT:    [[I4:%.*]] = alloca i32, align 4
1928 // CHECK10-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1929 // CHECK10-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1930 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1931 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1932 // CHECK10-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
1933 // CHECK10-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1934 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1935 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1936 // CHECK10-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1937 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1938 // CHECK10-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1939 // CHECK10-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1940 // CHECK10-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1941 // CHECK10-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1942 // CHECK10-NEXT:    store i32 0, ptr [[I]], align 4
1943 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1944 // CHECK10-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1945 // CHECK10-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1946 // CHECK10:       omp.precond.then:
1947 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1948 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1949 // CHECK10-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
1950 // CHECK10-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1951 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
1952 // CHECK10-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1953 // CHECK10-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
1954 // CHECK10-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1955 // CHECK10-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
1956 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1957 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1958 // CHECK10-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1959 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1960 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1961 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1962 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1963 // CHECK10-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1964 // CHECK10-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1965 // CHECK10:       cond.true:
1966 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1967 // CHECK10-NEXT:    br label [[COND_END:%.*]]
1968 // CHECK10:       cond.false:
1969 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1970 // CHECK10-NEXT:    br label [[COND_END]]
1971 // CHECK10:       cond.end:
1972 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1973 // CHECK10-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1974 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1975 // CHECK10-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1976 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1977 // CHECK10:       omp.inner.for.cond:
1978 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1979 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1980 // CHECK10-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1981 // CHECK10-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1982 // CHECK10:       omp.inner.for.body:
1983 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1984 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1985 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1986 // CHECK10-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
1987 // CHECK10-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I4]], align 4
1988 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
1989 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
1990 // CHECK10-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
1991 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1992 // CHECK10:       omp.body.continue:
1993 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1994 // CHECK10:       omp.inner.for.inc:
1995 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1996 // CHECK10-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP18]], 1
1997 // CHECK10-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
1998 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
1999 // CHECK10:       omp.inner.for.end:
2000 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2001 // CHECK10:       omp.loop.exit:
2002 // CHECK10-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2003 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
2004 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP20]])
2005 // CHECK10-NEXT:    br label [[OMP_PRECOND_END]]
2006 // CHECK10:       omp.precond.end:
2007 // CHECK10-NEXT:    ret void
2008 //
2009 //
2010 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57
2011 // CHECK10-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
2012 // CHECK10-NEXT:  entry:
2013 // CHECK10-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2014 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2015 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2016 // CHECK10-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
2017 // CHECK10-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
2018 // CHECK10-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2019 // CHECK10-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
2020 // CHECK10-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2021 // CHECK10-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
2022 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2023 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2024 // CHECK10-NEXT:    store i32 [[TMP1]], ptr [[N_CASTED]], align 4
2025 // CHECK10-NEXT:    [[TMP2:%.*]] = load i64, ptr [[N_CASTED]], align 8
2026 // CHECK10-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 8
2027 // CHECK10-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined, i64 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]])
2028 // CHECK10-NEXT:    ret void
2029 //
2030 //
2031 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined
2032 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
2033 // CHECK10-NEXT:  entry:
2034 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2035 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2036 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2037 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2038 // CHECK10-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
2039 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2040 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2041 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2042 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2043 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
2044 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2045 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2046 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2047 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2048 // CHECK10-NEXT:    [[I3:%.*]] = alloca i32, align 4
2049 // CHECK10-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
2050 // CHECK10-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2051 // CHECK10-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2052 // CHECK10-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
2053 // CHECK10-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2054 // CHECK10-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
2055 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2056 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2057 // CHECK10-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2058 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2059 // CHECK10-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2060 // CHECK10-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2061 // CHECK10-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2062 // CHECK10-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2063 // CHECK10-NEXT:    store i32 0, ptr [[I]], align 4
2064 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2065 // CHECK10-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2066 // CHECK10-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2067 // CHECK10:       omp.precond.then:
2068 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2069 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2070 // CHECK10-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
2071 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2072 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2073 // CHECK10-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2074 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2075 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2076 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2077 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2078 // CHECK10-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2079 // CHECK10-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2080 // CHECK10:       cond.true:
2081 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2082 // CHECK10-NEXT:    br label [[COND_END:%.*]]
2083 // CHECK10:       cond.false:
2084 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2085 // CHECK10-NEXT:    br label [[COND_END]]
2086 // CHECK10:       cond.end:
2087 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2088 // CHECK10-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2089 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2090 // CHECK10-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2091 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2092 // CHECK10:       omp.inner.for.cond:
2093 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2094 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2095 // CHECK10-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2096 // CHECK10-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2097 // CHECK10:       omp.inner.for.body:
2098 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2099 // CHECK10-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
2100 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2101 // CHECK10-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
2102 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
2103 // CHECK10-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4
2104 // CHECK10-NEXT:    [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8
2105 // CHECK10-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[G_ADDR]], align 8
2106 // CHECK10-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], ptr [[TMP20]])
2107 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2108 // CHECK10:       omp.inner.for.inc:
2109 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2110 // CHECK10-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2111 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2112 // CHECK10-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2113 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
2114 // CHECK10:       omp.inner.for.end:
2115 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2116 // CHECK10:       omp.loop.exit:
2117 // CHECK10-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2118 // CHECK10-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
2119 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
2120 // CHECK10-NEXT:    br label [[OMP_PRECOND_END]]
2121 // CHECK10:       omp.precond.end:
2122 // CHECK10-NEXT:    ret void
2123 //
2124 //
2125 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined.omp_outlined
2126 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
2127 // CHECK10-NEXT:  entry:
2128 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2129 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2130 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2131 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2132 // CHECK10-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2133 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2134 // CHECK10-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
2135 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2136 // CHECK10-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2137 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2138 // CHECK10-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2139 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
2140 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2141 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2142 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2143 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2144 // CHECK10-NEXT:    [[I4:%.*]] = alloca i32, align 4
2145 // CHECK10-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2146 // CHECK10-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2147 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2148 // CHECK10-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2149 // CHECK10-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
2150 // CHECK10-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2151 // CHECK10-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
2152 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2153 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2154 // CHECK10-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2155 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2156 // CHECK10-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2157 // CHECK10-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2158 // CHECK10-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2159 // CHECK10-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2160 // CHECK10-NEXT:    store i32 0, ptr [[I]], align 4
2161 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2162 // CHECK10-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2163 // CHECK10-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2164 // CHECK10:       omp.precond.then:
2165 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2166 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2167 // CHECK10-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
2168 // CHECK10-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2169 // CHECK10-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
2170 // CHECK10-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2171 // CHECK10-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
2172 // CHECK10-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2173 // CHECK10-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
2174 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2175 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2176 // CHECK10-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2177 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2178 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2179 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2180 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2181 // CHECK10-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2182 // CHECK10-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2183 // CHECK10:       cond.true:
2184 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2185 // CHECK10-NEXT:    br label [[COND_END:%.*]]
2186 // CHECK10:       cond.false:
2187 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2188 // CHECK10-NEXT:    br label [[COND_END]]
2189 // CHECK10:       cond.end:
2190 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2191 // CHECK10-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2192 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2193 // CHECK10-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
2194 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2195 // CHECK10:       omp.inner.for.cond:
2196 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2197 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2198 // CHECK10-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2199 // CHECK10-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2200 // CHECK10:       omp.inner.for.body:
2201 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2202 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2203 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2204 // CHECK10-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
2205 // CHECK10-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 8
2206 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 0
2207 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
2208 // CHECK10-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4
2209 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
2210 // CHECK10-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
2211 // CHECK10-NEXT:    store i32 [[TMP18]], ptr [[ARRAYIDX7]], align 4
2212 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2213 // CHECK10:       omp.body.continue:
2214 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2215 // CHECK10:       omp.inner.for.inc:
2216 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2217 // CHECK10-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
2218 // CHECK10-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
2219 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
2220 // CHECK10:       omp.inner.for.end:
2221 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2222 // CHECK10:       omp.loop.exit:
2223 // CHECK10-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2224 // CHECK10-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
2225 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
2226 // CHECK10-NEXT:    br label [[OMP_PRECOND_END]]
2227 // CHECK10:       omp.precond.end:
2228 // CHECK10-NEXT:    ret void
2229 //
2230 //
2231 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51
2232 // CHECK12-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
2233 // CHECK12-NEXT:  entry:
2234 // CHECK12-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
2235 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2236 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2237 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2238 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
2239 // CHECK12-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
2240 // CHECK12-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3:[0-9]+]])
2241 // CHECK12-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
2242 // CHECK12-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
2243 // CHECK12-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2244 // CHECK12-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2245 // CHECK12-NEXT:    store i32 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
2246 // CHECK12-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2247 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2248 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
2249 // CHECK12-NEXT:    call void @__kmpc_push_num_teams(ptr @[[GLOB3]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
2250 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N_ADDR]], align 4
2251 // CHECK12-NEXT:    store i32 [[TMP4]], ptr [[N_CASTED]], align 4
2252 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4
2253 // CHECK12-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined, i32 [[TMP5]], ptr [[TMP1]])
2254 // CHECK12-NEXT:    ret void
2255 //
2256 //
2257 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined
2258 // CHECK12-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
2259 // CHECK12-NEXT:  entry:
2260 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2261 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2262 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2263 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2264 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2265 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2266 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2267 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2268 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
2269 // CHECK12-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2270 // CHECK12-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2271 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2272 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2273 // CHECK12-NEXT:    [[I3:%.*]] = alloca i32, align 4
2274 // CHECK12-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
2275 // CHECK12-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2276 // CHECK12-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2277 // CHECK12-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
2278 // CHECK12-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2279 // CHECK12-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2280 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2281 // CHECK12-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2282 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2283 // CHECK12-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2284 // CHECK12-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2285 // CHECK12-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2286 // CHECK12-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2287 // CHECK12-NEXT:    store i32 0, ptr [[I]], align 4
2288 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2289 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2290 // CHECK12-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2291 // CHECK12:       omp.precond.then:
2292 // CHECK12-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2293 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2294 // CHECK12-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
2295 // CHECK12-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2296 // CHECK12-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2297 // CHECK12-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2298 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2299 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2300 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2301 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2302 // CHECK12-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2303 // CHECK12-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2304 // CHECK12:       cond.true:
2305 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2306 // CHECK12-NEXT:    br label [[COND_END:%.*]]
2307 // CHECK12:       cond.false:
2308 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2309 // CHECK12-NEXT:    br label [[COND_END]]
2310 // CHECK12:       cond.end:
2311 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2312 // CHECK12-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2313 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2314 // CHECK12-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2315 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2316 // CHECK12:       omp.inner.for.cond:
2317 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2318 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2319 // CHECK12-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2320 // CHECK12-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2321 // CHECK12:       omp.inner.for.body:
2322 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2323 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2324 // CHECK12-NEXT:    [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4
2325 // CHECK12-NEXT:    store i32 [[TMP16]], ptr [[N_CASTED]], align 4
2326 // CHECK12-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4
2327 // CHECK12-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], ptr [[TMP0]])
2328 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2329 // CHECK12:       omp.inner.for.inc:
2330 // CHECK12-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2331 // CHECK12-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2332 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2333 // CHECK12-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2334 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]]
2335 // CHECK12:       omp.inner.for.end:
2336 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2337 // CHECK12:       omp.loop.exit:
2338 // CHECK12-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2339 // CHECK12-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
2340 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
2341 // CHECK12-NEXT:    br label [[OMP_PRECOND_END]]
2342 // CHECK12:       omp.precond.end:
2343 // CHECK12-NEXT:    ret void
2344 //
2345 //
2346 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l51.omp_outlined.omp_outlined
2347 // CHECK12-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
2348 // CHECK12-NEXT:  entry:
2349 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2350 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2351 // CHECK12-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2352 // CHECK12-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2353 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2354 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2355 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2356 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2357 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2358 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2359 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
2360 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2361 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2362 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2363 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2364 // CHECK12-NEXT:    [[I3:%.*]] = alloca i32, align 4
2365 // CHECK12-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2366 // CHECK12-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2367 // CHECK12-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2368 // CHECK12-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2369 // CHECK12-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
2370 // CHECK12-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2371 // CHECK12-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2372 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2373 // CHECK12-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2374 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2375 // CHECK12-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2376 // CHECK12-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2377 // CHECK12-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2378 // CHECK12-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2379 // CHECK12-NEXT:    store i32 0, ptr [[I]], align 4
2380 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2381 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2382 // CHECK12-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2383 // CHECK12:       omp.precond.then:
2384 // CHECK12-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2385 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2386 // CHECK12-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
2387 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2388 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2389 // CHECK12-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4
2390 // CHECK12-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
2391 // CHECK12-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2392 // CHECK12-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2393 // CHECK12-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2394 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2395 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2396 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2397 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2398 // CHECK12-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2399 // CHECK12-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2400 // CHECK12:       cond.true:
2401 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2402 // CHECK12-NEXT:    br label [[COND_END:%.*]]
2403 // CHECK12:       cond.false:
2404 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2405 // CHECK12-NEXT:    br label [[COND_END]]
2406 // CHECK12:       cond.end:
2407 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2408 // CHECK12-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2409 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2410 // CHECK12-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
2411 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2412 // CHECK12:       omp.inner.for.cond:
2413 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2414 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2415 // CHECK12-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2416 // CHECK12-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2417 // CHECK12:       omp.inner.for.body:
2418 // CHECK12-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2419 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2420 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2421 // CHECK12-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
2422 // CHECK12-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I3]], align 4
2423 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP17]]
2424 // CHECK12-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
2425 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2426 // CHECK12:       omp.body.continue:
2427 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2428 // CHECK12:       omp.inner.for.inc:
2429 // CHECK12-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2430 // CHECK12-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
2431 // CHECK12-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
2432 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]]
2433 // CHECK12:       omp.inner.for.end:
2434 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2435 // CHECK12:       omp.loop.exit:
2436 // CHECK12-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2437 // CHECK12-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
2438 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP20]])
2439 // CHECK12-NEXT:    br label [[OMP_PRECOND_END]]
2440 // CHECK12:       omp.precond.end:
2441 // CHECK12-NEXT:    ret void
2442 //
2443 //
2444 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57
2445 // CHECK12-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
2446 // CHECK12-NEXT:  entry:
2447 // CHECK12-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
2448 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2449 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2450 // CHECK12-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
2451 // CHECK12-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
2452 // CHECK12-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
2453 // CHECK12-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
2454 // CHECK12-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2455 // CHECK12-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
2456 // CHECK12-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2457 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2458 // CHECK12-NEXT:    store i32 [[TMP1]], ptr [[N_CASTED]], align 4
2459 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_CASTED]], align 4
2460 // CHECK12-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 4
2461 // CHECK12-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined, i32 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]])
2462 // CHECK12-NEXT:    ret void
2463 //
2464 //
2465 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined
2466 // CHECK12-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
2467 // CHECK12-NEXT:  entry:
2468 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2469 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2470 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2471 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2472 // CHECK12-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
2473 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2474 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2475 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2476 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2477 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
2478 // CHECK12-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2479 // CHECK12-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2480 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2481 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2482 // CHECK12-NEXT:    [[I3:%.*]] = alloca i32, align 4
2483 // CHECK12-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
2484 // CHECK12-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2485 // CHECK12-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2486 // CHECK12-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
2487 // CHECK12-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2488 // CHECK12-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
2489 // CHECK12-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2490 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2491 // CHECK12-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2492 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2493 // CHECK12-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2494 // CHECK12-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2495 // CHECK12-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2496 // CHECK12-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2497 // CHECK12-NEXT:    store i32 0, ptr [[I]], align 4
2498 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2499 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2500 // CHECK12-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2501 // CHECK12:       omp.precond.then:
2502 // CHECK12-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2503 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2504 // CHECK12-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
2505 // CHECK12-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2506 // CHECK12-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2507 // CHECK12-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2508 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2509 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2510 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2511 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2512 // CHECK12-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2513 // CHECK12-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2514 // CHECK12:       cond.true:
2515 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2516 // CHECK12-NEXT:    br label [[COND_END:%.*]]
2517 // CHECK12:       cond.false:
2518 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2519 // CHECK12-NEXT:    br label [[COND_END]]
2520 // CHECK12:       cond.end:
2521 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2522 // CHECK12-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2523 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2524 // CHECK12-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2525 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2526 // CHECK12:       omp.inner.for.cond:
2527 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2528 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2529 // CHECK12-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2530 // CHECK12-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2531 // CHECK12:       omp.inner.for.body:
2532 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2533 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2534 // CHECK12-NEXT:    [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4
2535 // CHECK12-NEXT:    store i32 [[TMP16]], ptr [[N_CASTED]], align 4
2536 // CHECK12-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4
2537 // CHECK12-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[G_ADDR]], align 4
2538 // CHECK12-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], ptr [[TMP0]], ptr [[TMP18]])
2539 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2540 // CHECK12:       omp.inner.for.inc:
2541 // CHECK12-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2542 // CHECK12-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2543 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2544 // CHECK12-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2545 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]]
2546 // CHECK12:       omp.inner.for.end:
2547 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2548 // CHECK12:       omp.loop.exit:
2549 // CHECK12-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2550 // CHECK12-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
2551 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
2552 // CHECK12-NEXT:    br label [[OMP_PRECOND_END]]
2553 // CHECK12:       omp.precond.end:
2554 // CHECK12-NEXT:    ret void
2555 //
2556 //
2557 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l57.omp_outlined.omp_outlined
2558 // CHECK12-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
2559 // CHECK12-NEXT:  entry:
2560 // CHECK12-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2561 // CHECK12-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2562 // CHECK12-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2563 // CHECK12-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2564 // CHECK12-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2565 // CHECK12-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2566 // CHECK12-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
2567 // CHECK12-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2568 // CHECK12-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2569 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2570 // CHECK12-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2571 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
2572 // CHECK12-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2573 // CHECK12-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2574 // CHECK12-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2575 // CHECK12-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2576 // CHECK12-NEXT:    [[I3:%.*]] = alloca i32, align 4
2577 // CHECK12-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2578 // CHECK12-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2579 // CHECK12-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2580 // CHECK12-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2581 // CHECK12-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
2582 // CHECK12-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2583 // CHECK12-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
2584 // CHECK12-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2585 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2586 // CHECK12-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2587 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2588 // CHECK12-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2589 // CHECK12-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2590 // CHECK12-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2591 // CHECK12-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2592 // CHECK12-NEXT:    store i32 0, ptr [[I]], align 4
2593 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2594 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2595 // CHECK12-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2596 // CHECK12:       omp.precond.then:
2597 // CHECK12-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2598 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2599 // CHECK12-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
2600 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2601 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2602 // CHECK12-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4
2603 // CHECK12-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
2604 // CHECK12-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2605 // CHECK12-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2606 // CHECK12-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2607 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2608 // CHECK12-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2609 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2610 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2611 // CHECK12-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2612 // CHECK12-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2613 // CHECK12:       cond.true:
2614 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2615 // CHECK12-NEXT:    br label [[COND_END:%.*]]
2616 // CHECK12:       cond.false:
2617 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2618 // CHECK12-NEXT:    br label [[COND_END]]
2619 // CHECK12:       cond.end:
2620 // CHECK12-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2621 // CHECK12-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2622 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2623 // CHECK12-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
2624 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2625 // CHECK12:       omp.inner.for.cond:
2626 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2627 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2628 // CHECK12-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2629 // CHECK12-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2630 // CHECK12:       omp.inner.for.body:
2631 // CHECK12-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2632 // CHECK12-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2633 // CHECK12-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2634 // CHECK12-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
2635 // CHECK12-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 4
2636 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 0
2637 // CHECK12-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
2638 // CHECK12-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I3]], align 4
2639 // CHECK12-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP19]]
2640 // CHECK12-NEXT:    store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4
2641 // CHECK12-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2642 // CHECK12:       omp.body.continue:
2643 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2644 // CHECK12:       omp.inner.for.inc:
2645 // CHECK12-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2646 // CHECK12-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
2647 // CHECK12-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
2648 // CHECK12-NEXT:    br label [[OMP_INNER_FOR_COND]]
2649 // CHECK12:       omp.inner.for.end:
2650 // CHECK12-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2651 // CHECK12:       omp.loop.exit:
2652 // CHECK12-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2653 // CHECK12-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
2654 // CHECK12-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
2655 // CHECK12-NEXT:    br label [[OMP_PRECOND_END]]
2656 // CHECK12:       omp.precond.end:
2657 // CHECK12-NEXT:    ret void
2658 //