1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s | FileCheck %s
4 target triple = "aarch64-unknown-linux-gnu"
10 define <vscale x 16 x i8> @ctlz_b(<vscale x 16 x i8> %a) #0 {
11 ; CHECK-LABEL: ctlz_b:
13 ; CHECK-NEXT: ptrue p0.b
14 ; CHECK-NEXT: clz z0.b, p0/m, z0.b
17 %res = call <vscale x 16 x i8> @llvm.ctlz.nxv16i8(<vscale x 16 x i8> %a)
18 ret <vscale x 16 x i8> %res
21 define <vscale x 8 x i16> @ctlz_h(<vscale x 8 x i16> %a) #0 {
22 ; CHECK-LABEL: ctlz_h:
24 ; CHECK-NEXT: ptrue p0.h
25 ; CHECK-NEXT: clz z0.h, p0/m, z0.h
28 %res = call <vscale x 8 x i16> @llvm.ctlz.nxv8i16(<vscale x 8 x i16> %a)
29 ret <vscale x 8 x i16> %res
32 define <vscale x 4 x i32> @ctlz_s(<vscale x 4 x i32> %a) #0 {
33 ; CHECK-LABEL: ctlz_s:
35 ; CHECK-NEXT: ptrue p0.s
36 ; CHECK-NEXT: clz z0.s, p0/m, z0.s
39 %res = call <vscale x 4 x i32> @llvm.ctlz.nxv4i32(<vscale x 4 x i32> %a)
40 ret <vscale x 4 x i32> %res
43 define <vscale x 2 x i64> @ctlz_d(<vscale x 2 x i64> %a) #0 {
44 ; CHECK-LABEL: ctlz_d:
46 ; CHECK-NEXT: ptrue p0.d
47 ; CHECK-NEXT: clz z0.d, p0/m, z0.d
50 %res = call <vscale x 2 x i64> @llvm.ctlz.nxv2i64(<vscale x 2 x i64> %a)
51 ret <vscale x 2 x i64> %res
58 define <vscale x 16 x i8> @ctpop_b(<vscale x 16 x i8> %a) #0 {
59 ; CHECK-LABEL: ctpop_b:
61 ; CHECK-NEXT: ptrue p0.b
62 ; CHECK-NEXT: cnt z0.b, p0/m, z0.b
65 %res = call <vscale x 16 x i8> @llvm.ctpop.nxv16i8(<vscale x 16 x i8> %a)
66 ret <vscale x 16 x i8> %res
69 define <vscale x 8 x i16> @ctpop_h(<vscale x 8 x i16> %a) #0 {
70 ; CHECK-LABEL: ctpop_h:
72 ; CHECK-NEXT: ptrue p0.h
73 ; CHECK-NEXT: cnt z0.h, p0/m, z0.h
76 %res = call <vscale x 8 x i16> @llvm.ctpop.nxv8i16(<vscale x 8 x i16> %a)
77 ret <vscale x 8 x i16> %res
80 define <vscale x 4 x i32> @ctpop_s(<vscale x 4 x i32> %a) #0 {
81 ; CHECK-LABEL: ctpop_s:
83 ; CHECK-NEXT: ptrue p0.s
84 ; CHECK-NEXT: cnt z0.s, p0/m, z0.s
87 %res = call <vscale x 4 x i32> @llvm.ctpop.nxv4i32(<vscale x 4 x i32> %a)
88 ret <vscale x 4 x i32> %res
91 define <vscale x 2 x i64> @ctpop_d(<vscale x 2 x i64> %a) #0 {
92 ; CHECK-LABEL: ctpop_d:
94 ; CHECK-NEXT: ptrue p0.d
95 ; CHECK-NEXT: cnt z0.d, p0/m, z0.d
98 %res = call <vscale x 2 x i64> @llvm.ctpop.nxv2i64(<vscale x 2 x i64> %a)
99 ret <vscale x 2 x i64> %res
103 ; Count trailing zeros
106 define <vscale x 16 x i8> @cttz_b(<vscale x 16 x i8> %a) #0 {
107 ; CHECK-LABEL: cttz_b:
109 ; CHECK-NEXT: ptrue p0.b
110 ; CHECK-NEXT: rbit z0.b, p0/m, z0.b
111 ; CHECK-NEXT: clz z0.b, p0/m, z0.b
114 %res = call <vscale x 16 x i8> @llvm.cttz.nxv16i8(<vscale x 16 x i8> %a)
115 ret <vscale x 16 x i8> %res
118 define <vscale x 8 x i16> @cttz_h(<vscale x 8 x i16> %a) #0 {
119 ; CHECK-LABEL: cttz_h:
121 ; CHECK-NEXT: ptrue p0.h
122 ; CHECK-NEXT: rbit z0.h, p0/m, z0.h
123 ; CHECK-NEXT: clz z0.h, p0/m, z0.h
126 %res = call <vscale x 8 x i16> @llvm.cttz.nxv8i16(<vscale x 8 x i16> %a)
127 ret <vscale x 8 x i16> %res
130 define <vscale x 4 x i32> @cttz_s(<vscale x 4 x i32> %a) #0 {
131 ; CHECK-LABEL: cttz_s:
133 ; CHECK-NEXT: ptrue p0.s
134 ; CHECK-NEXT: rbit z0.s, p0/m, z0.s
135 ; CHECK-NEXT: clz z0.s, p0/m, z0.s
138 %res = call <vscale x 4 x i32> @llvm.cttz.nxv4i32(<vscale x 4 x i32> %a)
139 ret <vscale x 4 x i32> %res
142 define <vscale x 2 x i64> @cttz_d(<vscale x 2 x i64> %a) #0 {
143 ; CHECK-LABEL: cttz_d:
145 ; CHECK-NEXT: ptrue p0.d
146 ; CHECK-NEXT: rbit z0.d, p0/m, z0.d
147 ; CHECK-NEXT: clz z0.d, p0/m, z0.d
150 %res = call <vscale x 2 x i64> @llvm.cttz.nxv2i64(<vscale x 2 x i64> %a)
151 ret <vscale x 2 x i64> %res
154 attributes #0 = { "target-features"="+sve" }
156 declare <vscale x 16 x i8> @llvm.ctlz.nxv16i8(<vscale x 16 x i8>)
157 declare <vscale x 8 x i16> @llvm.ctlz.nxv8i16(<vscale x 8 x i16>)
158 declare <vscale x 4 x i32> @llvm.ctlz.nxv4i32(<vscale x 4 x i32>)
159 declare <vscale x 2 x i64> @llvm.ctlz.nxv2i64(<vscale x 2 x i64>)
161 declare <vscale x 16 x i8> @llvm.ctpop.nxv16i8(<vscale x 16 x i8>)
162 declare <vscale x 8 x i16> @llvm.ctpop.nxv8i16(<vscale x 8 x i16>)
163 declare <vscale x 4 x i32> @llvm.ctpop.nxv4i32(<vscale x 4 x i32>)
164 declare <vscale x 2 x i64> @llvm.ctpop.nxv2i64(<vscale x 2 x i64>)
166 declare <vscale x 16 x i8> @llvm.cttz.nxv16i8(<vscale x 16 x i8>)
167 declare <vscale x 8 x i16> @llvm.cttz.nxv8i16(<vscale x 8 x i16>)
168 declare <vscale x 4 x i32> @llvm.cttz.nxv4i32(<vscale x 4 x i32>)
169 declare <vscale x 2 x i64> @llvm.cttz.nxv2i64(<vscale x 2 x i64>)