1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -O2 -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
7 ; void redundant_store(uint32_t *p, svint32_t v) {
11 define void @redundant_store(ptr nocapture %p, <vscale x 4 x i32> %v) {
12 ; CHECK-LABEL: redundant_store:
14 ; CHECK-NEXT: ptrue p0.s
15 ; CHECK-NEXT: st1w { z0.s }, p0, [x0]
17 store i32 1, ptr %p, align 4
18 store <vscale x 4 x i32> %v, <vscale x 4 x i32>* %p, align 16
22 define void @two_scalable_same_size(ptr writeonly %ptr, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
23 ; CHECK-LABEL: two_scalable_same_size:
24 ; CHECK: // %bb.0: // %entry
25 ; CHECK-NEXT: ptrue p0.s
26 ; CHECK-NEXT: st1w { z1.s }, p0, [x0]
29 store <vscale x 4 x i32> %a, ptr %ptr
30 store <vscale x 4 x i32> %b, ptr %ptr
34 ; make sure that scalable store is present, becuase we don't know its final size.
35 define void @keep_scalable_store(ptr writeonly %ptr, ptr %a, <vscale x 4 x i32> %b) {
36 ; CHECK-LABEL: keep_scalable_store:
37 ; CHECK: // %bb.0: // %entry
38 ; CHECK-NEXT: ptrue p0.s
39 ; CHECK-NEXT: ldp q2, q1, [x1]
40 ; CHECK-NEXT: st1w { z0.s }, p0, [x0]
41 ; CHECK-NEXT: stp q2, q1, [x0]
44 %0 = load <8 x i32>, ptr %a
45 store <vscale x 4 x i32> %b, ptr %ptr
46 store <8 x i32> %0, ptr %ptr
50 define void @two_scalable_keep_stores(ptr writeonly %ptr, <vscale x 4 x i32> %a, <vscale x 4 x i64> %b) {
51 ; CHECK-LABEL: two_scalable_keep_stores:
52 ; CHECK: // %bb.0: // %entry
53 ; CHECK-NEXT: ptrue p0.d
54 ; CHECK-NEXT: ptrue p1.s
55 ; CHECK-NEXT: st1d { z2.d }, p0, [x0, #1, mul vl]
56 ; CHECK-NEXT: st1d { z1.d }, p0, [x0]
57 ; CHECK-NEXT: st1w { z0.s }, p1, [x0]
60 store <vscale x 4 x i64> %b, ptr %ptr
61 store <vscale x 4 x i32> %a, ptr %ptr
65 define void @two_scalable_remove_store(ptr writeonly %ptr, <vscale x 4 x i32> %a, <vscale x 4 x i64> %b) {
66 ; CHECK-LABEL: two_scalable_remove_store:
67 ; CHECK: // %bb.0: // %entry
68 ; CHECK-NEXT: ptrue p0.d
69 ; CHECK-NEXT: st1d { z2.d }, p0, [x0, #1, mul vl]
70 ; CHECK-NEXT: st1d { z1.d }, p0, [x0]
73 store <vscale x 4 x i32> %a, ptr %ptr
74 store <vscale x 4 x i64> %b, ptr %ptr