1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mattr=+sve -force-streaming-compatible-sve < %s | FileCheck %s
4 target triple = "aarch64-unknown-linux-gnu"
6 define <2 x half> @select_v2f16(<2 x half> %op1, <2 x half> %op2, i1 %mask) {
7 ; CHECK-LABEL: select_v2f16:
9 ; CHECK-NEXT: ptrue p0.h
10 ; CHECK-NEXT: mov z2.h, w0
11 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
12 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
13 ; CHECK-NEXT: and z2.h, z2.h, #0x1
14 ; CHECK-NEXT: cmpne p0.h, p0/z, z2.h, #0
15 ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
16 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
18 %sel = select i1 %mask, <2 x half> %op1, <2 x half> %op2
22 define <4 x half> @select_v4f16(<4 x half> %op1, <4 x half> %op2, i1 %mask) {
23 ; CHECK-LABEL: select_v4f16:
25 ; CHECK-NEXT: ptrue p0.h
26 ; CHECK-NEXT: mov z2.h, w0
27 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
28 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
29 ; CHECK-NEXT: and z2.h, z2.h, #0x1
30 ; CHECK-NEXT: cmpne p0.h, p0/z, z2.h, #0
31 ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
32 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
34 %sel = select i1 %mask, <4 x half> %op1, <4 x half> %op2
38 define <8 x half> @select_v8f16(<8 x half> %op1, <8 x half> %op2, i1 %mask) {
39 ; CHECK-LABEL: select_v8f16:
41 ; CHECK-NEXT: ptrue p0.h
42 ; CHECK-NEXT: mov z2.h, w0
43 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
44 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
45 ; CHECK-NEXT: and z2.h, z2.h, #0x1
46 ; CHECK-NEXT: cmpne p0.h, p0/z, z2.h, #0
47 ; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
48 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
50 %sel = select i1 %mask, <8 x half> %op1, <8 x half> %op2
54 define void @select_v16f16(ptr %a, ptr %b, i1 %mask) {
55 ; CHECK-LABEL: select_v16f16:
57 ; CHECK-NEXT: ptrue p0.h
58 ; CHECK-NEXT: mov z0.h, w2
59 ; CHECK-NEXT: and z0.h, z0.h, #0x1
60 ; CHECK-NEXT: cmpne p0.h, p0/z, z0.h, #0
61 ; CHECK-NEXT: ldr q0, [x0]
62 ; CHECK-NEXT: ldr q1, [x0, #16]
63 ; CHECK-NEXT: ldr q2, [x1]
64 ; CHECK-NEXT: ldr q3, [x1, #16]
65 ; CHECK-NEXT: sel z0.h, p0, z0.h, z2.h
66 ; CHECK-NEXT: sel z1.h, p0, z1.h, z3.h
67 ; CHECK-NEXT: stp q0, q1, [x0]
69 %op1 = load volatile <16 x half>, ptr %a
70 %op2 = load volatile <16 x half>, ptr %b
71 %sel = select i1 %mask, <16 x half> %op1, <16 x half> %op2
72 store <16 x half> %sel, ptr %a
76 define <2 x float> @select_v2f32(<2 x float> %op1, <2 x float> %op2, i1 %mask) {
77 ; CHECK-LABEL: select_v2f32:
79 ; CHECK-NEXT: ptrue p0.s
80 ; CHECK-NEXT: and w8, w0, #0x1
81 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
82 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
83 ; CHECK-NEXT: mov z2.s, w8
84 ; CHECK-NEXT: cmpne p0.s, p0/z, z2.s, #0
85 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
86 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
88 %sel = select i1 %mask, <2 x float> %op1, <2 x float> %op2
92 define <4 x float> @select_v4f32(<4 x float> %op1, <4 x float> %op2, i1 %mask) {
93 ; CHECK-LABEL: select_v4f32:
95 ; CHECK-NEXT: ptrue p0.s
96 ; CHECK-NEXT: and w8, w0, #0x1
97 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
98 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
99 ; CHECK-NEXT: mov z2.s, w8
100 ; CHECK-NEXT: cmpne p0.s, p0/z, z2.s, #0
101 ; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
102 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
104 %sel = select i1 %mask, <4 x float> %op1, <4 x float> %op2
108 define void @select_v8f32(ptr %a, ptr %b, i1 %mask) {
109 ; CHECK-LABEL: select_v8f32:
111 ; CHECK-NEXT: ptrue p0.s
112 ; CHECK-NEXT: and w8, w2, #0x1
113 ; CHECK-NEXT: mov z0.s, w8
114 ; CHECK-NEXT: cmpne p0.s, p0/z, z0.s, #0
115 ; CHECK-NEXT: ldr q0, [x0]
116 ; CHECK-NEXT: ldr q1, [x0, #16]
117 ; CHECK-NEXT: ldr q2, [x1]
118 ; CHECK-NEXT: ldr q3, [x1, #16]
119 ; CHECK-NEXT: sel z0.s, p0, z0.s, z2.s
120 ; CHECK-NEXT: sel z1.s, p0, z1.s, z3.s
121 ; CHECK-NEXT: stp q0, q1, [x0]
123 %op1 = load volatile <8 x float>, ptr %a
124 %op2 = load volatile <8 x float>, ptr %b
125 %sel = select i1 %mask, <8 x float> %op1, <8 x float> %op2
126 store <8 x float> %sel, ptr %a
130 define <1 x double> @select_v1f64(<1 x double> %op1, <1 x double> %op2, i1 %mask) {
131 ; CHECK-LABEL: select_v1f64:
133 ; CHECK-NEXT: tst w0, #0x1
134 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
135 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
136 ; CHECK-NEXT: csetm x8, ne
137 ; CHECK-NEXT: mvn x9, x8
138 ; CHECK-NEXT: mov z2.d, x8
139 ; CHECK-NEXT: mov z3.d, x9
140 ; CHECK-NEXT: and z0.d, z0.d, z2.d
141 ; CHECK-NEXT: and z1.d, z1.d, z3.d
142 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
143 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
145 %sel = select i1 %mask, <1 x double> %op1, <1 x double> %op2
146 ret <1 x double> %sel
149 define <2 x double> @select_v2f64(<2 x double> %op1, <2 x double> %op2, i1 %mask) {
150 ; CHECK-LABEL: select_v2f64:
152 ; CHECK-NEXT: ptrue p0.d
153 ; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
154 ; CHECK-NEXT: and x8, x0, #0x1
155 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
156 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
157 ; CHECK-NEXT: mov z2.d, x8
158 ; CHECK-NEXT: cmpne p0.d, p0/z, z2.d, #0
159 ; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d
160 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
162 %sel = select i1 %mask, <2 x double> %op1, <2 x double> %op2
163 ret <2 x double> %sel
166 define void @select_v4f64(ptr %a, ptr %b, i1 %mask) {
167 ; CHECK-LABEL: select_v4f64:
169 ; CHECK-NEXT: ptrue p0.d
170 ; CHECK-NEXT: // kill: def $w2 killed $w2 def $x2
171 ; CHECK-NEXT: and x8, x2, #0x1
172 ; CHECK-NEXT: mov z0.d, x8
173 ; CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #0
174 ; CHECK-NEXT: ldr q0, [x0]
175 ; CHECK-NEXT: ldr q1, [x0, #16]
176 ; CHECK-NEXT: ldr q2, [x1]
177 ; CHECK-NEXT: ldr q3, [x1, #16]
178 ; CHECK-NEXT: sel z0.d, p0, z0.d, z2.d
179 ; CHECK-NEXT: sel z1.d, p0, z1.d, z3.d
180 ; CHECK-NEXT: stp q0, q1, [x0]
182 %op1 = load volatile <4 x double>, ptr %a
183 %op2 = load volatile <4 x double>, ptr %b
184 %sel = select i1 %mask, <4 x double> %op1, <4 x double> %op2
185 store <4 x double> %sel, ptr %a