1 ; RUN: llc < %s -mtriple arm64-apple-darwin -aarch64-enable-ldst-opt=false -disable-post-ra -asm-verbose=false | FileCheck %s
2 ; Disable the load/store optimizer to avoid having LDP/STPs and simplify checks.
4 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
6 ; Check that we don't try to tail-call with an sret-demoted return.
8 declare i1024 @test_sret() #0
10 ; CHECK-LABEL: _test_call_sret:
11 ; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x8
13 ; CHECK-NEXT: bl _test_sret
14 ; CHECK: ldr [[CALLERSRET1:q[0-9]+]], [sp]
15 ; CHECK: str [[CALLERSRET1:q[0-9]+]], [x[[CALLERX8NUM]]]
17 define i1024 @test_call_sret() #0 {
18 %a = call i1024 @test_sret()
22 ; CHECK-LABEL: _test_tailcall_sret:
23 ; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x8
25 ; CHECK-NEXT: bl _test_sret
26 ; CHECK: ldr [[CALLERSRET1:q[0-9]+]], [sp]
27 ; CHECK: str [[CALLERSRET1:q[0-9]+]], [x[[CALLERX8NUM]]]
29 define i1024 @test_tailcall_sret() #0 {
30 %a = tail call i1024 @test_sret()
34 ; CHECK-LABEL: _test_indirect_tailcall_sret:
35 ; CHECK: mov x[[CALLERX8NUM:[0-9]+]], x8
38 ; CHECK: ldr [[CALLERSRET1:q[0-9]+]], [sp]
39 ; CHECK: str [[CALLERSRET1:q[0-9]+]], [x[[CALLERX8NUM]]]
41 define i1024 @test_indirect_tailcall_sret(ptr %f) #0 {
42 %a = tail call i1024 %f()
46 attributes #0 = { nounwind }