1 ; RUN: llc --debugify-and-strip-all-safe=0 -mtriple=powerpc64-- -O0 \
2 ; RUN: -debug-pass=Structure < %s -o /dev/null 2>&1 | \
3 ; RUN: grep -v "Verify generated machine code" | FileCheck %s
7 ; CHECK-LABEL: Pass Arguments:
8 ; CHECK-NEXT: Target Library Information
9 ; CHECK-NEXT: Target Pass Configuration
10 ; CHECK-NEXT: Machine Module Information
11 ; CHECK-NEXT: Target Transform Information
12 ; CHECK-NEXT: Create Garbage Collector Module Metadata
13 ; CHECK-NEXT: Assumption Cache Tracker
14 ; CHECK-NEXT: Profile summary info
15 ; CHECK-NEXT: Machine Branch Probability Analysis
16 ; CHECK-NEXT: ModulePass Manager
17 ; CHECK-NEXT: Pre-ISel Intrinsic Lowering
18 ; CHECK-NEXT: FunctionPass Manager
19 ; CHECK-NEXT: Expand large div/rem
20 ; CHECK-NEXT: Expand large fp convert
21 ; CHECK-NEXT: Expand Atomic instructions
22 ; CHECK-NEXT: PPC Lower MASS Entries
23 ; CHECK-NEXT: FunctionPass Manager
24 ; CHECK-NEXT: Module Verifier
25 ; CHECK-NEXT: Lower Garbage Collection Instructions
26 ; CHECK-NEXT: Shadow Stack GC Lowering
27 ; CHECK-NEXT: Lower constant intrinsics
28 ; CHECK-NEXT: Remove unreachable blocks from the CFG
29 ; CHECK-NEXT: Expand vector predication intrinsics
30 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
31 ; CHECK-NEXT: Expand reduction intrinsics
32 ; CHECK-NEXT: Exception handling preparation
33 ; CHECK-NEXT: Prepare callbr
34 ; CHECK-NEXT: Safe Stack instrumentation pass
35 ; CHECK-NEXT: Insert stack protectors
36 ; CHECK-NEXT: Module Verifier
37 ; CHECK-NEXT: Assignment Tracking Analysis
38 ; CHECK-NEXT: PowerPC DAG->DAG Pattern Instruction Selection
39 ; CHECK-NEXT: PowerPC VSX Copy Legalization
40 ; CHECK-NEXT: Finalize ISel and expand pseudo-instructions
41 ; CHECK-NEXT: Local Stack Slot Allocation
42 ; CHECK-NEXT: Remove unreachable machine basic blocks
43 ; CHECK-NEXT: Live Variable Analysis
44 ; CHECK-NEXT: MachineDominator Tree Construction
45 ; CHECK-NEXT: Slot index numbering
46 ; CHECK-NEXT: Live Interval Analysis
47 ; CHECK-NEXT: PowerPC TLS Dynamic Call Fixup
48 ; CHECK-NEXT: PowerPC TOC Register Dependencies
49 ; CHECK-NEXT: Eliminate PHI nodes for register allocation
50 ; CHECK-NEXT: Two-Address instruction pass
51 ; CHECK-NEXT: Fast Register Allocator
52 ; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis
53 ; CHECK-NEXT: Fixup Statepoint Caller Saved
54 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
55 ; CHECK-NEXT: Machine Optimization Remark Emitter
56 ; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization
57 ; CHECK-NEXT: Post-RA pseudo instruction expansion pass
58 ; CHECK-NEXT: Analyze Machine Code For Garbage Collection
59 ; CHECK-NEXT: Insert fentry calls
60 ; CHECK-NEXT: Insert XRay ops
61 ; CHECK-NEXT: Implement the 'patchable-function' attribute
62 ; CHECK-NEXT: PowerPC Pre-Emit Peephole
63 ; CHECK-NEXT: PowerPC Expand ISEL Generation
64 ; CHECK-NEXT: Contiguously Lay Out Funclets
65 ; CHECK-NEXT: StackMap Liveness Analysis
66 ; CHECK-NEXT: Live DEBUG_VALUE analysis
67 ; CHECK-NEXT: Machine Sanitizer Binary Metadata
68 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
69 ; CHECK-NEXT: Machine Optimization Remark Emitter
70 ; CHECK-NEXT: Stack Frame Layout Analysis
71 ; CHECK-NEXT: PowerPC Expand Atomic
72 ; CHECK-NEXT: PowerPC Branch Selector
73 ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
74 ; CHECK-NEXT: Machine Optimization Remark Emitter
75 ; CHECK-NEXT: Linux PPC Assembly Printer
76 ; CHECK-NEXT: Free MachineFunction