1 ; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -inline < %s | FileCheck %s
2 ; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes='cgscc(inline)' < %s | FileCheck %s
4 ; CHECK-LABEL: @func_no_target_cpu(
5 define i32 @func_no_target_cpu() #0 {
9 ; CHECK-LABEL: @target_cpu_call_no_target_cpu(
10 ; CHECK-NEXT: ret i32 0
11 define i32 @target_cpu_call_no_target_cpu() #1 {
12 %call = call i32 @func_no_target_cpu()
16 ; CHECK-LABEL: @target_cpu_target_features_call_no_target_cpu(
17 ; CHECK-NEXT: ret i32 0
18 define i32 @target_cpu_target_features_call_no_target_cpu() {
19 %call = call i32 @func_no_target_cpu()
23 ; Make sure gfx9 can call unspecified functions because of movrel
25 ; CHECK-LABEL: @gfx9_target_features_call_no_target_cpu(
26 ; CHECK-NEXT: ret i32 0
27 define i32 @gfx9_target_features_call_no_target_cpu() #2 {
28 %call = call i32 @func_no_target_cpu()
32 define i32 @func_no_halfrate64ops() #3 {
36 define i32 @func_with_halfrate64ops() #4 {
40 ; CHECK-LABEL: @call_func_without_halfrate64ops(
41 ; CHECK-NEXT: ret i32 0
42 define i32 @call_func_without_halfrate64ops() #4 {
43 %call = call i32 @func_no_halfrate64ops()
47 ; CHECK-LABEL: @call_func_with_halfrate64ops(
48 ; CHECK-NEXT: ret i32 0
49 define i32 @call_func_with_halfrate64ops() #3 {
50 %call = call i32 @func_with_halfrate64ops()
54 define i32 @func_no_loadstoreopt() #5 {
58 define i32 @func_with_loadstoreopt() #6 {
62 ; CHECK-LABEL: @call_func_without_loadstoreopt(
63 ; CHECK-NEXT: ret i32 0
64 define i32 @call_func_without_loadstoreopt() #6 {
65 %call = call i32 @func_no_loadstoreopt()
69 attributes #0 = { nounwind }
70 attributes #1 = { nounwind "target-cpu"="fiji" }
71 attributes #2 = { nounwind "target-cpu"="gfx900" }
72 attributes #3 = { nounwind "target-features"="-half-rate-64-ops" }
73 attributes #4 = { nounwind "target-features"="+half-rate-64-ops" }
74 attributes #5 = { nounwind "target-features"="-load-store-opt" }
75 attributes #6 = { nounwind "target-features"="+load-store-opt" }