2 ; RUN: opt -loop-unswitch -enable-new-pm=0 -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
3 ; RUN: opt -S -loop-unswitch -enable-new-pm=0 -verify-loop-info -verify-dom-info -verify-memoryssa < %s | FileCheck %s
5 ; STATS: 2 loop-unswitch - Number of switches unswitched
7 ; CHECK: %1 = icmp eq i32 %c, 1
8 ; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
10 ; CHECK: ..split_crit_edge: ; preds = %0
11 ; CHECK-NEXT: br label %.split
13 ; CHECK: .split.us: ; preds = %0
14 ; CHECK-NEXT: br label %loop_begin.us
16 ; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us
17 ; CHECK-NEXT: %var_val.us = load i32, i32* %var
18 ; CHECK-NEXT: switch i32 1, label %default.us-lcssa.us [
19 ; CHECK-NEXT: i32 1, label %inc.us
21 ; CHECK: inc.us: ; preds = %loop_begin.us
22 ; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
23 ; CHECK-NEXT: br label %loop_begin.backedge.us
25 ; CHECK: .split: ; preds = %..split_crit_edge
26 ; CHECK-NEXT: %2 = icmp eq i32 %c, 2
27 ; CHECK-NEXT: br i1 %2, label %.split.split.us, label %.split..split.split_crit_edge
29 ; CHECK: .split..split.split_crit_edge: ; preds = %.split
30 ; CHECK-NEXT: br label %.split.split
32 ; CHECK: .split.split.us: ; preds = %.split
33 ; CHECK-NEXT: br label %loop_begin.us1
35 ; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us5, %.split.split.us
36 ; CHECK-NEXT: %var_val.us2 = load i32, i32* %var
37 ; CHECK-NEXT: switch i32 2, label %default.us-lcssa.us-lcssa.us [
38 ; CHECK-NEXT: i32 1, label %inc.split.us
39 ; CHECK-NEXT: i32 2, label %dec.us3
42 ; CHECK: dec.us3: ; preds = %loop_begin.us1
43 ; CHECK-NEXT: call void @decf() [[NOR_NUW]]
44 ; CHECK-NEXT: br label %loop_begin.backedge.us5
46 ; CHECK: .split.split: ; preds = %.split..split.split_crit_edge
47 ; CHECK-NEXT: br label %loop_begin
49 ; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
50 ; CHECK-NEXT: %var_val = load i32, i32* %var
51 ; CHECK-NEXT: switch i32 %c, label %default.us-lcssa.us-lcssa [
52 ; CHECK-NEXT: i32 1, label %inc.split
53 ; CHECK-NEXT: i32 2, label %dec.split
56 ; CHECK: inc.split: ; preds = %loop_begin
57 ; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa, label %inc
59 ; CHECK: dec.split: ; preds = %loop_begin
60 ; CHECK-NEXT: br i1 true, label %us-unreachable6, label %dec
62 define i32 @test(i32* %var) {
64 store i32 2, i32* %mem
65 %c = load i32, i32* %mem
71 %var_val = load i32, i32* %var
73 switch i32 %c, label %default [
79 call void @incf() noreturn nounwind
82 call void @decf() noreturn nounwind
90 declare void @incf() noreturn
91 declare void @decf() noreturn
93 ; CHECK: attributes #0 = { noreturn }
94 ; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }