1 ; RUN: opt -mtriple=amdgcn-- -O3 -S -enable-new-pm=1 %s | FileCheck %s
4 ; Check that loop unswitch happened and condition hoisted out of the loop.
5 ; Condition is uniform so even targets with divergence should perform unswitching.
7 ; This fails with the new pass manager:
8 ; https://bugs.llvm.org/show_bug.cgi?id=48819
9 ; The correct behaviour (allow uniform non-trivial branches to be
10 ; unswitched on all targets) requires access to the function-level
11 ; divergence analysis from a loop transform, which is currently not
12 ; supported in the new pass manager.
14 ; CHECK-LABEL: {{^}}define amdgpu_kernel void @uniform_unswitch
16 ; CHECK-NEXT: [[LOOP_COND:%[a-z0-9]+]] = icmp
17 ; CHECK-NEXT: [[IF_COND:%[a-z0-9]+]] = icmp eq i32 %x, 123456
18 ; CHECK-NEXT: and i1 [[LOOP_COND]], [[IF_COND]]
21 define amdgpu_kernel void @uniform_unswitch(i32 * nocapture %out, i32 %n, i32 %x) {
23 %cmp6 = icmp sgt i32 %n, 0
24 br i1 %cmp6, label %for.body.lr.ph, label %for.cond.cleanup
26 for.body.lr.ph: ; preds = %entry
27 %cmp1 = icmp eq i32 %x, 123456
30 for.cond.cleanup.loopexit: ; preds = %for.inc
31 br label %for.cond.cleanup
33 for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
36 for.body: ; preds = %for.inc, %for.body.lr.ph
37 %i.07 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
38 br i1 %cmp1, label %if.then, label %for.inc
40 if.then: ; preds = %for.body
41 %arrayidx = getelementptr inbounds i32, i32 * %out, i32 %i.07
42 store i32 %i.07, i32 * %arrayidx, align 4
45 for.inc: ; preds = %for.body, %if.then
46 %inc = add nuw nsw i32 %i.07, 1
47 %exitcond = icmp eq i32 %inc, %n
48 br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
51 declare i32 @llvm.amdgcn.workitem.id.x() #0
53 attributes #0 = { nounwind readnone }