| commit | 28d662164daf0f79ba6446f47f3b4974c13b5de6 | |
| author | Tom Stellard <tstellar@redhat.com> | |
| Thu, 8 Nov 2018 17:57:57 +0000 (8 17:57 +0000) | ||
| committer | Tom Stellard <tstellar@redhat.com> | |
| Thu, 8 Nov 2018 17:57:57 +0000 (8 17:57 +0000) | ||
| tree | 0a62b4c9e2a7b059be0127902fa6f468d7ae333a | treesnapshot (tar.gz zip) |
| parent | d6699423f17fa7b0fd8415c3e1733b711f24f5b6 | commitdiff |
InstCombine: Avoid introducing poison values when lowering llvm.amdgcn.[us]bfe
Summary:
When the 3rd argument to these intrinsics is zero, lowering them
to shift instructions produces poison values, since we end up with
shift amounts equal to the number of bits in the shifted value. This
means we can only lower these intrinsics if we can prove that the
3rd argument is not zero.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: bnieuwenhuizen, jvesely, wdng, nhaehnle, llvm-commits
Differential Revision: https://reviews.llvm.org/D53739
llvm-svn: 346422
Summary:
When the 3rd argument to these intrinsics is zero, lowering them
to shift instructions produces poison values, since we end up with
shift amounts equal to the number of bits in the shifted value. This
means we can only lower these intrinsics if we can prove that the
3rd argument is not zero.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: bnieuwenhuizen, jvesely, wdng, nhaehnle, llvm-commits
Differential Revision: https://reviews.llvm.org/D53739
llvm-svn: 346422
| llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp | diffblobblamehistory | |
| llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll | diffblobblamehistory |