[mlir][vector] Bring back `maxf`/`minf` reductions
commit709b27427b4661bdd08fe80b0164acf53c895793
authorDaniil Dudkin <unterumarmung@yandex.ru>
Wed, 13 Sep 2023 22:18:17 +0000 (13 22:18 +0000)
committerDiego Caballero <diegocaballero@google.com>
Wed, 13 Sep 2023 22:49:07 +0000 (13 22:49 +0000)
treec142c4a62e0c71780a7b60341879b8771a236bc9
parent4a831250b871d5fbd5c6923fec4a492ec35f4b12
[mlir][vector] Bring back `maxf`/`minf` reductions

This patch is part of a larger initiative aimed at fixing floating-point `max` and `min` operations in MLIR: https://discourse.llvm.org/t/rfc-fix-floating-point-max-and-min-operations-in-mlir/72671.

In line with the mentioned RFC, this patch  tackles tasks 2.3 and 2.4.
It adds LLVM conversions for the `maxf`/`minf` reductions to the non-NaN-propagating LLVM intrinsics.

Depends on D158618

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D158659
mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir