| commit | 81055ff070e128bff78c8fa2d8ffe4c92ae692a6 | |
| author | arthurqiu <arthurq@nvidia.com> | |
| Wed, 20 Nov 2024 17:31:01 +0000 (21 01:31 +0800) | ||
| committer | GitHub <noreply@github.com> | |
| Wed, 20 Nov 2024 17:31:01 +0000 (20 18:31 +0100) | ||
| tree | e18635ab16808bee7350b42e53294f9c87241837 | treesnapshot (tar.gz zip) |
| parent | 0733f384142b02558b80b3e9a4633dc4d202a14b | commitdiff |
[mlir][nvvm] Add attributes for cluster dimension PTX directives (#116973)
PTX programming models provides cluster dimension directives, which are
leveraged by the downstream `ptxas` compiler. See
https://docs.nvidia.com/cuda/nvvm-ir-spec/#supported-properties and
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#cluster-dimension-directives
This PR introduces the cluster dimension directives to MLIR's NVVM
dialect as listed below:
```
cluster_dim_{x,y,z} -> exact number of CTAs per cluster
cluster_max_blocks -> max number of CTAs per cluster
```
PTX programming models provides cluster dimension directives, which are
leveraged by the downstream `ptxas` compiler. See
https://docs.nvidia.com/cuda/nvvm-ir-spec/#supported-properties and
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#cluster-dimension-directives
This PR introduces the cluster dimension directives to MLIR's NVVM
dialect as listed below:
```
cluster_dim_{x,y,z} -> exact number of CTAs per cluster
cluster_max_blocks -> max number of CTAs per cluster
```