| commit | 8bf298fa95bb23081e9e2507bfb31b017c01be15 | |
| author | Piyou Chen <piyou.chen@sifive.com> | |
| Wed, 14 Aug 2024 10:11:54 +0000 (14 18:11 +0800) | ||
| committer | GitHub <noreply@github.com> | |
| Wed, 14 Aug 2024 10:11:54 +0000 (14 18:11 +0800) | ||
| tree | 6e1421f89664fffca2620fca1eff0d7f1b08e195 | treesnapshot (tar.gz zip) |
| parent | 2fc7a72733762d685a07f846b44dc17a0585098e | commitdiff |
[RISCV][compiler-rt] create __riscv__cpu_model for vendorID, ArchID, … (#101449)
…ImplID
This patch
1. remove the vendorId from `__riscv_vendor_feature_bits`
2. Define a new structure for vendorID, ArchID and ImplID
3. Update the relate init code
…ImplID
This patch
1. remove the vendorId from `__riscv_vendor_feature_bits`
2. Define a new structure for vendorID, ArchID and ImplID
3. Update the relate init code
| compiler-rt/lib/builtins/cpu_model/riscv.c | diffblobblamehistory |