| commit | f5056c8c16bb732a83ec12776e01915af717917b | |
| author | Andrew Wei <weiwei64@huawei.com> | |
| Mon, 18 Oct 2021 13:11:24 +0000 (18 21:11 +0800) | ||
| committer | Andrew Wei <weiwei64@huawei.com> | |
| Mon, 18 Oct 2021 13:24:45 +0000 (18 21:24 +0800) | ||
| tree | 8a7229415430b2bd6faa2be6b4c65cd6344d5b6e | treesnapshot (tar.gz zip) |
| parent | 1ef6bd9b1bffb3f0314840ad95cd554366fdbda7 | commitdiff |
[AArch64] Improve shuffle vector by using wider types
Try to widen element type to get a new mask value for a better permutation
sequence, so that we can use NEON shuffle instructions, such as zip1/2,
UZP1/2, TRN1/2, REV, INS, etc.
For example:
shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 2, i32 3>
is equivalent to:
shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 1>
Finally, we can get:
mov v0.d[0], v1.d[1]
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D111619
Try to widen element type to get a new mask value for a better permutation
sequence, so that we can use NEON shuffle instructions, such as zip1/2,
UZP1/2, TRN1/2, REV, INS, etc.
For example:
shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 2, i32 3>
is equivalent to:
shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 1>
Finally, we can get:
mov v0.d[0], v1.d[1]
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D111619