1 ; RUN: opt < %s -instcombine -S
2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128:n8:16:32"
3 target triple = "i386-apple-darwin10.0"
5 define i32 @test0(i8 %tmp2) ssp {
7 %tmp3 = zext i8 %tmp2 to i32
8 %tmp8 = lshr i32 %tmp3, 6
9 %tmp9 = lshr i32 %tmp3, 7
10 %tmp10 = xor i32 %tmp9, 67108858
11 %tmp11 = xor i32 %tmp10, %tmp8
12 %tmp12 = xor i32 %tmp11, 0
17 define <2 x i64> @test1(<2 x i64> %x, <2 x i64> %y) nounwind {
19 %conv.i94 = bitcast <2 x i64> %y to <4 x i32> ; <<4 x i32>> [#uses=1]
20 %sub.i97 = sub <4 x i32> %conv.i94, undef ; <<4 x i32>> [#uses=1]
21 %conv3.i98 = bitcast <4 x i32> %sub.i97 to <2 x i64> ; <<2 x i64>> [#uses=2]
22 %conv2.i86 = bitcast <2 x i64> %conv3.i98 to <4 x i32> ; <<4 x i32>> [#uses=1]
23 %cmp.i87 = icmp sgt <4 x i32> undef, %conv2.i86 ; <<4 x i1>> [#uses=1]
24 %sext.i88 = sext <4 x i1> %cmp.i87 to <4 x i32> ; <<4 x i32>> [#uses=1]
25 %conv3.i89 = bitcast <4 x i32> %sext.i88 to <2 x i64> ; <<2 x i64>> [#uses=1]
26 %and.i = and <2 x i64> %conv3.i89, %conv3.i98 ; <<2 x i64>> [#uses=1]
27 %or.i = or <2 x i64> zeroinitializer, %and.i ; <<2 x i64>> [#uses=1]
28 %conv2.i43 = bitcast <2 x i64> %or.i to <4 x i32> ; <<4 x i32>> [#uses=1]
29 %sub.i = sub <4 x i32> zeroinitializer, %conv2.i43 ; <<4 x i32>> [#uses=1]
30 %conv3.i44 = bitcast <4 x i32> %sub.i to <2 x i64> ; <<2 x i64>> [#uses=1]
31 ret <2 x i64> %conv3.i44
36 define void @test2(<1 x i16>* nocapture %b, i32* nocapture %c) nounwind ssp {
38 %arrayidx = getelementptr inbounds <1 x i16>* %b, i64 undef ; <<1 x i16>*>
39 %tmp2 = load <1 x i16>* %arrayidx ; <<1 x i16>> [#uses=1]
40 %tmp6 = bitcast <1 x i16> %tmp2 to i16 ; <i16> [#uses=1]
41 %tmp7 = zext i16 %tmp6 to i32 ; <i32> [#uses=1]
42 %ins = or i32 0, %tmp7 ; <i32> [#uses=1]
43 %arrayidx20 = getelementptr inbounds i32* %c, i64 undef ; <i32*> [#uses=1]
44 store i32 %ins, i32* %arrayidx20
49 @tmp2 = global i64 0 ; <i64*> [#uses=1]
51 declare void @use(i64) nounwind
53 define void @foo(i1) nounwind align 2 {
55 br i1 %0, label %2, label %3
57 ; <label>:2 ; preds = %1
60 ; <label>:3 ; preds = %2, %1
61 %4 = phi i8 [ 1, %2 ], [ 0, %1 ] ; <i8> [#uses=1]
62 %5 = icmp eq i8 %4, 0 ; <i1> [#uses=1]
63 %6 = load i64* @tmp2, align 8 ; <i64> [#uses=1]
64 %7 = select i1 %5, i64 0, i64 %6 ; <i64> [#uses=1]
67 ; <label>:8 ; preds = %3
68 call void @use(i64 %7)
72 %t0 = type { i32, i32 }
73 %t1 = type { i32, i32, i32, i32, i32* }
75 declare %t0* @bar2(i64)
77 define void @bar3(i1, i1) nounwind align 2 {
79 br i1 %1, label %10, label %3
81 ; <label>:3 ; preds = %2
82 %4 = getelementptr inbounds %t0* null, i64 0, i32 1 ; <i32*> [#uses=0]
83 %5 = getelementptr inbounds %t1* null, i64 0, i32 4 ; <i32**> [#uses=1]
84 %6 = load i32** %5, align 8 ; <i32*> [#uses=1]
85 %7 = icmp ne i32* %6, null ; <i1> [#uses=1]
86 %8 = zext i1 %7 to i32 ; <i32> [#uses=1]
87 %9 = add i32 %8, 0 ; <i32> [#uses=1]
90 ; <label>:10 ; preds = %3, %2
91 %11 = phi i32 [ %9, %3 ], [ 0, %2 ] ; <i32> [#uses=1]
92 br i1 %1, label %12, label %13
94 ; <label>:12 ; preds = %10
97 ; <label>:13 ; preds = %12, %10
98 %14 = zext i32 %11 to i64 ; <i64> [#uses=1]
99 %15 = tail call %t0* @bar2(i64 %14) nounwind ; <%0*> [#uses=0]
107 ; Make sure the PHI node gets put in a place where all of its operands dominate
109 define i64 @test4(i1 %c, i64* %P) nounwind align 2 {
111 br i1 %c, label %BB1, label %BB2
117 %v5_ = phi i1 [ true, %BB0], [false, %BB1]
125 %v11 = select i1 %v5_, i64 0, i64 %v6
130 define i32 @test5a() {
134 define void @test5() {
135 store i1 true, i1* undef
136 %1 = invoke i32 @test5a() to label %exit unwind label %exit
144 @test6g = external global i32*
146 define arm_aapcs_vfpcc i32 @test6(i32 %argc, i8** %argv) nounwind {
148 store i32* getelementptr (i32* bitcast (i32 (i32, i8**)* @test6 to i32*), i32 -2048), i32** @test6g, align 4
155 %class.RuleBasedBreakIterator = type { i64 ()* }
156 %class.UStack = type { i8** }
158 define i32 @_ZN22RuleBasedBreakIterator15checkDictionaryEi(%class.RuleBasedBreakIterator* %this, i32 %x) align 2 {
160 %breaks = alloca %class.UStack, align 4 ; <%class.UStack*> [#uses=3]
161 call void @_ZN6UStackC1Ei(%class.UStack* %breaks, i32 0)
162 %tobool = icmp ne i32 %x, 0 ; <i1> [#uses=1]
163 br i1 %tobool, label %cond.end, label %cond.false
165 terminate.handler: ; preds = %ehcleanup
166 %exc = call i8* @llvm.eh.exception() ; <i8*> [#uses=1]
167 %0 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exc, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i32 1) ; <i32> [#uses=0]
168 call void @_ZSt9terminatev() noreturn nounwind
171 ehcleanup: ; preds = %cond.false
172 %exc1 = call i8* @llvm.eh.exception() ; <i8*> [#uses=2]
173 %1 = call i32 (i8*, i8*, ...)* @llvm.eh.selector(i8* %exc1, i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*), i8* null) ; <i32> [#uses=0]
174 invoke void @_ZN6UStackD1Ev(%class.UStack* %breaks)
175 to label %cont unwind label %terminate.handler
177 cont: ; preds = %ehcleanup
178 call void @_Unwind_Resume_or_Rethrow(i8* %exc1)
181 cond.false: ; preds = %entry
182 %tmp4 = getelementptr inbounds %class.RuleBasedBreakIterator* %this, i32 0, i32 0 ; <i64 ()**> [#uses=1]
183 %tmp5 = load i64 ()** %tmp4 ; <i64 ()*> [#uses=1]
184 %call = invoke i64 %tmp5()
185 to label %cond.end unwind label %ehcleanup ; <i64> [#uses=1]
187 cond.end: ; preds = %cond.false, %entry
188 %cond = phi i64 [ 0, %entry ], [ %call, %cond.false ] ; <i64> [#uses=1]
189 %conv = trunc i64 %cond to i32 ; <i32> [#uses=1]
190 call void @_ZN6UStackD1Ev(%class.UStack* %breaks)
194 declare void @_ZN6UStackC1Ei(%class.UStack*, i32)
196 declare void @_ZN6UStackD1Ev(%class.UStack*)
198 declare i32 @__gxx_personality_v0(...)
200 declare i8* @llvm.eh.exception() nounwind readonly
202 declare i32 @llvm.eh.selector(i8*, i8*, ...) nounwind
204 declare void @_ZSt9terminatev()
206 declare void @_Unwind_Resume_or_Rethrow(i8*)
211 define i8* @test10(i8* %self, i8* %tmp3) {
213 store i1 true, i1* undef
214 store i1 true, i1* undef
215 invoke void @test10a()
216 to label %invoke.cont unwind label %try.handler ; <i8*> [#uses=0]
218 invoke.cont: ; preds = %entry
221 try.handler: ; preds = %entry
225 define void @test10a() {
231 define i32 @test11(i32 %aMaskWidth, i8 %aStride) nounwind {
233 %conv41 = sext i8 %aStride to i32
234 %neg = xor i32 %conv41, -1
235 %and42 = and i32 %aMaskWidth, %neg
236 %and47 = and i32 130, %conv41
237 %or = or i32 %and42, %and47
242 define void @test12(i32* %A) nounwind {
245 %cmp = icmp ugt i32 1, %tmp1 ; <i1> [#uses=1]
246 %conv = zext i1 %cmp to i32 ; <i32> [#uses=1]
248 %cmp3 = icmp ne i32 %tmp2, 0 ; <i1> [#uses=1]
249 %conv4 = zext i1 %cmp3 to i32 ; <i32> [#uses=1]
250 %or = or i32 %conv, %conv4 ; <i32> [#uses=1]
251 %cmp5 = icmp ugt i32 undef, %or ; <i1> [#uses=1]
252 %conv6 = zext i1 %cmp5 to i32 ; <i32> [#uses=0]
256 %s1 = type { %s2, %s2, [6 x %s2], i32, i32, i32, [1 x i32], [0 x i8] }
258 define void @test13() nounwind ssp {
260 %0 = getelementptr inbounds %s1* null, i64 0, i32 2, i64 0, i32 0
261 %1 = bitcast i64* %0 to i32*
262 %2 = getelementptr inbounds %s1* null, i64 0, i32 2, i64 1, i32 0
263 %.pre = load i32* %1, align 8
264 %3 = lshr i32 %.pre, 19
265 %brmerge = or i1 undef, undef
267 %5 = add nsw i32 %4, 1
269 %7 = add i32 %6, 1572864
270 %8 = and i32 %7, 1572864
271 %9 = load i64* %2, align 8
272 %trunc156 = trunc i64 %9 to i32
273 %10 = and i32 %trunc156, -1537
274 %11 = and i32 %10, -6145
275 %12 = or i32 %11, 2048
276 %13 = and i32 %12, -24577
277 %14 = or i32 %13, 16384
278 %15 = or i32 %14, 98304
279 store i32 %15, i32* undef, align 8
280 %16 = and i32 %15, -1572865
282 store i32 %17, i32* undef, align 8
283 %18 = and i32 %17, -449
285 store i32 %19, i32* undef, align 8
291 declare i32 @test14f(i8* (i8*)*) nounwind
293 define void @test14() nounwind readnone {
295 %tmp = bitcast i32 (i8* (i8*)*)* @test14f to i32 (i32*)*
296 %call10 = call i32 %tmp(i32* byval undef)