1 ; This test makes sure that these instructions are properly eliminated.
3 ; RUN: opt < %s -instcombine -S | FileCheck %s
5 define i32 @test1(i32 %A) {
8 %B = shl i32 %A, 0 ; <i32> [#uses=1]
12 define i32 @test2(i8 %A) {
15 %shift.upgrd.1 = zext i8 %A to i32 ; <i32> [#uses=1]
16 %B = shl i32 0, %shift.upgrd.1 ; <i32> [#uses=1]
20 define i32 @test3(i32 %A) {
23 %B = ashr i32 %A, 0 ; <i32> [#uses=1]
27 define i32 @test4(i8 %A) {
30 %shift.upgrd.2 = zext i8 %A to i32 ; <i32> [#uses=1]
31 %B = ashr i32 0, %shift.upgrd.2 ; <i32> [#uses=1]
36 define i32 @test5(i32 %A) {
39 %B = lshr i32 %A, 32 ;; shift all bits out
43 define i32 @test5a(i32 %A) {
46 %B = shl i32 %A, 32 ;; shift all bits out
50 define i32 @test6(i32 %A) {
52 ; CHECK-NEXT: mul i32 %A, 6
54 %B = shl i32 %A, 1 ;; convert to an mul instruction
59 define i32 @test7(i8 %A) {
61 ; CHECK-NEXT: ret i32 -1
62 %shift.upgrd.3 = zext i8 %A to i32
63 %B = ashr i32 -1, %shift.upgrd.3 ;; Always equal to -1
67 ;; (A << 5) << 3 === A << 8 == 0
68 define i8 @test8(i8 %A) {
71 %B = shl i8 %A, 5 ; <i8> [#uses=1]
72 %C = shl i8 %B, 3 ; <i8> [#uses=1]
76 ;; (A << 7) >> 7 === A & 1
77 define i8 @test9(i8 %A) {
79 ; CHECK-NEXT: and i8 %A, 1
81 %B = shl i8 %A, 7 ; <i8> [#uses=1]
82 %C = lshr i8 %B, 7 ; <i8> [#uses=1]
86 ;; (A >> 7) << 7 === A & 128
87 define i8 @test10(i8 %A) {
89 ; CHECK-NEXT: and i8 %A, -128
91 %B = lshr i8 %A, 7 ; <i8> [#uses=1]
92 %C = shl i8 %B, 7 ; <i8> [#uses=1]
96 ;; (A >> 3) << 4 === (A & 0x1F) << 1
97 define i8 @test11(i8 %A) {
99 ; CHECK-NEXT: mul i8 %A, 6
102 %a = mul i8 %A, 3 ; <i8> [#uses=1]
103 %B = lshr i8 %a, 3 ; <i8> [#uses=1]
104 %C = shl i8 %B, 4 ; <i8> [#uses=1]
108 ;; (A >> 8) << 8 === A & -256
109 define i32 @test12(i32 %A) {
111 ; CHECK-NEXT: and i32 %A, -256
112 ; CHECK-NEXT: ret i32
113 %B = ashr i32 %A, 8 ; <i32> [#uses=1]
114 %C = shl i32 %B, 8 ; <i32> [#uses=1]
118 ;; (A >> 3) << 4 === (A & -8) * 2
119 define i8 @test13(i8 %A) {
121 ; CHECK-NEXT: mul i8 %A, 6
124 %a = mul i8 %A, 3 ; <i8> [#uses=1]
125 %B = ashr i8 %a, 3 ; <i8> [#uses=1]
126 %C = shl i8 %B, 4 ; <i8> [#uses=1]
130 ;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
131 define i32 @test14(i32 %A) {
133 ; CHECK-NEXT: %B = and i32 %A, -19760
134 ; CHECK-NEXT: or i32 %B, 19744
135 ; CHECK-NEXT: ret i32
136 %B = lshr i32 %A, 4 ; <i32> [#uses=1]
137 %C = or i32 %B, 1234 ; <i32> [#uses=1]
138 %D = shl i32 %C, 4 ; <i32> [#uses=1]
142 ;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
143 define i32 @test14a(i32 %A) {
145 ; CHECK-NEXT: and i32 %A, 77
146 ; CHECK-NEXT: ret i32
147 %B = shl i32 %A, 4 ; <i32> [#uses=1]
148 %C = and i32 %B, 1234 ; <i32> [#uses=1]
149 %D = lshr i32 %C, 4 ; <i32> [#uses=1]
153 define i32 @test15(i1 %C) {
155 ; CHECK-NEXT: select i1 %C, i32 12, i32 4
156 ; CHECK-NEXT: ret i32
157 %A = select i1 %C, i32 3, i32 1 ; <i32> [#uses=1]
158 %V = shl i32 %A, 2 ; <i32> [#uses=1]
162 define i32 @test15a(i1 %C) {
164 ; CHECK-NEXT: select i1 %C, i32 512, i32 128
165 ; CHECK-NEXT: ret i32
166 %A = select i1 %C, i8 3, i8 1 ; <i8> [#uses=1]
167 %shift.upgrd.4 = zext i8 %A to i32 ; <i32> [#uses=1]
168 %V = shl i32 64, %shift.upgrd.4 ; <i32> [#uses=1]
172 define i1 @test16(i32 %X) {
174 ; CHECK-NEXT: and i32 %X, 16
175 ; CHECK-NEXT: icmp ne i32
177 %tmp.3 = ashr i32 %X, 4
178 %tmp.6 = and i32 %tmp.3, 1
179 %tmp.7 = icmp ne i32 %tmp.6, 0
183 define i1 @test17(i32 %A) {
185 ; CHECK-NEXT: and i32 %A, -8
186 ; CHECK-NEXT: icmp eq i32
188 %B = lshr i32 %A, 3 ; <i32> [#uses=1]
189 %C = icmp eq i32 %B, 1234 ; <i1> [#uses=1]
194 define i1 @test18(i8 %A) {
196 ; CHECK: ret i1 false
198 %B = lshr i8 %A, 7 ; <i8> [#uses=1]
200 %C = icmp eq i8 %B, 123 ; <i1> [#uses=1]
204 define i1 @test19(i32 %A) {
206 ; CHECK-NEXT: icmp ult i32 %A, 4
208 %B = ashr i32 %A, 2 ; <i32> [#uses=1]
210 %C = icmp eq i32 %B, 0 ; <i1> [#uses=1]
215 define i1 @test19a(i32 %A) {
217 ; CHECK-NEXT: and i32 %A, -4
218 ; CHECK-NEXT: icmp eq i32
220 %B = ashr i32 %A, 2 ; <i32> [#uses=1]
222 %C = icmp eq i32 %B, -1 ; <i1> [#uses=1]
226 define i1 @test20(i8 %A) {
228 ; CHECK: ret i1 false
229 %B = ashr i8 %A, 7 ; <i8> [#uses=1]
231 %C = icmp eq i8 %B, 123 ; <i1> [#uses=1]
235 define i1 @test21(i8 %A) {
237 ; CHECK-NEXT: and i8 %A, 15
238 ; CHECK-NEXT: icmp eq i8
240 %B = shl i8 %A, 4 ; <i8> [#uses=1]
241 %C = icmp eq i8 %B, -128 ; <i1> [#uses=1]
245 define i1 @test22(i8 %A) {
247 ; CHECK-NEXT: and i8 %A, 15
248 ; CHECK-NEXT: icmp eq i8
250 %B = shl i8 %A, 4 ; <i8> [#uses=1]
251 %C = icmp eq i8 %B, 0 ; <i1> [#uses=1]
255 define i8 @test23(i32 %A) {
257 ; CHECK-NEXT: trunc i32 %A to i8
261 %B = shl i32 %A, 24 ; <i32> [#uses=1]
262 %C = ashr i32 %B, 24 ; <i32> [#uses=1]
263 %D = trunc i32 %C to i8 ; <i8> [#uses=1]
267 define i8 @test24(i8 %X) {
269 ; CHECK-NEXT: and i8 %X, 3
271 %Y = and i8 %X, -5 ; <i8> [#uses=1]
272 %Z = shl i8 %Y, 5 ; <i8> [#uses=1]
273 %Q = ashr i8 %Z, 5 ; <i8> [#uses=1]
277 define i32 @test25(i32 %tmp.2, i32 %AA) {
279 ; CHECK-NEXT: and i32 %tmp.2, -131072
280 ; CHECK-NEXT: add i32 %{{[^,]*}}, %AA
281 ; CHECK-NEXT: and i32 %{{[^,]*}}, -131072
282 ; CHECK-NEXT: ret i32
283 %x = lshr i32 %AA, 17 ; <i32> [#uses=1]
284 %tmp.3 = lshr i32 %tmp.2, 17 ; <i32> [#uses=1]
285 %tmp.5 = add i32 %tmp.3, %x ; <i32> [#uses=1]
286 %tmp.6 = shl i32 %tmp.5, 17 ; <i32> [#uses=1]
290 ;; handle casts between shifts.
291 define i32 @test26(i32 %A) {
293 ; CHECK-NEXT: and i32 %A, -2
294 ; CHECK-NEXT: ret i32
295 %B = lshr i32 %A, 1 ; <i32> [#uses=1]
296 %C = bitcast i32 %B to i32 ; <i32> [#uses=1]
297 %D = shl i32 %C, 1 ; <i32> [#uses=1]
302 define i1 @test27(i32 %x) nounwind {
304 ; CHECK-NEXT: and i32 %x, 8
305 ; CHECK-NEXT: icmp ne i32
308 %z = trunc i32 %y to i1
312 define i8 @test28(i8 %x) {
315 ; CHECK: icmp slt i8 %x, 0
317 %tmp1 = lshr i8 %x, 7
318 %cond1 = icmp ne i8 %tmp1, 0
319 br i1 %cond1, label %bb1, label %bb2
328 define i8 @test28a(i8 %x, i8 %y) {
330 ; This shouldn't be transformed.
332 ; CHECK: %tmp1 = lshr i8 %x, 7
333 ; CHECK: %cond1 = icmp eq i8 %tmp1, 0
334 ; CHECK: br i1 %cond1, label %bb2, label %bb1
335 %tmp1 = lshr i8 %x, 7
336 %cond1 = icmp ne i8 %tmp1, 0
337 br i1 %cond1, label %bb1, label %bb2
341 %tmp2 = add i8 %tmp1, %y
346 define i32 @test29(i64 %d18) {
348 %tmp916 = lshr i64 %d18, 32
349 %tmp917 = trunc i64 %tmp916 to i32
350 %tmp10 = lshr i32 %tmp917, 31
353 ; CHECK: %tmp916 = lshr i64 %d18, 63
354 ; CHECK: %tmp10 = trunc i64 %tmp916 to i32
358 define i32 @test30(i32 %A, i32 %B, i32 %C) {
364 ; CHECK: %X1 = and i32 %A, %B
365 ; CHECK: %Z = shl i32 %X1, %C
368 define i32 @test31(i32 %A, i32 %B, i32 %C) {
374 ; CHECK: %X1 = or i32 %A, %B
375 ; CHECK: %Z = lshr i32 %X1, %C
378 define i32 @test32(i32 %A, i32 %B, i32 %C) {
384 ; CHECK: %X1 = xor i32 %A, %B
385 ; CHECK: %Z = ashr i32 %X1, %C
389 define i1 @test33(i32 %X) {
390 %tmp1 = shl i32 %X, 7
391 %tmp2 = icmp slt i32 %tmp1, 0
394 ; CHECK: %tmp1.mask = and i32 %X, 16777216
395 ; CHECK: %tmp2 = icmp ne i32 %tmp1.mask, 0
398 define i1 @test34(i32 %X) {
399 %tmp1 = lshr i32 %X, 7
400 %tmp2 = icmp slt i32 %tmp1, 0
403 ; CHECK: ret i1 false
406 define i1 @test35(i32 %X) {
407 %tmp1 = ashr i32 %X, 7
408 %tmp2 = icmp slt i32 %tmp1, 0
411 ; CHECK: %tmp2 = icmp slt i32 %X, 0
412 ; CHECK: ret i1 %tmp2
415 define i128 @test36(i128 %A, i128 %B) {
417 %tmp27 = shl i128 %A, 64
418 %tmp23 = shl i128 %B, 64
419 %ins = or i128 %tmp23, %tmp27
420 %tmp45 = lshr i128 %ins, 64
424 ; CHECK: %tmp231 = or i128 %B, %A
425 ; CHECK: %ins = and i128 %tmp231, 18446744073709551615
426 ; CHECK: ret i128 %ins
429 define i64 @test37(i128 %A, i32 %B) {
431 %tmp27 = shl i128 %A, 64
432 %tmp22 = zext i32 %B to i128
433 %tmp23 = shl i128 %tmp22, 96
434 %ins = or i128 %tmp23, %tmp27
435 %tmp45 = lshr i128 %ins, 64
436 %tmp46 = trunc i128 %tmp45 to i64
440 ; CHECK: %tmp23 = shl i128 %tmp22, 32
441 ; CHECK: %ins = or i128 %tmp23, %A
442 ; CHECK: %tmp46 = trunc i128 %ins to i64
445 define i32 @test38(i32 %x) nounwind readnone {
446 %rem = srem i32 %x, 32
447 %shl = shl i32 1, %rem
450 ; CHECK-NEXT: and i32 %x, 31
451 ; CHECK-NEXT: shl i32 1
452 ; CHECK-NEXT: ret i32
455 ; <rdar://problem/8756731>
457 define i8 @test39(i32 %a0) {
459 %tmp4 = trunc i32 %a0 to i8
460 ; CHECK: and i8 %tmp49, 64
461 %tmp5 = shl i8 %tmp4, 5
462 %tmp48 = and i8 %tmp5, 32
463 %tmp49 = lshr i8 %tmp48, 5
464 %tmp50 = mul i8 %tmp49, 64
465 %tmp51 = xor i8 %tmp50, %tmp5
466 ; CHECK: and i8 %0, 16
467 %tmp52 = and i8 %tmp51, -128
468 %tmp53 = lshr i8 %tmp52, 7
469 %tmp54 = mul i8 %tmp53, 16
470 %tmp55 = xor i8 %tmp54, %tmp51
471 ; CHECK: ret i8 %tmp551