| commit | 56cfcd7b81fd45eae68c8b40a058b41a79640fe8 | |
| author | Evan Cheng <evan.cheng@apple.com> | |
| Mon, 11 May 2009 22:33:01 +0000 (11 22:33 +0000) | ||
| committer | Evan Cheng <evan.cheng@apple.com> | |
| Mon, 11 May 2009 22:33:01 +0000 (11 22:33 +0000) | ||
| tree | 70eb5ebee02553ba2b892ce1ff7f7bbaad77a682 | treesnapshot (tar.gz zip) |
| parent | 4e32b79171e2ff19f2061ce7ae5fe9f3693ebbb3 | commitdiff |
Teach LSR to optimize more loop exit compares, i.e. change them to use postinc iv value. Previously LSR would only optimize those which are in the loop latch block. However, if LSR can prove it is safe (and profitable), it's now possible to change those not in the latch blocks to use postinc values.
Also, if the compare is the only use, LSR would place the iv increment instruction before the compare instead in the latch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71485 91177308-0d34-0410-b5e6-96231b3b80d8
Also, if the compare is the only use, LSR would place the iv increment instruction before the compare instead in the latch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71485 91177308-0d34-0410-b5e6-96231b3b80d8
| lib/Transforms/Scalar/LoopStrengthReduce.cpp | diffblobblamehistory | |
| test/CodeGen/X86/lsr-loop-exit-cond.ll | [new file with mode: 0644] | blob |
| test/CodeGen/X86/lsr-negative-stride.ll | diffblobblamehistory | |
| test/CodeGen/X86/remat-mov-1.ll | [moved from test/CodeGen/X86/remat-mov0.ll with 95% similarity] | diffblobblamehistory |