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Fixed some bugs.
[llvm/zpu.git]
/
test
/
CodeGen
/
X86
/
sext-ret-val.ll
blob
da1a1871e7e8ca304df54800e2fa825dca74c543
1
; RUN: llc < %s -march=x86 | grep movzbl | count 1
2
; rdar://6699246
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define signext i8 @t1(i8* %A) nounwind readnone ssp {
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entry:
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%0 = icmp ne i8* %A, null
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%1 = zext i1 %0 to i8
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ret i8 %1
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}
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define i8 @t2(i8* %A) nounwind readnone ssp {
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entry:
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%0 = icmp ne i8* %A, null
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%1 = zext i1 %0 to i8
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ret i8 %1
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}