From 432e8dfb84bf737a85282a008b7e6fd715a55823 Mon Sep 17 00:00:00 2001 From: carl Date: Wed, 24 Nov 2010 19:16:17 +0100 Subject: [PATCH] zpu: a little less Frankenstein in the stackpass Plan is to make the stack pass work in a very simple way. For LHS registers a new stockslot will be created only once, RHS registers will use previous created stackslots. So r0 = load ... r1 = load ... r2 = add r1,r0 will be [sp0] = load ... [sp1] = load ... [sp2] = add [sp1],[sp0] --- lib/Target/ZPU/AsmPrinter/ZPUAsmPrinter.cpp | 6 ++- lib/Target/ZPU/ZPUInstrInfo.td | 10 ++++- lib/Target/ZPU/ZPUStackSlot.cpp | 63 ++++++++++++++++++++--------- 3 files changed, 57 insertions(+), 22 deletions(-) mode change 100644 => 100755 lib/Target/ZPU/AsmPrinter/ZPUAsmPrinter.cpp mode change 100644 => 100755 lib/Target/ZPU/ZPUInstrInfo.td mode change 100644 => 100755 lib/Target/ZPU/ZPUStackSlot.cpp diff --git a/lib/Target/ZPU/AsmPrinter/ZPUAsmPrinter.cpp b/lib/Target/ZPU/AsmPrinter/ZPUAsmPrinter.cpp old mode 100644 new mode 100755 index cc91093b19..fd423f0f8d --- a/lib/Target/ZPU/AsmPrinter/ZPUAsmPrinter.cpp +++ b/lib/Target/ZPU/AsmPrinter/ZPUAsmPrinter.cpp @@ -177,6 +177,7 @@ bool ZPUAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, void ZPUAsmPrinter::printOperand(const MachineInstr *MI, int opNum, raw_ostream &O) { + const MachineOperand &MO = MI->getOperand (opNum); bool CloseParen = false; switch (MO.getType()) { @@ -211,8 +212,9 @@ void ZPUAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum, void ZPUAsmPrinter:: printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier) { - printOperand(MI, opNum+1, O); - O << ", "; + + printOperand(MI, opNum+1, O); + O << ", mem "; printOperand(MI, opNum, O); } diff --git a/lib/Target/ZPU/ZPUInstrInfo.td b/lib/Target/ZPU/ZPUInstrInfo.td old mode 100644 new mode 100755 index 45f4f93e06..09f011814a --- a/lib/Target/ZPU/ZPUInstrInfo.td +++ b/lib/Target/ZPU/ZPUInstrInfo.td @@ -54,7 +54,7 @@ def ZPUSTOREREG : ZPUIm <(outs), (ins memdst:$dst, CPURegs:$a), def ZPULOAD : ZPUIm <(outs CPURegs:$dst), (ins memdst:$src), - "load $src $dst", + "im $src\n\tload $dst", [(set CPURegs:$dst, (load tglobaladdr:$src))]>; def ZPUSTORSTACKSLOT : ZPUIm <(outs), (ins mem:$dst, CPURegs:$a), @@ -68,4 +68,10 @@ def ZPULOADSTACKSLOT : ZPUIm <(outs CPURegs:$dst), (ins mem:$src), def ADDSP : ZPUIm <(outs), (ins mem:$dst, mem:$a, mem:$b), "addsp $dst $a $b", [(store (add addr:$a, addr:$b), addr:$dst)]>; - \ No newline at end of file + +def ZPUPSEUDOSTORESP : ZPUIm <(outs), (ins i32imm:$dst), + "storesp $dst ",[]>; + +def ZPUPSEUDOLOADSP : ZPUIm <(outs), (ins i32imm:$src), + "loadsp $src ",[]>; + \ No newline at end of file diff --git a/lib/Target/ZPU/ZPUStackSlot.cpp b/lib/Target/ZPU/ZPUStackSlot.cpp old mode 100644 new mode 100755 index 59e63dcd61..593c49a1d2 --- a/lib/Target/ZPU/ZPUStackSlot.cpp +++ b/lib/Target/ZPU/ZPUStackSlot.cpp @@ -43,6 +43,7 @@ #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" #include + using namespace llvm; @@ -75,6 +76,11 @@ FunctionPass *llvm::createZPUStackSlotPass() { return new ZPUStackSlot(); } /// bool ZPUStackSlot::runOnMachineFunction(MachineFunction &Fn) { + // Reg to stack mapping, replace by proper map + int RegToStack[1024]; + + memset(&RegToStack[0],-1,sizeof(RegToStack[0])*1024); + bool foundmore = false; const TargetInstrInfo *TII = Fn.getTarget().getInstrInfo(); for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E; @@ -82,6 +88,7 @@ bool ZPUStackSlot::runOnMachineFunction(MachineFunction &Fn) { MachineBasicBlock *MBB = MFI; + for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end(); MBBI != EE; ++MBBI) { /* @@ -89,11 +96,14 @@ bool ZPUStackSlot::runOnMachineFunction(MachineFunction &Fn) */ const MachineInstr &MI = *MBBI; DebugLoc dl = MI.getDebugLoc(); - + + //MBBI->dump(); bool found = false; for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { const MachineOperand &MO = MI.getOperand(i); - if (MO.isReg()) + + + if (MO.isReg() ) { unsigned Reg = MO.getReg(); if (Reg >= ZPU::R0 && Reg <= ZPU::R3) @@ -114,32 +124,49 @@ bool ZPUStackSlot::runOnMachineFunction(MachineFunction &Fn) // DebugLoc DL, // const TargetInstrDesc &TID) const MachineInstr &MI = *MBBI; - MachineInstrBuilder b = BuildMI(*MBB, MBBI, dl, TII->get(MI.getOpcode())); - for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { + + MachineInstrBuilder b = BuildMI(*MBB, MBBI, dl, TII->get(MI.getOpcode())); + + for (unsigned i = 0, e = MI.getNumOperands(); i!=e;i++) { const MachineOperand &MO = MI.getOperand(i); + if (MO.isReg()) { - unsigned Reg = MO.getReg(); - if (Reg >= ZPU::R0 && Reg <= ZPU::R3) - { - - MachineFrameInfo *MFI = Fn.getFrameInfo(); - int FrameIdx; - FrameIdx = MFI->CreateStackObject(4, 4, true); - - b.addFrameIndex(FrameIdx); - - } else - { - ((MachineInstr*)b)->addOperand(MO); - } + unsigned Reg = MO.getReg(); + if (Reg >= ZPU::R0 && Reg <= ZPU::R3) + { + int FrameIdx; + + MachineFrameInfo *MFI = Fn.getFrameInfo(); + + // Determine if a new stack slot is required + if( RegToStack[Reg] == -1 ) + { + FrameIdx = MFI->CreateStackObject(4, 4, true); + + RegToStack[Reg] = FrameIdx; + } + else + { + FrameIdx = RegToStack[Reg]; + } + + b.addFrameIndex(FrameIdx); + } + else + { + ((MachineInstr*)b)->addOperand(MO); + } + } else { ((MachineInstr*)b)->addOperand(MO); } } + MBB->remove(MBBI--); + //MBB->dump(); } } } -- 2.11.4.GIT