From 626330ac7e4c0ad20f6c076f06d19b333a1e0354 Mon Sep 17 00:00:00 2001
From: =?utf8?q?=C3=98yvind=20Harboe?= <oyvind.harboe@zylin.com>
Date: Sun, 21 Nov 2010 13:18:26 +0100
Subject: [PATCH] zpu: wip - add pass to convert registers to stack slots

Empty so far, but this is presumably where the magic should
go. This is taken from x86 FPU stack reg pass.
---
 lib/Target/ZPU/ZPU.h                |  2 +-
 lib/Target/ZPU/ZPUStackSlot.cpp     | 81 +++++++++++++++++++++++++++++++++++++
 lib/Target/ZPU/ZPUTargetMachine.cpp |  6 +++
 lib/Target/ZPU/ZPUTargetMachine.h   |  1 +
 4 files changed, 89 insertions(+), 1 deletion(-)
 create mode 100644 lib/Target/ZPU/ZPUStackSlot.cpp

diff --git a/lib/Target/ZPU/ZPU.h b/lib/Target/ZPU/ZPU.h
index 1b294d3f2f..30d1683545 100644
--- a/lib/Target/ZPU/ZPU.h
+++ b/lib/Target/ZPU/ZPU.h
@@ -25,7 +25,7 @@ namespace llvm {
 
   FunctionPass *createZPUISelDag(ZPUTargetMachine &TM);
   FunctionPass *createZPUDelaySlotFillerPass(ZPUTargetMachine &TM);
-
+  FunctionPass *createZPUStackSlotPass();
   extern Target TheZPUTarget;
 } // end namespace llvm;
 
diff --git a/lib/Target/ZPU/ZPUStackSlot.cpp b/lib/Target/ZPU/ZPUStackSlot.cpp
new file mode 100644
index 0000000000..3754742a88
--- /dev/null
+++ b/lib/Target/ZPU/ZPUStackSlot.cpp
@@ -0,0 +1,81 @@
+//===-- ZPUFloatingPoint.cpp - Floating point Reg -> Stack converter ------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the pass which converts floating point instructions from
+// pseudo registers into register stack instructions.  This pass uses live
+// variable information to indicate where the FPn registers are used and their
+// lifetimes.
+//
+// The x87 hardware tracks liveness of the stack registers, so it is necessary
+// to implement exact liveness tracking between basic blocks. The CFG edges are
+// partitioned into bundles where the same FP registers must be live in
+// identical stack positions. Instructions are inserted at the end of each basic
+// block to rearrange the live registers to match the outgoing bundle.
+//
+// This approach avoids splitting critical edges at the potential cost of more
+// live register shuffling instructions when critical edges are present.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "ZPU-codegen"
+#include "ZPU.h"
+#include "ZPUInstrInfo.h"
+#include "llvm/ADT/DepthFirstIterator.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Target/TargetMachine.h"
+#include <algorithm>
+using namespace llvm;
+
+
+namespace {
+  struct ZPUStackSlot : public MachineFunctionPass {
+	    static char ID;
+    ZPUStackSlot() : MachineFunctionPass(ID) {
+    }
+
+    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+      AU.setPreservesCFG();
+      AU.addPreservedID(MachineLoopInfoID);
+      AU.addPreservedID(MachineDominatorsID);
+      MachineFunctionPass::getAnalysisUsage(AU);
+    }
+
+    virtual bool runOnMachineFunction(MachineFunction &MF);
+
+    virtual const char *getPassName() const { return "ZPU FP Stackifier"; }
+
+  private:
+    const TargetInstrInfo *TII; // Machine instruction info.
+
+  };
+  char ZPUStackSlot::ID = 0;
+}
+
+FunctionPass *llvm::createZPUStackSlotPass() { return new ZPUStackSlot(); }
+
+
+/// runOnMachineFunction - Loop over all of the basic blocks, transforming FP
+/// register references into FP stack references.
+///
+bool ZPUStackSlot::runOnMachineFunction(MachineFunction &MF) {
+	return false;
+}
+
diff --git a/lib/Target/ZPU/ZPUTargetMachine.cpp b/lib/Target/ZPU/ZPUTargetMachine.cpp
index 5e15850bbe..568171e786 100644
--- a/lib/Target/ZPU/ZPUTargetMachine.cpp
+++ b/lib/Target/ZPU/ZPUTargetMachine.cpp
@@ -52,3 +52,9 @@ ZPUTargetMachine(const Target &T, const std::string &TT, const std::string &FS,
 {
   setRelocationModel(Reloc::Static);
 }
+
+bool ZPUTargetMachine::addPostRegAlloc(PassManagerBase &PM,
+                                       CodeGenOpt::Level OptLevel) {
+  PM.add(createZPUStackSlotPass());
+  return true;  // -print-machineinstr should print after this.
+}
diff --git a/lib/Target/ZPU/ZPUTargetMachine.h b/lib/Target/ZPU/ZPUTargetMachine.h
index 933c8c4737..876ba730c2 100644
--- a/lib/Target/ZPU/ZPUTargetMachine.h
+++ b/lib/Target/ZPU/ZPUTargetMachine.h
@@ -46,6 +46,7 @@ namespace llvm {
     virtual const ZPURegisterInfo *getRegisterInfo()  const {
       return &InstrInfo.getRegisterInfo();
     }
+    virtual bool addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
     virtual const ZPUTargetLowering *getTargetLowering() const {
           return &TLInfo;
         };
-- 
2.11.4.GIT