i386/linux-2.3.21/include/asm-sparc/pgtsun4c.h

   1 /* $Id: pgtsun4c.h,v 1.36 1998/07/26 03:05:44 davem Exp $
   2  * pgtsun4c.h:  Sun4c specific pgtable.h defines and code.
   3  *
   4  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6 #ifndef _SPARC_PGTSUN4C_H
   7 #define _SPARC_PGTSUN4C_H
   8
   9 #include <asm/contregs.h>
  10
  11 /* PMD_SHIFT determines the size of the area a second-level page table can map */
  12 #define SUN4C_PMD_SHIFT       22
  13 #define SUN4C_PMD_SIZE        (1UL << SUN4C_PMD_SHIFT)
  14 #define SUN4C_PMD_MASK        (~(SUN4C_PMD_SIZE-1))
  15 #define SUN4C_PMD_ALIGN(addr) (((addr)+SUN4C_PMD_SIZE-1)&SUN4C_PMD_MASK)
  16
  17 /* PGDIR_SHIFT determines what a third-level page table entry can map */
  18 #define SUN4C_PGDIR_SHIFT       22
  19 #define SUN4C_PGDIR_SIZE        (1UL << SUN4C_PGDIR_SHIFT)
  20 #define SUN4C_PGDIR_MASK        (~(SUN4C_PGDIR_SIZE-1))
  21 #define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK)
  22
  23 /* To represent how the sun4c mmu really lays things out. */
  24 #define SUN4C_REAL_PGDIR_SHIFT       18
  25 #define SUN4C_REAL_PGDIR_SIZE        (1UL << SUN4C_REAL_PGDIR_SHIFT)
  26 #define SUN4C_REAL_PGDIR_MASK        (~(SUN4C_REAL_PGDIR_SIZE-1))
  27 #define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK)
  28
  29 /* 16 bit PFN on sun4c */
  30 #define SUN4C_PFN_MASK 0xffff
  31
  32 /* Don't increase these unless the structures in sun4c.c are fixed */
  33 #define SUN4C_MAX_SEGMAPS 256
  34 #define SUN4C_MAX_CONTEXTS 16
  35
  36 /*
  37  * To be efficient, and not have to worry about allocating such
  38  * a huge pgd, we make the kernel sun4c tables each hold 1024
  39  * entries and the pgd similarly just like the i386 tables.
  40  */
  41 #define SUN4C_PTRS_PER_PTE    1024
  42 #define SUN4C_PTRS_PER_PMD    1
  43 #define SUN4C_PTRS_PER_PGD    1024
  44
  45 /* On the sun4c the physical ram limit is 128MB.  We set up our I/O
  46  * translations at KERNBASE + 128MB for 1MB, then we begin the VMALLOC
  47  * area, makes sense.  This works out to the value below.
  48  */
  49 #define SUN4C_VMALLOC_START   (0xfe300000)
  50 #define SUN4C_VMALLOC_END     ~0x0UL
  51
  52 /*
  53  * Sparc SUN4C pte fields.
  54  */
  55 #define _SUN4C_PAGE_VALID        0x80000000
  56 #define _SUN4C_PAGE_SILENT_READ  0x80000000   /* synonym */
  57 #define _SUN4C_PAGE_DIRTY        0x40000000
  58 #define _SUN4C_PAGE_SILENT_WRITE 0x40000000   /* synonym */
  59 #define _SUN4C_PAGE_PRIV         0x20000000   /* privileged page */
  60 #define _SUN4C_PAGE_NOCACHE      0x10000000   /* non-cacheable page */
  61 #define _SUN4C_PAGE_PRESENT      0x08000000   /* implemented in software */
  62 #define _SUN4C_PAGE_IO           0x04000000   /* I/O page */
  63 #define _SUN4C_PAGE_READ         0x00800000   /* implemented in software */
  64 #define _SUN4C_PAGE_WRITE        0x00400000   /* implemented in software */
  65 #define _SUN4C_PAGE_ACCESSED     0x00200000   /* implemented in software */
  66 #define _SUN4C_PAGE_MODIFIED     0x00100000   /* implemented in software */
  67
  68 #define _SUN4C_READABLE         (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\
  69                                  _SUN4C_PAGE_ACCESSED)
  70 #define _SUN4C_WRITEABLE        (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\
  71                                  _SUN4C_PAGE_MODIFIED)
  72
  73 #define _SUN4C_PAGE_CHG_MASK    (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED)
  74
  75 #define SUN4C_PAGE_NONE         __pgprot(_SUN4C_PAGE_PRESENT)
  76 #define SUN4C_PAGE_SHARED       __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\
  77                                          _SUN4C_PAGE_WRITE)
  78 #define SUN4C_PAGE_COPY         __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)
  79 #define SUN4C_PAGE_READONLY     __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)
  80 #define SUN4C_PAGE_KERNEL       __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\
  81                                          _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV)
  82
  83 #ifndef __ASSEMBLY__
  84
  85 extern __inline__ unsigned long sun4c_get_synchronous_error(void)
  86 {
  87         unsigned long sync_err;
  88
  89         __asm__ __volatile__("lda [%1] %2, %0\n\t" :
  90                              "=r" (sync_err) :
  91                              "r" (AC_SYNC_ERR), "i" (ASI_CONTROL));
  92         return sync_err;
  93 }
  94
  95 extern __inline__ unsigned long sun4c_get_synchronous_address(void)
  96 {
  97         unsigned long sync_addr;
  98
  99         __asm__ __volatile__("lda [%1] %2, %0\n\t" :
 100                              "=r" (sync_addr) :
 101                              "r" (AC_SYNC_VA), "i" (ASI_CONTROL));
 102         return sync_addr;
 103 }
 104
 105 /* SUN4C pte, segmap, and context manipulation */
 106 extern __inline__ unsigned long sun4c_get_segmap(unsigned long addr)
 107 {
 108   register unsigned long entry;
 109
 110   __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" :
 111                        "=r" (entry) :
 112                        "r" (addr), "i" (ASI_SEGMAP));
 113
 114   return entry;
 115 }
 116
 117 extern __inline__ void sun4c_put_segmap(unsigned long addr, unsigned long entry)
 118 {
 119
 120   __asm__ __volatile__("\n\tstba %1, [%0] %2; nop; nop; nop;\n\t" : :
 121                        "r" (addr), "r" (entry),
 122                        "i" (ASI_SEGMAP));
 123 }
 124
 125 extern __inline__ unsigned long sun4c_get_pte(unsigned long addr)
 126 {
 127   register unsigned long entry;
 128
 129   __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" :
 130                        "=r" (entry) :
 131                        "r" (addr), "i" (ASI_PTE));
 132   return entry;
 133 }
 134
 135 extern __inline__ void sun4c_put_pte(unsigned long addr, unsigned long entry)
 136 {
 137   __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : :
 138                        "r" (addr),
 139                        "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE));
 140 }
 141
 142 extern __inline__ int sun4c_get_context(void)
 143 {
 144   register int ctx;
 145
 146   __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" :
 147                        "=r" (ctx) :
 148                        "r" (AC_CONTEXT), "i" (ASI_CONTROL));
 149
 150   return ctx;
 151 }
 152
 153 extern __inline__ int sun4c_set_context(int ctx)
 154 {
 155   __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : :
 156                        "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL));
 157
 158   return ctx;
 159 }
 160
 161 #endif /* !(__ASSEMBLY__) */
 162
 163 #endif /* !(_SPARC_PGTSUN4C_H) */