See OR1200_MAC_SHIFTBY in or1200_defines.v for explanation of the change. Since now... master
commit0ccc69b463d1fe2253811cb324f65ce7e6707f00
authorlampret <lampret>
Sun, 9 Apr 2006 01:32:29 +0000 (9 01:32 +0000)
committerlampret <lampret>
Sun, 9 Apr 2006 01:32:29 +0000 (9 01:32 +0000)
tree62a72be7d8d6bbf21e159d11336d1aa9b96578d2
parentd465d7768ddfca95d336fbcffbc08b6cded3fe0c
See OR1200_MAC_SHIFTBY in or1200_defines.v for explanation of the change. Since now no more 28 bits shift for l.macrc insns however for backward compatbility it is possible to set arbitry number of shifts.
rtl/verilog/or1200_defines.v
rtl/verilog/or1200_mult_mac.v