?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
snapshot (tar.gz zip)
Fixed tick timer interrupt reporting by using TTCR[IP] bit.
treee868ad65240f45ed04b493aa44c5ad36243786a3
drwxr-xr-x - bench tree | history
drwxr-xr-x - doc tree | history
drwxr-xr-x - lib tree | history
drwxr-xr-x - rtl tree | history
drwxr-xr-x - sim tree | history
drwxr-xr-x - syn tree | history
32-bit scalar RISC with Harvard microarchitecture, 5 stage integer pipeline, virtual memory support (MMU) and basic DSP capabilities