Linux 2.6.34-rc3
[pohmelfs.git] / drivers / char / nwflash.c
blobf80810901db66ba21d2243a713bfa274d5d5f3ef
1 /*
2 * Flash memory interface rev.5 driver for the Intel
3 * Flash chips used on the NetWinder.
5 * 20/08/2000 RMK use __ioremap to map flash into virtual memory
6 * make a few more places use "volatile"
7 * 22/05/2001 RMK - Lock read against write
8 * - merge printk level changes (with mods) from Alan Cox.
9 * - use *ppos as the file position, not file->f_pos.
10 * - fix check for out of range pos and r/w size
12 * Please note that we are tampering with the only flash chip in the
13 * machine, which contains the bootup code. We therefore have the
14 * power to convert these machines into doorstops...
17 #include <linux/module.h>
18 #include <linux/types.h>
19 #include <linux/fs.h>
20 #include <linux/errno.h>
21 #include <linux/mm.h>
22 #include <linux/delay.h>
23 #include <linux/proc_fs.h>
24 #include <linux/miscdevice.h>
25 #include <linux/spinlock.h>
26 #include <linux/rwsem.h>
27 #include <linux/init.h>
28 #include <linux/smp_lock.h>
29 #include <linux/mutex.h>
30 #include <linux/jiffies.h>
32 #include <asm/hardware/dec21285.h>
33 #include <asm/io.h>
34 #include <asm/leds.h>
35 #include <asm/mach-types.h>
36 #include <asm/system.h>
37 #include <asm/uaccess.h>
39 /*****************************************************************************/
40 #include <asm/nwflash.h>
42 #define NWFLASH_VERSION "6.4"
44 static void kick_open(void);
45 static int get_flash_id(void);
46 static int erase_block(int nBlock);
47 static int write_block(unsigned long p, const char __user *buf, int count);
49 #define KFLASH_SIZE 1024*1024 //1 Meg
50 #define KFLASH_SIZE4 4*1024*1024 //4 Meg
51 #define KFLASH_ID 0x89A6 //Intel flash
52 #define KFLASH_ID4 0xB0D4 //Intel flash 4Meg
54 static int flashdebug; //if set - we will display progress msgs
56 static int gbWriteEnable;
57 static int gbWriteBase64Enable;
58 static volatile unsigned char *FLASH_BASE;
59 static int gbFlashSize = KFLASH_SIZE;
60 static DEFINE_MUTEX(nwflash_mutex);
62 static int get_flash_id(void)
64 volatile unsigned int c1, c2;
67 * try to get flash chip ID
69 kick_open();
70 c2 = inb(0x80);
71 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;
72 udelay(15);
73 c1 = *(volatile unsigned char *) FLASH_BASE;
74 c2 = inb(0x80);
77 * on 4 Meg flash the second byte is actually at offset 2...
79 if (c1 == 0xB0)
80 c2 = *(volatile unsigned char *) (FLASH_BASE + 2);
81 else
82 c2 = *(volatile unsigned char *) (FLASH_BASE + 1);
84 c2 += (c1 << 8);
87 * set it back to read mode
89 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
91 if (c2 == KFLASH_ID4)
92 gbFlashSize = KFLASH_SIZE4;
94 return c2;
97 static int flash_ioctl(struct inode *inodep, struct file *filep, unsigned int cmd, unsigned long arg)
99 switch (cmd) {
100 case CMD_WRITE_DISABLE:
101 gbWriteBase64Enable = 0;
102 gbWriteEnable = 0;
103 break;
105 case CMD_WRITE_ENABLE:
106 gbWriteEnable = 1;
107 break;
109 case CMD_WRITE_BASE64K_ENABLE:
110 gbWriteBase64Enable = 1;
111 break;
113 default:
114 gbWriteBase64Enable = 0;
115 gbWriteEnable = 0;
116 return -EINVAL;
118 return 0;
121 static ssize_t flash_read(struct file *file, char __user *buf, size_t size,
122 loff_t *ppos)
124 ssize_t ret;
126 if (flashdebug)
127 printk(KERN_DEBUG "flash_read: flash_read: offset=0x%llx, "
128 "buffer=%p, count=0x%zx.\n", *ppos, buf, size);
130 * We now lock against reads and writes. --rmk
132 if (mutex_lock_interruptible(&nwflash_mutex))
133 return -ERESTARTSYS;
135 ret = simple_read_from_buffer(buf, size, ppos, (void *)FLASH_BASE, gbFlashSize);
136 mutex_unlock(&nwflash_mutex);
138 return ret;
141 static ssize_t flash_write(struct file *file, const char __user *buf,
142 size_t size, loff_t * ppos)
144 unsigned long p = *ppos;
145 unsigned int count = size;
146 int written;
147 int nBlock, temp, rc;
148 int i, j;
150 if (flashdebug)
151 printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",
152 p, buf, count);
154 if (!gbWriteEnable)
155 return -EINVAL;
157 if (p < 64 * 1024 && (!gbWriteBase64Enable))
158 return -EINVAL;
161 * check for out of range pos or count
163 if (p >= gbFlashSize)
164 return count ? -ENXIO : 0;
166 if (count > gbFlashSize - p)
167 count = gbFlashSize - p;
169 if (!access_ok(VERIFY_READ, buf, count))
170 return -EFAULT;
173 * We now lock against reads and writes. --rmk
175 if (mutex_lock_interruptible(&nwflash_mutex))
176 return -ERESTARTSYS;
178 written = 0;
180 leds_event(led_claim);
181 leds_event(led_green_on);
183 nBlock = (int) p >> 16; //block # of 64K bytes
186 * # of 64K blocks to erase and write
188 temp = ((int) (p + count) >> 16) - nBlock + 1;
191 * write ends at exactly 64k boundary?
193 if (((int) (p + count) & 0xFFFF) == 0)
194 temp -= 1;
196 if (flashdebug)
197 printk(KERN_DEBUG "flash_write: writing %d block(s) "
198 "starting at %d.\n", temp, nBlock);
200 for (; temp; temp--, nBlock++) {
201 if (flashdebug)
202 printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock);
205 * first we have to erase the block(s), where we will write...
207 i = 0;
208 j = 0;
209 RetryBlock:
210 do {
211 rc = erase_block(nBlock);
212 i++;
213 } while (rc && i < 10);
215 if (rc) {
216 printk(KERN_ERR "flash_write: erase error %x\n", rc);
217 break;
219 if (flashdebug)
220 printk(KERN_DEBUG "flash_write: writing offset %lX, "
221 "from buf %p, bytes left %X.\n", p, buf,
222 count - written);
225 * write_block will limit write to space left in this block
227 rc = write_block(p, buf, count - written);
228 j++;
231 * if somehow write verify failed? Can't happen??
233 if (!rc) {
235 * retry up to 10 times
237 if (j < 10)
238 goto RetryBlock;
239 else
241 * else quit with error...
243 rc = -1;
246 if (rc < 0) {
247 printk(KERN_ERR "flash_write: write error %X\n", rc);
248 break;
250 p += rc;
251 buf += rc;
252 written += rc;
253 *ppos += rc;
255 if (flashdebug)
256 printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);
260 * restore reg on exit
262 leds_event(led_release);
264 mutex_unlock(&nwflash_mutex);
266 return written;
271 * The memory devices use the full 32/64 bits of the offset, and so we cannot
272 * check against negative addresses: they are ok. The return value is weird,
273 * though, in that case (0).
275 * also note that seeking relative to the "end of file" isn't supported:
276 * it has no meaning, so it returns -EINVAL.
278 static loff_t flash_llseek(struct file *file, loff_t offset, int orig)
280 loff_t ret;
282 lock_kernel();
283 if (flashdebug)
284 printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",
285 (unsigned int) offset, orig);
287 switch (orig) {
288 case 0:
289 if (offset < 0) {
290 ret = -EINVAL;
291 break;
294 if ((unsigned int) offset > gbFlashSize) {
295 ret = -EINVAL;
296 break;
299 file->f_pos = (unsigned int) offset;
300 ret = file->f_pos;
301 break;
302 case 1:
303 if ((file->f_pos + offset) > gbFlashSize) {
304 ret = -EINVAL;
305 break;
307 if ((file->f_pos + offset) < 0) {
308 ret = -EINVAL;
309 break;
311 file->f_pos += offset;
312 ret = file->f_pos;
313 break;
314 default:
315 ret = -EINVAL;
317 unlock_kernel();
318 return ret;
323 * assume that main Write routine did the parameter checking...
324 * so just go ahead and erase, what requested!
327 static int erase_block(int nBlock)
329 volatile unsigned int c1;
330 volatile unsigned char *pWritePtr;
331 unsigned long timeout;
332 int temp, temp1;
335 * orange LED == erase
337 leds_event(led_amber_on);
340 * reset footbridge to the correct offset 0 (...0..3)
342 *CSR_ROMWRITEREG = 0;
345 * dummy ROM read
347 c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
349 kick_open();
351 * reset status if old errors
353 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
356 * erase a block...
357 * aim at the middle of a current block...
359 pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));
361 * dummy read
363 c1 = *pWritePtr;
365 kick_open();
367 * erase
369 *(volatile unsigned char *) pWritePtr = 0x20;
372 * confirm
374 *(volatile unsigned char *) pWritePtr = 0xD0;
377 * wait 10 ms
379 msleep(10);
382 * wait while erasing in process (up to 10 sec)
384 timeout = jiffies + 10 * HZ;
385 c1 = 0;
386 while (!(c1 & 0x80) && time_before(jiffies, timeout)) {
387 msleep(10);
389 * read any address
391 c1 = *(volatile unsigned char *) (pWritePtr);
392 // printk("Flash_erase: status=%X.\n",c1);
396 * set flash for normal read access
398 kick_open();
399 // *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;
400 *(volatile unsigned char *) pWritePtr = 0xFF; //back to normal operation
403 * check if erase errors were reported
405 if (c1 & 0x20) {
406 printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr);
409 * reset error
411 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
412 return -2;
416 * just to make sure - verify if erased OK...
418 msleep(10);
420 pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16)));
422 for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {
423 if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {
424 printk(KERN_ERR "flash_erase: verify err at %p = %X\n",
425 pWritePtr, temp1);
426 return -1;
430 return 0;
435 * write_block will limit number of bytes written to the space in this block
437 static int write_block(unsigned long p, const char __user *buf, int count)
439 volatile unsigned int c1;
440 volatile unsigned int c2;
441 unsigned char *pWritePtr;
442 unsigned int uAddress;
443 unsigned int offset;
444 unsigned long timeout;
445 unsigned long timeout1;
448 * red LED == write
450 leds_event(led_amber_off);
451 leds_event(led_red_on);
453 pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
456 * check if write will end in this block....
458 offset = p & 0xFFFF;
460 if (offset + count > 0x10000)
461 count = 0x10000 - offset;
464 * wait up to 30 sec for this block
466 timeout = jiffies + 30 * HZ;
468 for (offset = 0; offset < count; offset++, pWritePtr++) {
469 uAddress = (unsigned int) pWritePtr;
470 uAddress &= 0xFFFFFFFC;
471 if (__get_user(c2, buf + offset))
472 return -EFAULT;
474 WriteRetry:
476 * dummy read
478 c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
481 * kick open the write gate
483 kick_open();
486 * program footbridge to the correct offset...0..3
488 *CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3;
491 * write cmd
493 *(volatile unsigned char *) (uAddress) = 0x40;
496 * data to write
498 *(volatile unsigned char *) (uAddress) = c2;
501 * get status
503 *(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;
505 c1 = 0;
508 * wait up to 1 sec for this byte
510 timeout1 = jiffies + 1 * HZ;
513 * while not ready...
515 while (!(c1 & 0x80) && time_before(jiffies, timeout1))
516 c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
519 * if timeout getting status
521 if (time_after_eq(jiffies, timeout1)) {
522 kick_open();
524 * reset err
526 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
528 goto WriteRetry;
531 * switch on read access, as a default flash operation mode
533 kick_open();
535 * read access
537 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
540 * if hardware reports an error writing, and not timeout -
541 * reset the chip and retry
543 if (c1 & 0x10) {
544 kick_open();
546 * reset err
548 *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
551 * before timeout?
553 if (time_before(jiffies, timeout)) {
554 if (flashdebug)
555 printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",
556 pWritePtr - FLASH_BASE);
559 * no LED == waiting
561 leds_event(led_amber_off);
563 * wait couple ms
565 msleep(10);
567 * red LED == write
569 leds_event(led_red_on);
571 goto WriteRetry;
572 } else {
573 printk(KERN_ERR "write_block: timeout at 0x%X\n",
574 pWritePtr - FLASH_BASE);
576 * return error -2
578 return -2;
585 * green LED == read/verify
587 leds_event(led_amber_off);
588 leds_event(led_green_on);
590 msleep(10);
592 pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
594 for (offset = 0; offset < count; offset++) {
595 char c, c1;
596 if (__get_user(c, buf))
597 return -EFAULT;
598 buf++;
599 if ((c1 = *pWritePtr++) != c) {
600 printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",
601 pWritePtr - FLASH_BASE, c1, c);
602 return 0;
606 return count;
610 static void kick_open(void)
612 unsigned long flags;
615 * we want to write a bit pattern XXX1 to Xilinx to enable
616 * the write gate, which will be open for about the next 2ms.
618 spin_lock_irqsave(&nw_gpio_lock, flags);
619 nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
620 spin_unlock_irqrestore(&nw_gpio_lock, flags);
623 * let the ISA bus to catch on...
625 udelay(25);
628 static const struct file_operations flash_fops =
630 .owner = THIS_MODULE,
631 .llseek = flash_llseek,
632 .read = flash_read,
633 .write = flash_write,
634 .ioctl = flash_ioctl,
637 static struct miscdevice flash_miscdev =
639 FLASH_MINOR,
640 "nwflash",
641 &flash_fops
644 static int __init nwflash_init(void)
646 int ret = -ENODEV;
648 if (machine_is_netwinder()) {
649 int id;
651 FLASH_BASE = ioremap(DC21285_FLASH, KFLASH_SIZE4);
652 if (!FLASH_BASE)
653 goto out;
655 id = get_flash_id();
656 if ((id != KFLASH_ID) && (id != KFLASH_ID4)) {
657 ret = -ENXIO;
658 iounmap((void *)FLASH_BASE);
659 printk("Flash: incorrect ID 0x%04X.\n", id);
660 goto out;
663 printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",
664 NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024));
666 ret = misc_register(&flash_miscdev);
667 if (ret < 0) {
668 iounmap((void *)FLASH_BASE);
671 out:
672 return ret;
675 static void __exit nwflash_exit(void)
677 misc_deregister(&flash_miscdev);
678 iounmap((void *)FLASH_BASE);
681 MODULE_LICENSE("GPL");
683 module_param(flashdebug, bool, 0644);
685 module_init(nwflash_init);
686 module_exit(nwflash_exit);