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Linux 2.6.34-rc3
[pohmelfs.git] / drivers / s390 / cio / qdio_setup.c
blob7f4a75465140d768dff0f5729ceeaedfffddffb2
1 /*
2 * driver/s390/cio/qdio_setup.c
3 *
4 * qdio queue initialization
5 *
6 * Copyright (C) IBM Corp. 2008
7 * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
8 */
9 #include <linux/kernel.h>
10 #include <linux/slab.h>
11 #include <asm/qdio.h>
12
13 #include "cio.h"
14 #include "css.h"
15 #include "device.h"
16 #include "ioasm.h"
17 #include "chsc.h"
18 #include "qdio.h"
19 #include "qdio_debug.h"
20
21 static struct kmem_cache *qdio_q_cache;
22
23 /*
24 * qebsm is only available under 64bit but the adapter sets the feature
25 * flag anyway, so we manually override it.
26 */
27 static inline int qebsm_possible(void)
28 {
29 #ifdef CONFIG_64BIT
30 return css_general_characteristics.qebsm;
31 #endif
32 return 0;
33 }
34
35 /*
36 * qib_param_field: pointer to 128 bytes or NULL, if no param field
37 * nr_input_qs: pointer to nr_queues*128 words of data or NULL
38 */
39 static void set_impl_params(struct qdio_irq *irq_ptr,
40 unsigned int qib_param_field_format,
41 unsigned char *qib_param_field,
42 unsigned long *input_slib_elements,
43 unsigned long *output_slib_elements)
44 {
45 struct qdio_q *q;
46 int i, j;
47
48 if (!irq_ptr)
49 return;
50
51 irq_ptr->qib.pfmt = qib_param_field_format;
52 if (qib_param_field)
53 memcpy(irq_ptr->qib.parm, qib_param_field,
54 QDIO_MAX_BUFFERS_PER_Q);
55
56 if (!input_slib_elements)
57 goto output;
58
59 for_each_input_queue(irq_ptr, q, i) {
60 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
61 q->slib->slibe[j].parms =
62 input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
63 }
64 output:
65 if (!output_slib_elements)
66 return;
67
68 for_each_output_queue(irq_ptr, q, i) {
69 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
70 q->slib->slibe[j].parms =
71 output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
72 }
73 }
74
75 static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
76 {
77 struct qdio_q *q;
78 int i;
79
80 for (i = 0; i < nr_queues; i++) {
81 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
82 if (!q)
83 return -ENOMEM;
84
85 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
86 if (!q->slib) {
87 kmem_cache_free(qdio_q_cache, q);
88 return -ENOMEM;
89 }
90 irq_ptr_qs[i] = q;
91 }
92 return 0;
93 }
94
95 int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs)
96 {
97 int rc;
98
99 rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs);
100 if (rc)
101 return rc;
102 rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs);
103 return rc;
104 }
105
106 static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr,
107 qdio_handler_t *handler, int i)
108 {
109 /* must be cleared by every qdio_establish */
110 memset(q, 0, ((char *)&q->slib) - ((char *)q));
111 memset(q->slib, 0, PAGE_SIZE);
112
113 q->irq_ptr = irq_ptr;
114 q->mask = 1 << (31 - i);
115 q->nr = i;
116 q->handler = handler;
117 }
118
119 static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
120 void **sbals_array, int i)
121 {
122 struct qdio_q *prev;
123 int j;
124
125 DBF_HEX(&q, sizeof(void *));
126 q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2);
127
128 /* fill in sbal */
129 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) {
130 q->sbal[j] = *sbals_array++;
131 BUG_ON((unsigned long)q->sbal[j] & 0xff);
132 }
133
134 /* fill in slib */
135 if (i > 0) {
136 prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1]
137 : irq_ptr->output_qs[i - 1];
138 prev->slib->nsliba = (unsigned long)q->slib;
139 }
140
141 q->slib->sla = (unsigned long)q->sl;
142 q->slib->slsba = (unsigned long)&q->slsb.val[0];
143
144 /* fill in sl */
145 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
146 q->sl->element[j].sbal = (unsigned long)q->sbal[j];
147 }
148
149 static void setup_queues(struct qdio_irq *irq_ptr,
150 struct qdio_initialize *qdio_init)
151 {
152 struct qdio_q *q;
153 void **input_sbal_array = qdio_init->input_sbal_addr_array;
154 void **output_sbal_array = qdio_init->output_sbal_addr_array;
155 int i;
156
157 for_each_input_queue(irq_ptr, q, i) {
158 DBF_EVENT("in-q:%1d", i);
159 setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);
160
161 q->is_input_q = 1;
162 setup_storage_lists(q, irq_ptr, input_sbal_array, i);
163 input_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
164
165 if (is_thinint_irq(irq_ptr))
166 tasklet_init(&q->tasklet, tiqdio_inbound_processing,
167 (unsigned long) q);
168 else
169 tasklet_init(&q->tasklet, qdio_inbound_processing,
170 (unsigned long) q);
171 }
172
173 for_each_output_queue(irq_ptr, q, i) {
174 DBF_EVENT("outq:%1d", i);
175 setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i);
176
177 q->is_input_q = 0;
178 setup_storage_lists(q, irq_ptr, output_sbal_array, i);
179 output_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
180
181 tasklet_init(&q->tasklet, qdio_outbound_processing,
182 (unsigned long) q);
183 setup_timer(&q->u.out.timer, (void(*)(unsigned long))
184 &qdio_outbound_timer, (unsigned long)q);
185 }
186 }
187
188 static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac)
189 {
190 if (qdioac & AC1_SIGA_INPUT_NEEDED)
191 irq_ptr->siga_flag.input = 1;
192 if (qdioac & AC1_SIGA_OUTPUT_NEEDED)
193 irq_ptr->siga_flag.output = 1;
194 if (qdioac & AC1_SIGA_SYNC_NEEDED)
195 irq_ptr->siga_flag.sync = 1;
196 if (qdioac & AC1_AUTOMATIC_SYNC_ON_THININT)
197 irq_ptr->siga_flag.no_sync_ti = 1;
198 if (qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI)
199 irq_ptr->siga_flag.no_sync_out_pci = 1;
200
201 if (irq_ptr->siga_flag.no_sync_out_pci &&
202 irq_ptr->siga_flag.no_sync_ti)
203 irq_ptr->siga_flag.no_sync_out_ti = 1;
204 }
205
206 static void check_and_setup_qebsm(struct qdio_irq *irq_ptr,
207 unsigned char qdioac, unsigned long token)
208 {
209 if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM))
210 goto no_qebsm;
211 if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) ||
212 (!(qdioac & AC1_SC_QEBSM_ENABLED)))
213 goto no_qebsm;
214
215 irq_ptr->sch_token = token;
216
217 DBF_EVENT("V=V:1");
218 DBF_EVENT("%8lx", irq_ptr->sch_token);
219 return;
220
221 no_qebsm:
222 irq_ptr->sch_token = 0;
223 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
224 DBF_EVENT("noV=V");
225 }
226
227 /*
228 * If there is a qdio_irq we use the chsc_page and store the information
229 * in the qdio_irq, otherwise we copy it to the specified structure.
230 */
231 int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
232 struct subchannel_id *schid,
233 struct qdio_ssqd_desc *data)
234 {
235 struct chsc_ssqd_area *ssqd;
236 int rc;
237
238 DBF_EVENT("getssqd:%4x", schid->sch_no);
239 if (irq_ptr != NULL)
240 ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page;
241 else
242 ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL);
243 memset(ssqd, 0, PAGE_SIZE);
244
245 ssqd->request = (struct chsc_header) {
246 .length = 0x0010,
247 .code = 0x0024,
248 };
249 ssqd->first_sch = schid->sch_no;
250 ssqd->last_sch = schid->sch_no;
251 ssqd->ssid = schid->ssid;
252
253 if (chsc(ssqd))
254 return -EIO;
255 rc = chsc_error_from_response(ssqd->response.code);
256 if (rc)
257 return rc;
258
259 if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) ||
260 !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) ||
261 (ssqd->qdio_ssqd.sch != schid->sch_no))
262 return -EINVAL;
263
264 if (irq_ptr != NULL)
265 memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd,
266 sizeof(struct qdio_ssqd_desc));
267 else {
268 memcpy(data, &ssqd->qdio_ssqd,
269 sizeof(struct qdio_ssqd_desc));
270 free_page((unsigned long)ssqd);
271 }
272 return 0;
273 }
274
275 void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr)
276 {
277 unsigned char qdioac;
278 int rc;
279
280 rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL);
281 if (rc) {
282 DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no);
283 DBF_ERROR("rc:%x", rc);
284 /* all flags set, worst case */
285 qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED |
286 AC1_SIGA_SYNC_NEEDED;
287 } else
288 qdioac = irq_ptr->ssqd_desc.qdioac1;
289
290 check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token);
291 process_ac_flags(irq_ptr, qdioac);
292 DBF_EVENT("qdioac:%4x", qdioac);
293 }
294
295 void qdio_release_memory(struct qdio_irq *irq_ptr)
296 {
297 struct qdio_q *q;
298 int i;
299
300 /*
301 * Must check queue array manually since irq_ptr->nr_input_queues /
302 * irq_ptr->nr_input_queues may not yet be set.
303 */
304 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
305 q = irq_ptr->input_qs[i];
306 if (q) {
307 free_page((unsigned long) q->slib);
308 kmem_cache_free(qdio_q_cache, q);
309 }
310 }
311 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
312 q = irq_ptr->output_qs[i];
313 if (q) {
314 free_page((unsigned long) q->slib);
315 kmem_cache_free(qdio_q_cache, q);
316 }
317 }
318 free_page((unsigned long) irq_ptr->qdr);
319 free_page(irq_ptr->chsc_page);
320 free_page((unsigned long) irq_ptr);
321 }
322
323 static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr,
324 struct qdio_q **irq_ptr_qs,
325 int i, int nr)
326 {
327 irq_ptr->qdr->qdf0[i + nr].sliba =
328 (unsigned long)irq_ptr_qs[i]->slib;
329
330 irq_ptr->qdr->qdf0[i + nr].sla =
331 (unsigned long)irq_ptr_qs[i]->sl;
332
333 irq_ptr->qdr->qdf0[i + nr].slsba =
334 (unsigned long)&irq_ptr_qs[i]->slsb.val[0];
335
336 irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY >> 4;
337 irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY >> 4;
338 irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY >> 4;
339 irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY >> 4;
340 }
341
342 static void setup_qdr(struct qdio_irq *irq_ptr,
343 struct qdio_initialize *qdio_init)
344 {
345 int i;
346
347 irq_ptr->qdr->qfmt = qdio_init->q_format;
348 irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs;
349 irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs;
350 irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */
351 irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4;
352 irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib;
353 irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY >> 4;
354
355 for (i = 0; i < qdio_init->no_input_qs; i++)
356 __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0);
357
358 for (i = 0; i < qdio_init->no_output_qs; i++)
359 __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i,
360 qdio_init->no_input_qs);
361 }
362
363 static void setup_qib(struct qdio_irq *irq_ptr,
364 struct qdio_initialize *init_data)
365 {
366 if (qebsm_possible())
367 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
368
369 irq_ptr->qib.qfmt = init_data->q_format;
370 if (init_data->no_input_qs)
371 irq_ptr->qib.isliba =
372 (unsigned long)(irq_ptr->input_qs[0]->slib);
373 if (init_data->no_output_qs)
374 irq_ptr->qib.osliba =
375 (unsigned long)(irq_ptr->output_qs[0]->slib);
376 memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8);
377 }
378
379 int qdio_setup_irq(struct qdio_initialize *init_data)
380 {
381 struct ciw *ciw;
382 struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data;
383 int rc;
384
385 memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib));
386 memset(&irq_ptr->siga_flag, 0, sizeof(irq_ptr->siga_flag));
387 memset(&irq_ptr->ccw, 0, sizeof(irq_ptr->ccw));
388 memset(&irq_ptr->ssqd_desc, 0, sizeof(irq_ptr->ssqd_desc));
389 memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat));
390
391 irq_ptr->debugfs_dev = irq_ptr->debugfs_perf = NULL;
392 irq_ptr->sch_token = irq_ptr->state = irq_ptr->perf_stat_enabled = 0;
393
394 /* wipes qib.ac, required by ar7063 */
395 memset(irq_ptr->qdr, 0, sizeof(struct qdr));
396
397 irq_ptr->int_parm = init_data->int_parm;
398 irq_ptr->nr_input_qs = init_data->no_input_qs;
399 irq_ptr->nr_output_qs = init_data->no_output_qs;
400
401 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
402 irq_ptr->cdev = init_data->cdev;
403 setup_queues(irq_ptr, init_data);
404
405 setup_qib(irq_ptr, init_data);
406 qdio_setup_thinint(irq_ptr);
407 set_impl_params(irq_ptr, init_data->qib_param_field_format,
408 init_data->qib_param_field,
409 init_data->input_slib_elements,
410 init_data->output_slib_elements);
411
412 /* fill input and output descriptors */
413 setup_qdr(irq_ptr, init_data);
414
415 /* qdr, qib, sls, slsbs, slibs, sbales are filled now */
416
417 /* get qdio commands */
418 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
419 if (!ciw) {
420 DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
421 rc = -EINVAL;
422 goto out_err;
423 }
424 irq_ptr->equeue = *ciw;
425
426 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
427 if (!ciw) {
428 DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
429 rc = -EINVAL;
430 goto out_err;
431 }
432 irq_ptr->aqueue = *ciw;
433
434 /* set new interrupt handler */
435 irq_ptr->orig_handler = init_data->cdev->handler;
436 init_data->cdev->handler = qdio_int_handler;
437 return 0;
438 out_err:
439 qdio_release_memory(irq_ptr);
440 return rc;
441 }
442
443 void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
444 struct ccw_device *cdev)
445 {
446 char s[80];
447
448 snprintf(s, 80, "qdio: %s %s on SC %x using "
449 "AI:%d QEBSM:%d PCI:%d TDD:%d SIGA:%s%s%s%s%s%s\n",
450 dev_name(&cdev->dev),
451 (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" :
452 ((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"),
453 irq_ptr->schid.sch_no,
454 is_thinint_irq(irq_ptr),
455 (irq_ptr->sch_token) ? 1 : 0,
456 (irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0,
457 css_general_characteristics.aif_tdd,
458 (irq_ptr->siga_flag.input) ? "R" : " ",
459 (irq_ptr->siga_flag.output) ? "W" : " ",
460 (irq_ptr->siga_flag.sync) ? "S" : " ",
461 (!irq_ptr->siga_flag.no_sync_ti) ? "A" : " ",
462 (!irq_ptr->siga_flag.no_sync_out_ti) ? "O" : " ",
463 (!irq_ptr->siga_flag.no_sync_out_pci) ? "P" : " ");
464 printk(KERN_INFO "%s", s);
465 }
466
467 int __init qdio_setup_init(void)
468 {
469 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
470 256, 0, NULL);
471 if (!qdio_q_cache)
472 return -ENOMEM;
473
474 /* Check for OSA/FCP thin interrupts (bit 67). */
475 DBF_EVENT("thinint:%1d",
476 (css_general_characteristics.aif_osa) ? 1 : 0);
477
478 /* Check for QEBSM support in general (bit 58). */
479 DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0);
480 return 0;
481 }
482
483 void qdio_setup_exit(void)
484 {
485 kmem_cache_destroy(qdio_q_cache);
486 }