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Linux 2.6.34-rc3
[pohmelfs.git] / drivers / s390 / net / qeth_core_main.c
blob3bd4206f347090fa793e1d67da31c1f22f3c1693
1 /*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007, 2009
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
19 #include <linux/ip.h>
20 #include <linux/tcp.h>
21 #include <linux/mii.h>
22 #include <linux/kthread.h>
23
24 #include <asm/ebcdic.h>
25 #include <asm/io.h>
26
27 #include "qeth_core.h"
28
29 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
31 /* N P A M L V H */
32 [QETH_DBF_SETUP] = {"qeth_setup",
33 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
34 [QETH_DBF_QERR] = {"qeth_qerr",
35 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_TRACE] = {"qeth_trace",
37 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_SENSE] = {"qeth_sense",
41 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
42 [QETH_DBF_MISC] = {"qeth_misc",
43 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_CTRL] = {"qeth_control",
45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
46 };
47 EXPORT_SYMBOL_GPL(qeth_dbf);
48
49 struct qeth_card_list_struct qeth_core_card_list;
50 EXPORT_SYMBOL_GPL(qeth_core_card_list);
51 struct kmem_cache *qeth_core_header_cache;
52 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
53
54 static struct device *qeth_core_root_dev;
55 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
56 static struct lock_class_key qdio_out_skb_queue_key;
57
58 static void qeth_send_control_data_cb(struct qeth_channel *,
59 struct qeth_cmd_buffer *);
60 static int qeth_issue_next_read(struct qeth_card *);
61 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
62 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
63 static void qeth_free_buffer_pool(struct qeth_card *);
64 static int qeth_qdio_establish(struct qeth_card *);
65
66
67 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
68 struct qdio_buffer *buffer, int is_tso,
69 int *next_element_to_fill)
70 {
71 struct skb_frag_struct *frag;
72 int fragno;
73 unsigned long addr;
74 int element, cnt, dlen;
75
76 fragno = skb_shinfo(skb)->nr_frags;
77 element = *next_element_to_fill;
78 dlen = 0;
79
80 if (is_tso)
81 buffer->element[element].flags =
82 SBAL_FLAGS_MIDDLE_FRAG;
83 else
84 buffer->element[element].flags =
85 SBAL_FLAGS_FIRST_FRAG;
86 dlen = skb->len - skb->data_len;
87 if (dlen) {
88 buffer->element[element].addr = skb->data;
89 buffer->element[element].length = dlen;
90 element++;
91 }
92 for (cnt = 0; cnt < fragno; cnt++) {
93 frag = &skb_shinfo(skb)->frags[cnt];
94 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
95 frag->page_offset;
96 buffer->element[element].addr = (char *)addr;
97 buffer->element[element].length = frag->size;
98 if (cnt < (fragno - 1))
99 buffer->element[element].flags =
100 SBAL_FLAGS_MIDDLE_FRAG;
101 else
102 buffer->element[element].flags =
103 SBAL_FLAGS_LAST_FRAG;
104 element++;
105 }
106 *next_element_to_fill = element;
107 }
108
109 static inline const char *qeth_get_cardname(struct qeth_card *card)
110 {
111 if (card->info.guestlan) {
112 switch (card->info.type) {
113 case QETH_CARD_TYPE_OSAE:
114 return " Guest LAN QDIO";
115 case QETH_CARD_TYPE_IQD:
116 return " Guest LAN Hiper";
117 default:
118 return " unknown";
119 }
120 } else {
121 switch (card->info.type) {
122 case QETH_CARD_TYPE_OSAE:
123 return " OSD Express";
124 case QETH_CARD_TYPE_IQD:
125 return " HiperSockets";
126 case QETH_CARD_TYPE_OSN:
127 return " OSN QDIO";
128 default:
129 return " unknown";
130 }
131 }
132 return " n/a";
133 }
134
135 /* max length to be returned: 14 */
136 const char *qeth_get_cardname_short(struct qeth_card *card)
137 {
138 if (card->info.guestlan) {
139 switch (card->info.type) {
140 case QETH_CARD_TYPE_OSAE:
141 return "GuestLAN QDIO";
142 case QETH_CARD_TYPE_IQD:
143 return "GuestLAN Hiper";
144 default:
145 return "unknown";
146 }
147 } else {
148 switch (card->info.type) {
149 case QETH_CARD_TYPE_OSAE:
150 switch (card->info.link_type) {
151 case QETH_LINK_TYPE_FAST_ETH:
152 return "OSD_100";
153 case QETH_LINK_TYPE_HSTR:
154 return "HSTR";
155 case QETH_LINK_TYPE_GBIT_ETH:
156 return "OSD_1000";
157 case QETH_LINK_TYPE_10GBIT_ETH:
158 return "OSD_10GIG";
159 case QETH_LINK_TYPE_LANE_ETH100:
160 return "OSD_FE_LANE";
161 case QETH_LINK_TYPE_LANE_TR:
162 return "OSD_TR_LANE";
163 case QETH_LINK_TYPE_LANE_ETH1000:
164 return "OSD_GbE_LANE";
165 case QETH_LINK_TYPE_LANE:
166 return "OSD_ATM_LANE";
167 default:
168 return "OSD_Express";
169 }
170 case QETH_CARD_TYPE_IQD:
171 return "HiperSockets";
172 case QETH_CARD_TYPE_OSN:
173 return "OSN";
174 default:
175 return "unknown";
176 }
177 }
178 return "n/a";
179 }
180
181 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
182 int clear_start_mask)
183 {
184 unsigned long flags;
185
186 spin_lock_irqsave(&card->thread_mask_lock, flags);
187 card->thread_allowed_mask = threads;
188 if (clear_start_mask)
189 card->thread_start_mask &= threads;
190 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
191 wake_up(&card->wait_q);
192 }
193 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
194
195 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
196 {
197 unsigned long flags;
198 int rc = 0;
199
200 spin_lock_irqsave(&card->thread_mask_lock, flags);
201 rc = (card->thread_running_mask & threads);
202 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
203 return rc;
204 }
205 EXPORT_SYMBOL_GPL(qeth_threads_running);
206
207 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
208 {
209 return wait_event_interruptible(card->wait_q,
210 qeth_threads_running(card, threads) == 0);
211 }
212 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
213
214 void qeth_clear_working_pool_list(struct qeth_card *card)
215 {
216 struct qeth_buffer_pool_entry *pool_entry, *tmp;
217
218 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
219 list_for_each_entry_safe(pool_entry, tmp,
220 &card->qdio.in_buf_pool.entry_list, list){
221 list_del(&pool_entry->list);
222 }
223 }
224 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
225
226 static int qeth_alloc_buffer_pool(struct qeth_card *card)
227 {
228 struct qeth_buffer_pool_entry *pool_entry;
229 void *ptr;
230 int i, j;
231
232 QETH_DBF_TEXT(TRACE, 5, "alocpool");
233 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
234 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
235 if (!pool_entry) {
236 qeth_free_buffer_pool(card);
237 return -ENOMEM;
238 }
239 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
240 ptr = (void *) __get_free_page(GFP_KERNEL);
241 if (!ptr) {
242 while (j > 0)
243 free_page((unsigned long)
244 pool_entry->elements[--j]);
245 kfree(pool_entry);
246 qeth_free_buffer_pool(card);
247 return -ENOMEM;
248 }
249 pool_entry->elements[j] = ptr;
250 }
251 list_add(&pool_entry->init_list,
252 &card->qdio.init_pool.entry_list);
253 }
254 return 0;
255 }
256
257 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
258 {
259 QETH_DBF_TEXT(TRACE, 2, "realcbp");
260
261 if ((card->state != CARD_STATE_DOWN) &&
262 (card->state != CARD_STATE_RECOVER))
263 return -EPERM;
264
265 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
266 qeth_clear_working_pool_list(card);
267 qeth_free_buffer_pool(card);
268 card->qdio.in_buf_pool.buf_count = bufcnt;
269 card->qdio.init_pool.buf_count = bufcnt;
270 return qeth_alloc_buffer_pool(card);
271 }
272 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
273
274 static int qeth_issue_next_read(struct qeth_card *card)
275 {
276 int rc;
277 struct qeth_cmd_buffer *iob;
278
279 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
280 if (card->read.state != CH_STATE_UP)
281 return -EIO;
282 iob = qeth_get_buffer(&card->read);
283 if (!iob) {
284 dev_warn(&card->gdev->dev, "The qeth device driver "
285 "failed to recover an error on the device\n");
286 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
287 "available\n", dev_name(&card->gdev->dev));
288 return -ENOMEM;
289 }
290 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
291 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
292 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
293 (addr_t) iob, 0, 0);
294 if (rc) {
295 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
296 "rc=%i\n", dev_name(&card->gdev->dev), rc);
297 atomic_set(&card->read.irq_pending, 0);
298 qeth_schedule_recovery(card);
299 wake_up(&card->wait_q);
300 }
301 return rc;
302 }
303
304 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
305 {
306 struct qeth_reply *reply;
307
308 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
309 if (reply) {
310 atomic_set(&reply->refcnt, 1);
311 atomic_set(&reply->received, 0);
312 reply->card = card;
313 };
314 return reply;
315 }
316
317 static void qeth_get_reply(struct qeth_reply *reply)
318 {
319 WARN_ON(atomic_read(&reply->refcnt) <= 0);
320 atomic_inc(&reply->refcnt);
321 }
322
323 static void qeth_put_reply(struct qeth_reply *reply)
324 {
325 WARN_ON(atomic_read(&reply->refcnt) <= 0);
326 if (atomic_dec_and_test(&reply->refcnt))
327 kfree(reply);
328 }
329
330 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
331 struct qeth_card *card)
332 {
333 char *ipa_name;
334 int com = cmd->hdr.command;
335 ipa_name = qeth_get_ipa_cmd_name(com);
336 if (rc)
337 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
338 ipa_name, com, QETH_CARD_IFNAME(card),
339 rc, qeth_get_ipa_msg(rc));
340 else
341 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
342 ipa_name, com, QETH_CARD_IFNAME(card));
343 }
344
345 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
346 struct qeth_cmd_buffer *iob)
347 {
348 struct qeth_ipa_cmd *cmd = NULL;
349
350 QETH_DBF_TEXT(TRACE, 5, "chkipad");
351 if (IS_IPA(iob->data)) {
352 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
353 if (IS_IPA_REPLY(cmd)) {
354 if (cmd->hdr.command != IPA_CMD_SETCCID &&
355 cmd->hdr.command != IPA_CMD_DELCCID &&
356 cmd->hdr.command != IPA_CMD_MODCCID &&
357 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
358 qeth_issue_ipa_msg(cmd,
359 cmd->hdr.return_code, card);
360 return cmd;
361 } else {
362 switch (cmd->hdr.command) {
363 case IPA_CMD_STOPLAN:
364 dev_warn(&card->gdev->dev,
365 "The link for interface %s on CHPID"
366 " 0x%X failed\n",
367 QETH_CARD_IFNAME(card),
368 card->info.chpid);
369 card->lan_online = 0;
370 if (card->dev && netif_carrier_ok(card->dev))
371 netif_carrier_off(card->dev);
372 return NULL;
373 case IPA_CMD_STARTLAN:
374 dev_info(&card->gdev->dev,
375 "The link for %s on CHPID 0x%X has"
376 " been restored\n",
377 QETH_CARD_IFNAME(card),
378 card->info.chpid);
379 netif_carrier_on(card->dev);
380 card->lan_online = 1;
381 qeth_schedule_recovery(card);
382 return NULL;
383 case IPA_CMD_MODCCID:
384 return cmd;
385 case IPA_CMD_REGISTER_LOCAL_ADDR:
386 QETH_DBF_TEXT(TRACE, 3, "irla");
387 break;
388 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
389 QETH_DBF_TEXT(TRACE, 3, "urla");
390 break;
391 default:
392 QETH_DBF_MESSAGE(2, "Received data is IPA "
393 "but not a reply!\n");
394 break;
395 }
396 }
397 }
398 return cmd;
399 }
400
401 void qeth_clear_ipacmd_list(struct qeth_card *card)
402 {
403 struct qeth_reply *reply, *r;
404 unsigned long flags;
405
406 QETH_DBF_TEXT(TRACE, 4, "clipalst");
407
408 spin_lock_irqsave(&card->lock, flags);
409 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
410 qeth_get_reply(reply);
411 reply->rc = -EIO;
412 atomic_inc(&reply->received);
413 list_del_init(&reply->list);
414 wake_up(&reply->wait_q);
415 qeth_put_reply(reply);
416 }
417 spin_unlock_irqrestore(&card->lock, flags);
418 }
419 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
420
421 static int qeth_check_idx_response(unsigned char *buffer)
422 {
423 if (!buffer)
424 return 0;
425
426 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
427 if ((buffer[2] & 0xc0) == 0xc0) {
428 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
429 "with cause code 0x%02x%s\n",
430 buffer[4],
431 ((buffer[4] == 0x22) ?
432 " -- try another portname" : ""));
433 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
434 QETH_DBF_TEXT(TRACE, 2, " idxterm");
435 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
436 return -EIO;
437 }
438 return 0;
439 }
440
441 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
442 __u32 len)
443 {
444 struct qeth_card *card;
445
446 QETH_DBF_TEXT(TRACE, 4, "setupccw");
447 card = CARD_FROM_CDEV(channel->ccwdev);
448 if (channel == &card->read)
449 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
450 else
451 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
452 channel->ccw.count = len;
453 channel->ccw.cda = (__u32) __pa(iob);
454 }
455
456 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
457 {
458 __u8 index;
459
460 QETH_DBF_TEXT(TRACE, 6, "getbuff");
461 index = channel->io_buf_no;
462 do {
463 if (channel->iob[index].state == BUF_STATE_FREE) {
464 channel->iob[index].state = BUF_STATE_LOCKED;
465 channel->io_buf_no = (channel->io_buf_no + 1) %
466 QETH_CMD_BUFFER_NO;
467 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
468 return channel->iob + index;
469 }
470 index = (index + 1) % QETH_CMD_BUFFER_NO;
471 } while (index != channel->io_buf_no);
472
473 return NULL;
474 }
475
476 void qeth_release_buffer(struct qeth_channel *channel,
477 struct qeth_cmd_buffer *iob)
478 {
479 unsigned long flags;
480
481 QETH_DBF_TEXT(TRACE, 6, "relbuff");
482 spin_lock_irqsave(&channel->iob_lock, flags);
483 memset(iob->data, 0, QETH_BUFSIZE);
484 iob->state = BUF_STATE_FREE;
485 iob->callback = qeth_send_control_data_cb;
486 iob->rc = 0;
487 spin_unlock_irqrestore(&channel->iob_lock, flags);
488 }
489 EXPORT_SYMBOL_GPL(qeth_release_buffer);
490
491 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
492 {
493 struct qeth_cmd_buffer *buffer = NULL;
494 unsigned long flags;
495
496 spin_lock_irqsave(&channel->iob_lock, flags);
497 buffer = __qeth_get_buffer(channel);
498 spin_unlock_irqrestore(&channel->iob_lock, flags);
499 return buffer;
500 }
501
502 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
503 {
504 struct qeth_cmd_buffer *buffer;
505 wait_event(channel->wait_q,
506 ((buffer = qeth_get_buffer(channel)) != NULL));
507 return buffer;
508 }
509 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
510
511 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
512 {
513 int cnt;
514
515 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
516 qeth_release_buffer(channel, &channel->iob[cnt]);
517 channel->buf_no = 0;
518 channel->io_buf_no = 0;
519 }
520 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
521
522 static void qeth_send_control_data_cb(struct qeth_channel *channel,
523 struct qeth_cmd_buffer *iob)
524 {
525 struct qeth_card *card;
526 struct qeth_reply *reply, *r;
527 struct qeth_ipa_cmd *cmd;
528 unsigned long flags;
529 int keep_reply;
530
531 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
532
533 card = CARD_FROM_CDEV(channel->ccwdev);
534 if (qeth_check_idx_response(iob->data)) {
535 qeth_clear_ipacmd_list(card);
536 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
537 dev_err(&card->gdev->dev,
538 "The qeth device is not configured "
539 "for the OSI layer required by z/VM\n");
540 else
541 qeth_schedule_recovery(card);
542 goto out;
543 }
544
545 cmd = qeth_check_ipa_data(card, iob);
546 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
547 goto out;
548 /*in case of OSN : check if cmd is set */
549 if (card->info.type == QETH_CARD_TYPE_OSN &&
550 cmd &&
551 cmd->hdr.command != IPA_CMD_STARTLAN &&
552 card->osn_info.assist_cb != NULL) {
553 card->osn_info.assist_cb(card->dev, cmd);
554 goto out;
555 }
556
557 spin_lock_irqsave(&card->lock, flags);
558 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
559 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
560 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
561 qeth_get_reply(reply);
562 list_del_init(&reply->list);
563 spin_unlock_irqrestore(&card->lock, flags);
564 keep_reply = 0;
565 if (reply->callback != NULL) {
566 if (cmd) {
567 reply->offset = (__u16)((char *)cmd -
568 (char *)iob->data);
569 keep_reply = reply->callback(card,
570 reply,
571 (unsigned long)cmd);
572 } else
573 keep_reply = reply->callback(card,
574 reply,
575 (unsigned long)iob);
576 }
577 if (cmd)
578 reply->rc = (u16) cmd->hdr.return_code;
579 else if (iob->rc)
580 reply->rc = iob->rc;
581 if (keep_reply) {
582 spin_lock_irqsave(&card->lock, flags);
583 list_add_tail(&reply->list,
584 &card->cmd_waiter_list);
585 spin_unlock_irqrestore(&card->lock, flags);
586 } else {
587 atomic_inc(&reply->received);
588 wake_up(&reply->wait_q);
589 }
590 qeth_put_reply(reply);
591 goto out;
592 }
593 }
594 spin_unlock_irqrestore(&card->lock, flags);
595 out:
596 memcpy(&card->seqno.pdu_hdr_ack,
597 QETH_PDU_HEADER_SEQ_NO(iob->data),
598 QETH_SEQ_NO_LENGTH);
599 qeth_release_buffer(channel, iob);
600 }
601
602 static int qeth_setup_channel(struct qeth_channel *channel)
603 {
604 int cnt;
605
606 QETH_DBF_TEXT(SETUP, 2, "setupch");
607 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
608 channel->iob[cnt].data = (char *)
609 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
610 if (channel->iob[cnt].data == NULL)
611 break;
612 channel->iob[cnt].state = BUF_STATE_FREE;
613 channel->iob[cnt].channel = channel;
614 channel->iob[cnt].callback = qeth_send_control_data_cb;
615 channel->iob[cnt].rc = 0;
616 }
617 if (cnt < QETH_CMD_BUFFER_NO) {
618 while (cnt-- > 0)
619 kfree(channel->iob[cnt].data);
620 return -ENOMEM;
621 }
622 channel->buf_no = 0;
623 channel->io_buf_no = 0;
624 atomic_set(&channel->irq_pending, 0);
625 spin_lock_init(&channel->iob_lock);
626
627 init_waitqueue_head(&channel->wait_q);
628 return 0;
629 }
630
631 static int qeth_set_thread_start_bit(struct qeth_card *card,
632 unsigned long thread)
633 {
634 unsigned long flags;
635
636 spin_lock_irqsave(&card->thread_mask_lock, flags);
637 if (!(card->thread_allowed_mask & thread) ||
638 (card->thread_start_mask & thread)) {
639 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
640 return -EPERM;
641 }
642 card->thread_start_mask |= thread;
643 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
644 return 0;
645 }
646
647 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
648 {
649 unsigned long flags;
650
651 spin_lock_irqsave(&card->thread_mask_lock, flags);
652 card->thread_start_mask &= ~thread;
653 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
654 wake_up(&card->wait_q);
655 }
656 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
657
658 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
659 {
660 unsigned long flags;
661
662 spin_lock_irqsave(&card->thread_mask_lock, flags);
663 card->thread_running_mask &= ~thread;
664 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
665 wake_up(&card->wait_q);
666 }
667 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
668
669 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
670 {
671 unsigned long flags;
672 int rc = 0;
673
674 spin_lock_irqsave(&card->thread_mask_lock, flags);
675 if (card->thread_start_mask & thread) {
676 if ((card->thread_allowed_mask & thread) &&
677 !(card->thread_running_mask & thread)) {
678 rc = 1;
679 card->thread_start_mask &= ~thread;
680 card->thread_running_mask |= thread;
681 } else
682 rc = -EPERM;
683 }
684 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
685 return rc;
686 }
687
688 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
689 {
690 int rc = 0;
691
692 wait_event(card->wait_q,
693 (rc = __qeth_do_run_thread(card, thread)) >= 0);
694 return rc;
695 }
696 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
697
698 void qeth_schedule_recovery(struct qeth_card *card)
699 {
700 QETH_DBF_TEXT(TRACE, 2, "startrec");
701 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
702 schedule_work(&card->kernel_thread_starter);
703 }
704 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
705
706 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
707 {
708 int dstat, cstat;
709 char *sense;
710
711 sense = (char *) irb->ecw;
712 cstat = irb->scsw.cmd.cstat;
713 dstat = irb->scsw.cmd.dstat;
714
715 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
716 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
717 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
718 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
719 dev_warn(&cdev->dev, "The qeth device driver "
720 "failed to recover an error on the device\n");
721 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
722 dev_name(&cdev->dev), dstat, cstat);
723 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
724 16, 1, irb, 64, 1);
725 return 1;
726 }
727
728 if (dstat & DEV_STAT_UNIT_CHECK) {
729 if (sense[SENSE_RESETTING_EVENT_BYTE] &
730 SENSE_RESETTING_EVENT_FLAG) {
731 QETH_DBF_TEXT(TRACE, 2, "REVIND");
732 return 1;
733 }
734 if (sense[SENSE_COMMAND_REJECT_BYTE] &
735 SENSE_COMMAND_REJECT_FLAG) {
736 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
737 return 1;
738 }
739 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
740 QETH_DBF_TEXT(TRACE, 2, "AFFE");
741 return 1;
742 }
743 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
744 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
745 return 0;
746 }
747 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
748 return 1;
749 }
750 return 0;
751 }
752
753 static long __qeth_check_irb_error(struct ccw_device *cdev,
754 unsigned long intparm, struct irb *irb)
755 {
756 if (!IS_ERR(irb))
757 return 0;
758
759 switch (PTR_ERR(irb)) {
760 case -EIO:
761 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
762 dev_name(&cdev->dev));
763 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
764 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
765 break;
766 case -ETIMEDOUT:
767 dev_warn(&cdev->dev, "A hardware operation timed out"
768 " on the device\n");
769 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
770 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
771 if (intparm == QETH_RCD_PARM) {
772 struct qeth_card *card = CARD_FROM_CDEV(cdev);
773
774 if (card && (card->data.ccwdev == cdev)) {
775 card->data.state = CH_STATE_DOWN;
776 wake_up(&card->wait_q);
777 }
778 }
779 break;
780 default:
781 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
782 dev_name(&cdev->dev), PTR_ERR(irb));
783 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
784 QETH_DBF_TEXT(TRACE, 2, " rc???");
785 }
786 return PTR_ERR(irb);
787 }
788
789 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
790 struct irb *irb)
791 {
792 int rc;
793 int cstat, dstat;
794 struct qeth_cmd_buffer *buffer;
795 struct qeth_channel *channel;
796 struct qeth_card *card;
797 struct qeth_cmd_buffer *iob;
798 __u8 index;
799
800 QETH_DBF_TEXT(TRACE, 5, "irq");
801
802 if (__qeth_check_irb_error(cdev, intparm, irb))
803 return;
804 cstat = irb->scsw.cmd.cstat;
805 dstat = irb->scsw.cmd.dstat;
806
807 card = CARD_FROM_CDEV(cdev);
808 if (!card)
809 return;
810
811 if (card->read.ccwdev == cdev) {
812 channel = &card->read;
813 QETH_DBF_TEXT(TRACE, 5, "read");
814 } else if (card->write.ccwdev == cdev) {
815 channel = &card->write;
816 QETH_DBF_TEXT(TRACE, 5, "write");
817 } else {
818 channel = &card->data;
819 QETH_DBF_TEXT(TRACE, 5, "data");
820 }
821 atomic_set(&channel->irq_pending, 0);
822
823 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
824 channel->state = CH_STATE_STOPPED;
825
826 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
827 channel->state = CH_STATE_HALTED;
828
829 /*let's wake up immediately on data channel*/
830 if ((channel == &card->data) && (intparm != 0) &&
831 (intparm != QETH_RCD_PARM))
832 goto out;
833
834 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
835 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
836 /* we don't have to handle this further */
837 intparm = 0;
838 }
839 if (intparm == QETH_HALT_CHANNEL_PARM) {
840 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
841 /* we don't have to handle this further */
842 intparm = 0;
843 }
844 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
845 (dstat & DEV_STAT_UNIT_CHECK) ||
846 (cstat)) {
847 if (irb->esw.esw0.erw.cons) {
848 dev_warn(&channel->ccwdev->dev,
849 "The qeth device driver failed to recover "
850 "an error on the device\n");
851 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
852 "0x%X dstat 0x%X\n",
853 dev_name(&channel->ccwdev->dev), cstat, dstat);
854 print_hex_dump(KERN_WARNING, "qeth: irb ",
855 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
856 print_hex_dump(KERN_WARNING, "qeth: sense data ",
857 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
858 }
859 if (intparm == QETH_RCD_PARM) {
860 channel->state = CH_STATE_DOWN;
861 goto out;
862 }
863 rc = qeth_get_problem(cdev, irb);
864 if (rc) {
865 qeth_clear_ipacmd_list(card);
866 qeth_schedule_recovery(card);
867 goto out;
868 }
869 }
870
871 if (intparm == QETH_RCD_PARM) {
872 channel->state = CH_STATE_RCD_DONE;
873 goto out;
874 }
875 if (intparm) {
876 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
877 buffer->state = BUF_STATE_PROCESSED;
878 }
879 if (channel == &card->data)
880 return;
881 if (channel == &card->read &&
882 channel->state == CH_STATE_UP)
883 qeth_issue_next_read(card);
884
885 iob = channel->iob;
886 index = channel->buf_no;
887 while (iob[index].state == BUF_STATE_PROCESSED) {
888 if (iob[index].callback != NULL)
889 iob[index].callback(channel, iob + index);
890
891 index = (index + 1) % QETH_CMD_BUFFER_NO;
892 }
893 channel->buf_no = index;
894 out:
895 wake_up(&card->wait_q);
896 return;
897 }
898
899 static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
900 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb)
901 {
902 int i;
903 struct sk_buff *skb;
904
905 /* is PCI flag set on buffer? */
906 if (buf->buffer->element[0].flags & 0x40)
907 atomic_dec(&queue->set_pci_flags_count);
908
909 if (!qeth_skip_skb) {
910 skb = skb_dequeue(&buf->skb_list);
911 while (skb) {
912 atomic_dec(&skb->users);
913 dev_kfree_skb_any(skb);
914 skb = skb_dequeue(&buf->skb_list);
915 }
916 }
917 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
918 if (buf->buffer->element[i].addr && buf->is_header[i])
919 kmem_cache_free(qeth_core_header_cache,
920 buf->buffer->element[i].addr);
921 buf->is_header[i] = 0;
922 buf->buffer->element[i].length = 0;
923 buf->buffer->element[i].addr = NULL;
924 buf->buffer->element[i].flags = 0;
925 }
926 buf->buffer->element[15].flags = 0;
927 buf->next_element_to_fill = 0;
928 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
929 }
930
931 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
932 struct qeth_qdio_out_buffer *buf)
933 {
934 __qeth_clear_output_buffer(queue, buf, 0);
935 }
936
937 void qeth_clear_qdio_buffers(struct qeth_card *card)
938 {
939 int i, j;
940
941 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
942 /* clear outbound buffers to free skbs */
943 for (i = 0; i < card->qdio.no_out_queues; ++i)
944 if (card->qdio.out_qs[i]) {
945 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
946 qeth_clear_output_buffer(card->qdio.out_qs[i],
947 &card->qdio.out_qs[i]->bufs[j]);
948 }
949 }
950 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
951
952 static void qeth_free_buffer_pool(struct qeth_card *card)
953 {
954 struct qeth_buffer_pool_entry *pool_entry, *tmp;
955 int i = 0;
956 QETH_DBF_TEXT(TRACE, 5, "freepool");
957 list_for_each_entry_safe(pool_entry, tmp,
958 &card->qdio.init_pool.entry_list, init_list){
959 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
960 free_page((unsigned long)pool_entry->elements[i]);
961 list_del(&pool_entry->init_list);
962 kfree(pool_entry);
963 }
964 }
965
966 static void qeth_free_qdio_buffers(struct qeth_card *card)
967 {
968 int i, j;
969
970 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
971 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
972 QETH_QDIO_UNINITIALIZED)
973 return;
974 kfree(card->qdio.in_q);
975 card->qdio.in_q = NULL;
976 /* inbound buffer pool */
977 qeth_free_buffer_pool(card);
978 /* free outbound qdio_qs */
979 if (card->qdio.out_qs) {
980 for (i = 0; i < card->qdio.no_out_queues; ++i) {
981 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
982 qeth_clear_output_buffer(card->qdio.out_qs[i],
983 &card->qdio.out_qs[i]->bufs[j]);
984 kfree(card->qdio.out_qs[i]);
985 }
986 kfree(card->qdio.out_qs);
987 card->qdio.out_qs = NULL;
988 }
989 }
990
991 static void qeth_clean_channel(struct qeth_channel *channel)
992 {
993 int cnt;
994
995 QETH_DBF_TEXT(SETUP, 2, "freech");
996 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
997 kfree(channel->iob[cnt].data);
998 }
999
1000 static int qeth_is_1920_device(struct qeth_card *card)
1001 {
1002 int single_queue = 0;
1003 struct ccw_device *ccwdev;
1004 struct channelPath_dsc {
1005 u8 flags;
1006 u8 lsn;
1007 u8 desc;
1008 u8 chpid;
1009 u8 swla;
1010 u8 zeroes;
1011 u8 chla;
1012 u8 chpp;
1013 } *chp_dsc;
1014
1015 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1016
1017 ccwdev = card->data.ccwdev;
1018 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1019 if (chp_dsc != NULL) {
1020 /* CHPP field bit 6 == 1 -> single queue */
1021 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1022 kfree(chp_dsc);
1023 }
1024 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1025 return single_queue;
1026 }
1027
1028 static void qeth_init_qdio_info(struct qeth_card *card)
1029 {
1030 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1031 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1032 /* inbound */
1033 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1034 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1035 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1036 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1037 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1038 }
1039
1040 static void qeth_set_intial_options(struct qeth_card *card)
1041 {
1042 card->options.route4.type = NO_ROUTER;
1043 card->options.route6.type = NO_ROUTER;
1044 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1045 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1046 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1047 card->options.fake_broadcast = 0;
1048 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1049 card->options.performance_stats = 0;
1050 card->options.rx_sg_cb = QETH_RX_SG_CB;
1051 card->options.isolation = ISOLATION_MODE_NONE;
1052 }
1053
1054 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1055 {
1056 unsigned long flags;
1057 int rc = 0;
1058
1059 spin_lock_irqsave(&card->thread_mask_lock, flags);
1060 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1061 (u8) card->thread_start_mask,
1062 (u8) card->thread_allowed_mask,
1063 (u8) card->thread_running_mask);
1064 rc = (card->thread_start_mask & thread);
1065 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1066 return rc;
1067 }
1068
1069 static void qeth_start_kernel_thread(struct work_struct *work)
1070 {
1071 struct qeth_card *card = container_of(work, struct qeth_card,
1072 kernel_thread_starter);
1073 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1074
1075 if (card->read.state != CH_STATE_UP &&
1076 card->write.state != CH_STATE_UP)
1077 return;
1078 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1079 kthread_run(card->discipline.recover, (void *) card,
1080 "qeth_recover");
1081 }
1082
1083 static int qeth_setup_card(struct qeth_card *card)
1084 {
1085
1086 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1087 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1088
1089 card->read.state = CH_STATE_DOWN;
1090 card->write.state = CH_STATE_DOWN;
1091 card->data.state = CH_STATE_DOWN;
1092 card->state = CARD_STATE_DOWN;
1093 card->lan_online = 0;
1094 card->use_hard_stop = 0;
1095 card->dev = NULL;
1096 spin_lock_init(&card->vlanlock);
1097 spin_lock_init(&card->mclock);
1098 card->vlangrp = NULL;
1099 spin_lock_init(&card->lock);
1100 spin_lock_init(&card->ip_lock);
1101 spin_lock_init(&card->thread_mask_lock);
1102 card->thread_start_mask = 0;
1103 card->thread_allowed_mask = 0;
1104 card->thread_running_mask = 0;
1105 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1106 INIT_LIST_HEAD(&card->ip_list);
1107 INIT_LIST_HEAD(card->ip_tbd_list);
1108 INIT_LIST_HEAD(&card->cmd_waiter_list);
1109 init_waitqueue_head(&card->wait_q);
1110 /* intial options */
1111 qeth_set_intial_options(card);
1112 /* IP address takeover */
1113 INIT_LIST_HEAD(&card->ipato.entries);
1114 card->ipato.enabled = 0;
1115 card->ipato.invert4 = 0;
1116 card->ipato.invert6 = 0;
1117 /* init QDIO stuff */
1118 qeth_init_qdio_info(card);
1119 return 0;
1120 }
1121
1122 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1123 {
1124 struct qeth_card *card = container_of(slr, struct qeth_card,
1125 qeth_service_level);
1126 if (card->info.mcl_level[0])
1127 seq_printf(m, "qeth: %s firmware level %s\n",
1128 CARD_BUS_ID(card), card->info.mcl_level);
1129 }
1130
1131 static struct qeth_card *qeth_alloc_card(void)
1132 {
1133 struct qeth_card *card;
1134
1135 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1136 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1137 if (!card)
1138 goto out;
1139 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1140 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1141 if (!card->ip_tbd_list) {
1142 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1143 goto out_card;
1144 }
1145 if (qeth_setup_channel(&card->read))
1146 goto out_ip;
1147 if (qeth_setup_channel(&card->write))
1148 goto out_channel;
1149 card->options.layer2 = -1;
1150 card->qeth_service_level.seq_print = qeth_core_sl_print;
1151 register_service_level(&card->qeth_service_level);
1152 return card;
1153
1154 out_channel:
1155 qeth_clean_channel(&card->read);
1156 out_ip:
1157 kfree(card->ip_tbd_list);
1158 out_card:
1159 kfree(card);
1160 out:
1161 return NULL;
1162 }
1163
1164 static int qeth_determine_card_type(struct qeth_card *card)
1165 {
1166 int i = 0;
1167
1168 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1169
1170 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1171 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1172 while (known_devices[i][4]) {
1173 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1174 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1175 card->info.type = known_devices[i][4];
1176 card->qdio.no_out_queues = known_devices[i][8];
1177 card->info.is_multicast_different = known_devices[i][9];
1178 if (qeth_is_1920_device(card)) {
1179 dev_info(&card->gdev->dev,
1180 "Priority Queueing not supported\n");
1181 card->qdio.no_out_queues = 1;
1182 card->qdio.default_out_queue = 0;
1183 }
1184 return 0;
1185 }
1186 i++;
1187 }
1188 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1189 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1190 "unknown type\n");
1191 return -ENOENT;
1192 }
1193
1194 static int qeth_clear_channel(struct qeth_channel *channel)
1195 {
1196 unsigned long flags;
1197 struct qeth_card *card;
1198 int rc;
1199
1200 QETH_DBF_TEXT(TRACE, 3, "clearch");
1201 card = CARD_FROM_CDEV(channel->ccwdev);
1202 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1203 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1204 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1205
1206 if (rc)
1207 return rc;
1208 rc = wait_event_interruptible_timeout(card->wait_q,
1209 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1210 if (rc == -ERESTARTSYS)
1211 return rc;
1212 if (channel->state != CH_STATE_STOPPED)
1213 return -ETIME;
1214 channel->state = CH_STATE_DOWN;
1215 return 0;
1216 }
1217
1218 static int qeth_halt_channel(struct qeth_channel *channel)
1219 {
1220 unsigned long flags;
1221 struct qeth_card *card;
1222 int rc;
1223
1224 QETH_DBF_TEXT(TRACE, 3, "haltch");
1225 card = CARD_FROM_CDEV(channel->ccwdev);
1226 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1227 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1228 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1229
1230 if (rc)
1231 return rc;
1232 rc = wait_event_interruptible_timeout(card->wait_q,
1233 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1234 if (rc == -ERESTARTSYS)
1235 return rc;
1236 if (channel->state != CH_STATE_HALTED)
1237 return -ETIME;
1238 return 0;
1239 }
1240
1241 static int qeth_halt_channels(struct qeth_card *card)
1242 {
1243 int rc1 = 0, rc2 = 0, rc3 = 0;
1244
1245 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1246 rc1 = qeth_halt_channel(&card->read);
1247 rc2 = qeth_halt_channel(&card->write);
1248 rc3 = qeth_halt_channel(&card->data);
1249 if (rc1)
1250 return rc1;
1251 if (rc2)
1252 return rc2;
1253 return rc3;
1254 }
1255
1256 static int qeth_clear_channels(struct qeth_card *card)
1257 {
1258 int rc1 = 0, rc2 = 0, rc3 = 0;
1259
1260 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1261 rc1 = qeth_clear_channel(&card->read);
1262 rc2 = qeth_clear_channel(&card->write);
1263 rc3 = qeth_clear_channel(&card->data);
1264 if (rc1)
1265 return rc1;
1266 if (rc2)
1267 return rc2;
1268 return rc3;
1269 }
1270
1271 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1272 {
1273 int rc = 0;
1274
1275 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1276 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1277
1278 if (halt)
1279 rc = qeth_halt_channels(card);
1280 if (rc)
1281 return rc;
1282 return qeth_clear_channels(card);
1283 }
1284
1285 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1286 {
1287 int rc = 0;
1288
1289 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1290 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1291 QETH_QDIO_CLEANING)) {
1292 case QETH_QDIO_ESTABLISHED:
1293 if (card->info.type == QETH_CARD_TYPE_IQD)
1294 rc = qdio_cleanup(CARD_DDEV(card),
1295 QDIO_FLAG_CLEANUP_USING_HALT);
1296 else
1297 rc = qdio_cleanup(CARD_DDEV(card),
1298 QDIO_FLAG_CLEANUP_USING_CLEAR);
1299 if (rc)
1300 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1301 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1302 break;
1303 case QETH_QDIO_CLEANING:
1304 return rc;
1305 default:
1306 break;
1307 }
1308 rc = qeth_clear_halt_card(card, use_halt);
1309 if (rc)
1310 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1311 card->state = CARD_STATE_DOWN;
1312 return rc;
1313 }
1314 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1315
1316 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1317 int *length)
1318 {
1319 struct ciw *ciw;
1320 char *rcd_buf;
1321 int ret;
1322 struct qeth_channel *channel = &card->data;
1323 unsigned long flags;
1324
1325 /*
1326 * scan for RCD command in extended SenseID data
1327 */
1328 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1329 if (!ciw || ciw->cmd == 0)
1330 return -EOPNOTSUPP;
1331 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1332 if (!rcd_buf)
1333 return -ENOMEM;
1334
1335 channel->ccw.cmd_code = ciw->cmd;
1336 channel->ccw.cda = (__u32) __pa(rcd_buf);
1337 channel->ccw.count = ciw->count;
1338 channel->ccw.flags = CCW_FLAG_SLI;
1339 channel->state = CH_STATE_RCD;
1340 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1341 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1342 QETH_RCD_PARM, LPM_ANYPATH, 0,
1343 QETH_RCD_TIMEOUT);
1344 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1345 if (!ret)
1346 wait_event(card->wait_q,
1347 (channel->state == CH_STATE_RCD_DONE ||
1348 channel->state == CH_STATE_DOWN));
1349 if (channel->state == CH_STATE_DOWN)
1350 ret = -EIO;
1351 else
1352 channel->state = CH_STATE_DOWN;
1353 if (ret) {
1354 kfree(rcd_buf);
1355 *buffer = NULL;
1356 *length = 0;
1357 } else {
1358 *length = ciw->count;
1359 *buffer = rcd_buf;
1360 }
1361 return ret;
1362 }
1363
1364 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1365 {
1366 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1367 card->info.chpid = prcd[30];
1368 card->info.unit_addr2 = prcd[31];
1369 card->info.cula = prcd[63];
1370 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1371 (prcd[0x11] == _ascebc['M']));
1372 }
1373
1374 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1375 {
1376 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1377
1378 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1379 card->info.blkt.time_total = 250;
1380 card->info.blkt.inter_packet = 5;
1381 card->info.blkt.inter_packet_jumbo = 15;
1382 } else {
1383 card->info.blkt.time_total = 0;
1384 card->info.blkt.inter_packet = 0;
1385 card->info.blkt.inter_packet_jumbo = 0;
1386 }
1387 }
1388
1389 static void qeth_init_tokens(struct qeth_card *card)
1390 {
1391 card->token.issuer_rm_w = 0x00010103UL;
1392 card->token.cm_filter_w = 0x00010108UL;
1393 card->token.cm_connection_w = 0x0001010aUL;
1394 card->token.ulp_filter_w = 0x0001010bUL;
1395 card->token.ulp_connection_w = 0x0001010dUL;
1396 }
1397
1398 static void qeth_init_func_level(struct qeth_card *card)
1399 {
1400 if (card->ipato.enabled) {
1401 if (card->info.type == QETH_CARD_TYPE_IQD)
1402 card->info.func_level =
1403 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1404 else
1405 card->info.func_level =
1406 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1407 } else {
1408 if (card->info.type == QETH_CARD_TYPE_IQD)
1409 /*FIXME:why do we have same values for dis and ena for
1410 osae??? */
1411 card->info.func_level =
1412 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1413 else
1414 card->info.func_level =
1415 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1416 }
1417 }
1418
1419 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1420 void (*idx_reply_cb)(struct qeth_channel *,
1421 struct qeth_cmd_buffer *))
1422 {
1423 struct qeth_cmd_buffer *iob;
1424 unsigned long flags;
1425 int rc;
1426 struct qeth_card *card;
1427
1428 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1429 card = CARD_FROM_CDEV(channel->ccwdev);
1430 iob = qeth_get_buffer(channel);
1431 iob->callback = idx_reply_cb;
1432 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1433 channel->ccw.count = QETH_BUFSIZE;
1434 channel->ccw.cda = (__u32) __pa(iob->data);
1435
1436 wait_event(card->wait_q,
1437 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1438 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1439 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1440 rc = ccw_device_start(channel->ccwdev,
1441 &channel->ccw, (addr_t) iob, 0, 0);
1442 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1443
1444 if (rc) {
1445 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1446 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1447 atomic_set(&channel->irq_pending, 0);
1448 wake_up(&card->wait_q);
1449 return rc;
1450 }
1451 rc = wait_event_interruptible_timeout(card->wait_q,
1452 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1453 if (rc == -ERESTARTSYS)
1454 return rc;
1455 if (channel->state != CH_STATE_UP) {
1456 rc = -ETIME;
1457 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1458 qeth_clear_cmd_buffers(channel);
1459 } else
1460 rc = 0;
1461 return rc;
1462 }
1463
1464 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1465 void (*idx_reply_cb)(struct qeth_channel *,
1466 struct qeth_cmd_buffer *))
1467 {
1468 struct qeth_card *card;
1469 struct qeth_cmd_buffer *iob;
1470 unsigned long flags;
1471 __u16 temp;
1472 __u8 tmp;
1473 int rc;
1474 struct ccw_dev_id temp_devid;
1475
1476 card = CARD_FROM_CDEV(channel->ccwdev);
1477
1478 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1479
1480 iob = qeth_get_buffer(channel);
1481 iob->callback = idx_reply_cb;
1482 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1483 channel->ccw.count = IDX_ACTIVATE_SIZE;
1484 channel->ccw.cda = (__u32) __pa(iob->data);
1485 if (channel == &card->write) {
1486 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1487 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1488 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1489 card->seqno.trans_hdr++;
1490 } else {
1491 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1492 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1493 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1494 }
1495 tmp = ((__u8)card->info.portno) | 0x80;
1496 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1497 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1498 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1499 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1500 &card->info.func_level, sizeof(__u16));
1501 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1502 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1503 temp = (card->info.cula << 8) + card->info.unit_addr2;
1504 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1505
1506 wait_event(card->wait_q,
1507 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1508 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1509 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1510 rc = ccw_device_start(channel->ccwdev,
1511 &channel->ccw, (addr_t) iob, 0, 0);
1512 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1513
1514 if (rc) {
1515 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1516 rc);
1517 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1518 atomic_set(&channel->irq_pending, 0);
1519 wake_up(&card->wait_q);
1520 return rc;
1521 }
1522 rc = wait_event_interruptible_timeout(card->wait_q,
1523 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1524 if (rc == -ERESTARTSYS)
1525 return rc;
1526 if (channel->state != CH_STATE_ACTIVATING) {
1527 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1528 " failed to recover an error on the device\n");
1529 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1530 dev_name(&channel->ccwdev->dev));
1531 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1532 qeth_clear_cmd_buffers(channel);
1533 return -ETIME;
1534 }
1535 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1536 }
1537
1538 static int qeth_peer_func_level(int level)
1539 {
1540 if ((level & 0xff) == 8)
1541 return (level & 0xff) + 0x400;
1542 if (((level >> 8) & 3) == 1)
1543 return (level & 0xff) + 0x200;
1544 return level;
1545 }
1546
1547 static void qeth_idx_write_cb(struct qeth_channel *channel,
1548 struct qeth_cmd_buffer *iob)
1549 {
1550 struct qeth_card *card;
1551 __u16 temp;
1552
1553 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1554
1555 if (channel->state == CH_STATE_DOWN) {
1556 channel->state = CH_STATE_ACTIVATING;
1557 goto out;
1558 }
1559 card = CARD_FROM_CDEV(channel->ccwdev);
1560
1561 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1562 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1563 dev_err(&card->write.ccwdev->dev,
1564 "The adapter is used exclusively by another "
1565 "host\n");
1566 else
1567 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1568 " negative reply\n",
1569 dev_name(&card->write.ccwdev->dev));
1570 goto out;
1571 }
1572 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1573 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1574 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1575 "function level mismatch (sent: 0x%x, received: "
1576 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1577 card->info.func_level, temp);
1578 goto out;
1579 }
1580 channel->state = CH_STATE_UP;
1581 out:
1582 qeth_release_buffer(channel, iob);
1583 }
1584
1585 static void qeth_idx_read_cb(struct qeth_channel *channel,
1586 struct qeth_cmd_buffer *iob)
1587 {
1588 struct qeth_card *card;
1589 __u16 temp;
1590
1591 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1592 if (channel->state == CH_STATE_DOWN) {
1593 channel->state = CH_STATE_ACTIVATING;
1594 goto out;
1595 }
1596
1597 card = CARD_FROM_CDEV(channel->ccwdev);
1598 if (qeth_check_idx_response(iob->data))
1599 goto out;
1600
1601 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1602 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1603 dev_err(&card->write.ccwdev->dev,
1604 "The adapter is used exclusively by another "
1605 "host\n");
1606 else
1607 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1608 " negative reply\n",
1609 dev_name(&card->read.ccwdev->dev));
1610 goto out;
1611 }
1612
1613 /**
1614 * temporary fix for microcode bug
1615 * to revert it,replace OR by AND
1616 */
1617 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1618 (card->info.type == QETH_CARD_TYPE_OSAE))
1619 card->info.portname_required = 1;
1620
1621 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1622 if (temp != qeth_peer_func_level(card->info.func_level)) {
1623 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1624 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1625 dev_name(&card->read.ccwdev->dev),
1626 card->info.func_level, temp);
1627 goto out;
1628 }
1629 memcpy(&card->token.issuer_rm_r,
1630 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1631 QETH_MPC_TOKEN_LENGTH);
1632 memcpy(&card->info.mcl_level[0],
1633 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1634 channel->state = CH_STATE_UP;
1635 out:
1636 qeth_release_buffer(channel, iob);
1637 }
1638
1639 void qeth_prepare_control_data(struct qeth_card *card, int len,
1640 struct qeth_cmd_buffer *iob)
1641 {
1642 qeth_setup_ccw(&card->write, iob->data, len);
1643 iob->callback = qeth_release_buffer;
1644
1645 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1646 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1647 card->seqno.trans_hdr++;
1648 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1649 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1650 card->seqno.pdu_hdr++;
1651 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1652 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1653 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1654 }
1655 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1656
1657 int qeth_send_control_data(struct qeth_card *card, int len,
1658 struct qeth_cmd_buffer *iob,
1659 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1660 unsigned long),
1661 void *reply_param)
1662 {
1663 int rc;
1664 unsigned long flags;
1665 struct qeth_reply *reply = NULL;
1666 unsigned long timeout, event_timeout;
1667 struct qeth_ipa_cmd *cmd;
1668
1669 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1670
1671 reply = qeth_alloc_reply(card);
1672 if (!reply) {
1673 return -ENOMEM;
1674 }
1675 reply->callback = reply_cb;
1676 reply->param = reply_param;
1677 if (card->state == CARD_STATE_DOWN)
1678 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1679 else
1680 reply->seqno = card->seqno.ipa++;
1681 init_waitqueue_head(&reply->wait_q);
1682 spin_lock_irqsave(&card->lock, flags);
1683 list_add_tail(&reply->list, &card->cmd_waiter_list);
1684 spin_unlock_irqrestore(&card->lock, flags);
1685 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1686
1687 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1688 qeth_prepare_control_data(card, len, iob);
1689
1690 if (IS_IPA(iob->data))
1691 event_timeout = QETH_IPA_TIMEOUT;
1692 else
1693 event_timeout = QETH_TIMEOUT;
1694 timeout = jiffies + event_timeout;
1695
1696 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1697 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1698 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1699 (addr_t) iob, 0, 0);
1700 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1701 if (rc) {
1702 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1703 "ccw_device_start rc = %i\n",
1704 dev_name(&card->write.ccwdev->dev), rc);
1705 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1706 spin_lock_irqsave(&card->lock, flags);
1707 list_del_init(&reply->list);
1708 qeth_put_reply(reply);
1709 spin_unlock_irqrestore(&card->lock, flags);
1710 qeth_release_buffer(iob->channel, iob);
1711 atomic_set(&card->write.irq_pending, 0);
1712 wake_up(&card->wait_q);
1713 return rc;
1714 }
1715
1716 /* we have only one long running ipassist, since we can ensure
1717 process context of this command we can sleep */
1718 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1719 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1720 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1721 if (!wait_event_timeout(reply->wait_q,
1722 atomic_read(&reply->received), event_timeout))
1723 goto time_err;
1724 } else {
1725 while (!atomic_read(&reply->received)) {
1726 if (time_after(jiffies, timeout))
1727 goto time_err;
1728 cpu_relax();
1729 };
1730 }
1731
1732 rc = reply->rc;
1733 qeth_put_reply(reply);
1734 return rc;
1735
1736 time_err:
1737 spin_lock_irqsave(&reply->card->lock, flags);
1738 list_del_init(&reply->list);
1739 spin_unlock_irqrestore(&reply->card->lock, flags);
1740 reply->rc = -ETIME;
1741 atomic_inc(&reply->received);
1742 wake_up(&reply->wait_q);
1743 rc = reply->rc;
1744 qeth_put_reply(reply);
1745 return rc;
1746 }
1747 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1748
1749 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1750 unsigned long data)
1751 {
1752 struct qeth_cmd_buffer *iob;
1753
1754 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1755
1756 iob = (struct qeth_cmd_buffer *) data;
1757 memcpy(&card->token.cm_filter_r,
1758 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1759 QETH_MPC_TOKEN_LENGTH);
1760 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1761 return 0;
1762 }
1763
1764 static int qeth_cm_enable(struct qeth_card *card)
1765 {
1766 int rc;
1767 struct qeth_cmd_buffer *iob;
1768
1769 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1770
1771 iob = qeth_wait_for_buffer(&card->write);
1772 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1773 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1774 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1775 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1776 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1777
1778 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1779 qeth_cm_enable_cb, NULL);
1780 return rc;
1781 }
1782
1783 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1784 unsigned long data)
1785 {
1786
1787 struct qeth_cmd_buffer *iob;
1788
1789 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1790
1791 iob = (struct qeth_cmd_buffer *) data;
1792 memcpy(&card->token.cm_connection_r,
1793 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1794 QETH_MPC_TOKEN_LENGTH);
1795 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1796 return 0;
1797 }
1798
1799 static int qeth_cm_setup(struct qeth_card *card)
1800 {
1801 int rc;
1802 struct qeth_cmd_buffer *iob;
1803
1804 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1805
1806 iob = qeth_wait_for_buffer(&card->write);
1807 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1808 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1809 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1810 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1811 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1812 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1813 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1814 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1815 qeth_cm_setup_cb, NULL);
1816 return rc;
1817
1818 }
1819
1820 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1821 {
1822 switch (card->info.type) {
1823 case QETH_CARD_TYPE_UNKNOWN:
1824 return 1500;
1825 case QETH_CARD_TYPE_IQD:
1826 return card->info.max_mtu;
1827 case QETH_CARD_TYPE_OSAE:
1828 switch (card->info.link_type) {
1829 case QETH_LINK_TYPE_HSTR:
1830 case QETH_LINK_TYPE_LANE_TR:
1831 return 2000;
1832 default:
1833 return 1492;
1834 }
1835 default:
1836 return 1500;
1837 }
1838 }
1839
1840 static inline int qeth_get_max_mtu_for_card(int cardtype)
1841 {
1842 switch (cardtype) {
1843
1844 case QETH_CARD_TYPE_UNKNOWN:
1845 case QETH_CARD_TYPE_OSAE:
1846 case QETH_CARD_TYPE_OSN:
1847 return 61440;
1848 case QETH_CARD_TYPE_IQD:
1849 return 57344;
1850 default:
1851 return 1500;
1852 }
1853 }
1854
1855 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1856 {
1857 switch (cardtype) {
1858 case QETH_CARD_TYPE_IQD:
1859 return 1;
1860 default:
1861 return 0;
1862 }
1863 }
1864
1865 static inline int qeth_get_mtu_outof_framesize(int framesize)
1866 {
1867 switch (framesize) {
1868 case 0x4000:
1869 return 8192;
1870 case 0x6000:
1871 return 16384;
1872 case 0xa000:
1873 return 32768;
1874 case 0xffff:
1875 return 57344;
1876 default:
1877 return 0;
1878 }
1879 }
1880
1881 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1882 {
1883 switch (card->info.type) {
1884 case QETH_CARD_TYPE_OSAE:
1885 return ((mtu >= 576) && (mtu <= 61440));
1886 case QETH_CARD_TYPE_IQD:
1887 return ((mtu >= 576) &&
1888 (mtu <= card->info.max_mtu + 4096 - 32));
1889 case QETH_CARD_TYPE_OSN:
1890 case QETH_CARD_TYPE_UNKNOWN:
1891 default:
1892 return 1;
1893 }
1894 }
1895
1896 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1897 unsigned long data)
1898 {
1899
1900 __u16 mtu, framesize;
1901 __u16 len;
1902 __u8 link_type;
1903 struct qeth_cmd_buffer *iob;
1904
1905 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1906
1907 iob = (struct qeth_cmd_buffer *) data;
1908 memcpy(&card->token.ulp_filter_r,
1909 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1910 QETH_MPC_TOKEN_LENGTH);
1911 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1912 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1913 mtu = qeth_get_mtu_outof_framesize(framesize);
1914 if (!mtu) {
1915 iob->rc = -EINVAL;
1916 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1917 return 0;
1918 }
1919 card->info.max_mtu = mtu;
1920 card->info.initial_mtu = mtu;
1921 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1922 } else {
1923 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1924 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1925 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1926 }
1927
1928 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1929 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1930 memcpy(&link_type,
1931 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1932 card->info.link_type = link_type;
1933 } else
1934 card->info.link_type = 0;
1935 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1936 return 0;
1937 }
1938
1939 static int qeth_ulp_enable(struct qeth_card *card)
1940 {
1941 int rc;
1942 char prot_type;
1943 struct qeth_cmd_buffer *iob;
1944
1945 /*FIXME: trace view callbacks*/
1946 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1947
1948 iob = qeth_wait_for_buffer(&card->write);
1949 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1950
1951 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1952 (__u8) card->info.portno;
1953 if (card->options.layer2)
1954 if (card->info.type == QETH_CARD_TYPE_OSN)
1955 prot_type = QETH_PROT_OSN2;
1956 else
1957 prot_type = QETH_PROT_LAYER2;
1958 else
1959 prot_type = QETH_PROT_TCPIP;
1960
1961 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1962 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1963 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1964 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1965 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1966 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1967 card->info.portname, 9);
1968 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1969 qeth_ulp_enable_cb, NULL);
1970 return rc;
1971
1972 }
1973
1974 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1975 unsigned long data)
1976 {
1977 struct qeth_cmd_buffer *iob;
1978
1979 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1980
1981 iob = (struct qeth_cmd_buffer *) data;
1982 memcpy(&card->token.ulp_connection_r,
1983 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1984 QETH_MPC_TOKEN_LENGTH);
1985 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1986 return 0;
1987 }
1988
1989 static int qeth_ulp_setup(struct qeth_card *card)
1990 {
1991 int rc;
1992 __u16 temp;
1993 struct qeth_cmd_buffer *iob;
1994 struct ccw_dev_id dev_id;
1995
1996 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
1997
1998 iob = qeth_wait_for_buffer(&card->write);
1999 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2000
2001 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2002 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2003 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2004 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2005 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2006 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2007
2008 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2009 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2010 temp = (card->info.cula << 8) + card->info.unit_addr2;
2011 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2012 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2013 qeth_ulp_setup_cb, NULL);
2014 return rc;
2015 }
2016
2017 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2018 {
2019 int i, j;
2020
2021 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2022
2023 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2024 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2025 return 0;
2026
2027 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2028 GFP_KERNEL);
2029 if (!card->qdio.in_q)
2030 goto out_nomem;
2031 QETH_DBF_TEXT(SETUP, 2, "inq");
2032 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2033 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2034 /* give inbound qeth_qdio_buffers their qdio_buffers */
2035 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2036 card->qdio.in_q->bufs[i].buffer =
2037 &card->qdio.in_q->qdio_bufs[i];
2038 /* inbound buffer pool */
2039 if (qeth_alloc_buffer_pool(card))
2040 goto out_freeinq;
2041 /* outbound */
2042 card->qdio.out_qs =
2043 kmalloc(card->qdio.no_out_queues *
2044 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2045 if (!card->qdio.out_qs)
2046 goto out_freepool;
2047 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2048 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2049 GFP_KERNEL);
2050 if (!card->qdio.out_qs[i])
2051 goto out_freeoutq;
2052 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2053 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2054 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2055 card->qdio.out_qs[i]->queue_no = i;
2056 /* give outbound qeth_qdio_buffers their qdio_buffers */
2057 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2058 card->qdio.out_qs[i]->bufs[j].buffer =
2059 &card->qdio.out_qs[i]->qdio_bufs[j];
2060 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2061 skb_list);
2062 lockdep_set_class(
2063 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2064 &qdio_out_skb_queue_key);
2065 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2066 }
2067 }
2068 return 0;
2069
2070 out_freeoutq:
2071 while (i > 0)
2072 kfree(card->qdio.out_qs[--i]);
2073 kfree(card->qdio.out_qs);
2074 card->qdio.out_qs = NULL;
2075 out_freepool:
2076 qeth_free_buffer_pool(card);
2077 out_freeinq:
2078 kfree(card->qdio.in_q);
2079 card->qdio.in_q = NULL;
2080 out_nomem:
2081 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2082 return -ENOMEM;
2083 }
2084
2085 static void qeth_create_qib_param_field(struct qeth_card *card,
2086 char *param_field)
2087 {
2088
2089 param_field[0] = _ascebc['P'];
2090 param_field[1] = _ascebc['C'];
2091 param_field[2] = _ascebc['I'];
2092 param_field[3] = _ascebc['T'];
2093 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2094 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2095 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2096 }
2097
2098 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2099 char *param_field)
2100 {
2101 param_field[16] = _ascebc['B'];
2102 param_field[17] = _ascebc['L'];
2103 param_field[18] = _ascebc['K'];
2104 param_field[19] = _ascebc['T'];
2105 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2106 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2107 *((unsigned int *) (&param_field[28])) =
2108 card->info.blkt.inter_packet_jumbo;
2109 }
2110
2111 static int qeth_qdio_activate(struct qeth_card *card)
2112 {
2113 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2114 return qdio_activate(CARD_DDEV(card));
2115 }
2116
2117 static int qeth_dm_act(struct qeth_card *card)
2118 {
2119 int rc;
2120 struct qeth_cmd_buffer *iob;
2121
2122 QETH_DBF_TEXT(SETUP, 2, "dmact");
2123
2124 iob = qeth_wait_for_buffer(&card->write);
2125 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2126
2127 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2128 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2129 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2130 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2131 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2132 return rc;
2133 }
2134
2135 static int qeth_mpc_initialize(struct qeth_card *card)
2136 {
2137 int rc;
2138
2139 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2140
2141 rc = qeth_issue_next_read(card);
2142 if (rc) {
2143 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2144 return rc;
2145 }
2146 rc = qeth_cm_enable(card);
2147 if (rc) {
2148 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2149 goto out_qdio;
2150 }
2151 rc = qeth_cm_setup(card);
2152 if (rc) {
2153 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2154 goto out_qdio;
2155 }
2156 rc = qeth_ulp_enable(card);
2157 if (rc) {
2158 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2159 goto out_qdio;
2160 }
2161 rc = qeth_ulp_setup(card);
2162 if (rc) {
2163 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2164 goto out_qdio;
2165 }
2166 rc = qeth_alloc_qdio_buffers(card);
2167 if (rc) {
2168 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2169 goto out_qdio;
2170 }
2171 rc = qeth_qdio_establish(card);
2172 if (rc) {
2173 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2174 qeth_free_qdio_buffers(card);
2175 goto out_qdio;
2176 }
2177 rc = qeth_qdio_activate(card);
2178 if (rc) {
2179 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2180 goto out_qdio;
2181 }
2182 rc = qeth_dm_act(card);
2183 if (rc) {
2184 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2185 goto out_qdio;
2186 }
2187
2188 return 0;
2189 out_qdio:
2190 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2191 return rc;
2192 }
2193
2194 static void qeth_print_status_with_portname(struct qeth_card *card)
2195 {
2196 char dbf_text[15];
2197 int i;
2198
2199 sprintf(dbf_text, "%s", card->info.portname + 1);
2200 for (i = 0; i < 8; i++)
2201 dbf_text[i] =
2202 (char) _ebcasc[(__u8) dbf_text[i]];
2203 dbf_text[8] = 0;
2204 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2205 "with link type %s (portname: %s)\n",
2206 qeth_get_cardname(card),
2207 (card->info.mcl_level[0]) ? " (level: " : "",
2208 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2209 (card->info.mcl_level[0]) ? ")" : "",
2210 qeth_get_cardname_short(card),
2211 dbf_text);
2212
2213 }
2214
2215 static void qeth_print_status_no_portname(struct qeth_card *card)
2216 {
2217 if (card->info.portname[0])
2218 dev_info(&card->gdev->dev, "Device is a%s "
2219 "card%s%s%s\nwith link type %s "
2220 "(no portname needed by interface).\n",
2221 qeth_get_cardname(card),
2222 (card->info.mcl_level[0]) ? " (level: " : "",
2223 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2224 (card->info.mcl_level[0]) ? ")" : "",
2225 qeth_get_cardname_short(card));
2226 else
2227 dev_info(&card->gdev->dev, "Device is a%s "
2228 "card%s%s%s\nwith link type %s.\n",
2229 qeth_get_cardname(card),
2230 (card->info.mcl_level[0]) ? " (level: " : "",
2231 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2232 (card->info.mcl_level[0]) ? ")" : "",
2233 qeth_get_cardname_short(card));
2234 }
2235
2236 void qeth_print_status_message(struct qeth_card *card)
2237 {
2238 switch (card->info.type) {
2239 case QETH_CARD_TYPE_OSAE:
2240 /* VM will use a non-zero first character
2241 * to indicate a HiperSockets like reporting
2242 * of the level OSA sets the first character to zero
2243 * */
2244 if (!card->info.mcl_level[0]) {
2245 sprintf(card->info.mcl_level, "%02x%02x",
2246 card->info.mcl_level[2],
2247 card->info.mcl_level[3]);
2248
2249 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2250 break;
2251 }
2252 /* fallthrough */
2253 case QETH_CARD_TYPE_IQD:
2254 if ((card->info.guestlan) ||
2255 (card->info.mcl_level[0] & 0x80)) {
2256 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2257 card->info.mcl_level[0]];
2258 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2259 card->info.mcl_level[1]];
2260 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2261 card->info.mcl_level[2]];
2262 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2263 card->info.mcl_level[3]];
2264 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2265 }
2266 break;
2267 default:
2268 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2269 }
2270 if (card->info.portname_required)
2271 qeth_print_status_with_portname(card);
2272 else
2273 qeth_print_status_no_portname(card);
2274 }
2275 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2276
2277 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2278 {
2279 struct qeth_buffer_pool_entry *entry;
2280
2281 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2282
2283 list_for_each_entry(entry,
2284 &card->qdio.init_pool.entry_list, init_list) {
2285 qeth_put_buffer_pool_entry(card, entry);
2286 }
2287 }
2288
2289 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2290 struct qeth_card *card)
2291 {
2292 struct list_head *plh;
2293 struct qeth_buffer_pool_entry *entry;
2294 int i, free;
2295 struct page *page;
2296
2297 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2298 return NULL;
2299
2300 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2301 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2302 free = 1;
2303 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2304 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2305 free = 0;
2306 break;
2307 }
2308 }
2309 if (free) {
2310 list_del_init(&entry->list);
2311 return entry;
2312 }
2313 }
2314
2315 /* no free buffer in pool so take first one and swap pages */
2316 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2317 struct qeth_buffer_pool_entry, list);
2318 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2319 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2320 page = alloc_page(GFP_ATOMIC);
2321 if (!page) {
2322 return NULL;
2323 } else {
2324 free_page((unsigned long)entry->elements[i]);
2325 entry->elements[i] = page_address(page);
2326 if (card->options.performance_stats)
2327 card->perf_stats.sg_alloc_page_rx++;
2328 }
2329 }
2330 }
2331 list_del_init(&entry->list);
2332 return entry;
2333 }
2334
2335 static int qeth_init_input_buffer(struct qeth_card *card,
2336 struct qeth_qdio_buffer *buf)
2337 {
2338 struct qeth_buffer_pool_entry *pool_entry;
2339 int i;
2340
2341 pool_entry = qeth_find_free_buffer_pool_entry(card);
2342 if (!pool_entry)
2343 return 1;
2344
2345 /*
2346 * since the buffer is accessed only from the input_tasklet
2347 * there shouldn't be a need to synchronize; also, since we use
2348 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2349 * buffers
2350 */
2351
2352 buf->pool_entry = pool_entry;
2353 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2354 buf->buffer->element[i].length = PAGE_SIZE;
2355 buf->buffer->element[i].addr = pool_entry->elements[i];
2356 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2357 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2358 else
2359 buf->buffer->element[i].flags = 0;
2360 }
2361 return 0;
2362 }
2363
2364 int qeth_init_qdio_queues(struct qeth_card *card)
2365 {
2366 int i, j;
2367 int rc;
2368
2369 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2370
2371 /* inbound queue */
2372 memset(card->qdio.in_q->qdio_bufs, 0,
2373 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2374 qeth_initialize_working_pool_list(card);
2375 /*give only as many buffers to hardware as we have buffer pool entries*/
2376 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2377 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2378 card->qdio.in_q->next_buf_to_init =
2379 card->qdio.in_buf_pool.buf_count - 1;
2380 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2381 card->qdio.in_buf_pool.buf_count - 1);
2382 if (rc) {
2383 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2384 return rc;
2385 }
2386 /* outbound queue */
2387 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2388 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2389 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2390 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2391 qeth_clear_output_buffer(card->qdio.out_qs[i],
2392 &card->qdio.out_qs[i]->bufs[j]);
2393 }
2394 card->qdio.out_qs[i]->card = card;
2395 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2396 card->qdio.out_qs[i]->do_pack = 0;
2397 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2398 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2399 atomic_set(&card->qdio.out_qs[i]->state,
2400 QETH_OUT_Q_UNLOCKED);
2401 }
2402 return 0;
2403 }
2404 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2405
2406 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2407 {
2408 switch (link_type) {
2409 case QETH_LINK_TYPE_HSTR:
2410 return 2;
2411 default:
2412 return 1;
2413 }
2414 }
2415
2416 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2417 struct qeth_ipa_cmd *cmd, __u8 command,
2418 enum qeth_prot_versions prot)
2419 {
2420 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2421 cmd->hdr.command = command;
2422 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2423 cmd->hdr.seqno = card->seqno.ipa;
2424 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2425 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2426 if (card->options.layer2)
2427 cmd->hdr.prim_version_no = 2;
2428 else
2429 cmd->hdr.prim_version_no = 1;
2430 cmd->hdr.param_count = 1;
2431 cmd->hdr.prot_version = prot;
2432 cmd->hdr.ipa_supported = 0;
2433 cmd->hdr.ipa_enabled = 0;
2434 }
2435
2436 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2437 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2438 {
2439 struct qeth_cmd_buffer *iob;
2440 struct qeth_ipa_cmd *cmd;
2441
2442 iob = qeth_wait_for_buffer(&card->write);
2443 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2444 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2445
2446 return iob;
2447 }
2448 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2449
2450 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2451 char prot_type)
2452 {
2453 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2454 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2455 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2456 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2457 }
2458 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2459
2460 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2461 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2462 unsigned long),
2463 void *reply_param)
2464 {
2465 int rc;
2466 char prot_type;
2467
2468 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2469
2470 if (card->options.layer2)
2471 if (card->info.type == QETH_CARD_TYPE_OSN)
2472 prot_type = QETH_PROT_OSN2;
2473 else
2474 prot_type = QETH_PROT_LAYER2;
2475 else
2476 prot_type = QETH_PROT_TCPIP;
2477 qeth_prepare_ipa_cmd(card, iob, prot_type);
2478 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2479 iob, reply_cb, reply_param);
2480 return rc;
2481 }
2482 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2483
2484 static int qeth_send_startstoplan(struct qeth_card *card,
2485 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2486 {
2487 int rc;
2488 struct qeth_cmd_buffer *iob;
2489
2490 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2491 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2492
2493 return rc;
2494 }
2495
2496 int qeth_send_startlan(struct qeth_card *card)
2497 {
2498 int rc;
2499
2500 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2501
2502 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2503 return rc;
2504 }
2505 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2506
2507 int qeth_send_stoplan(struct qeth_card *card)
2508 {
2509 int rc = 0;
2510
2511 /*
2512 * TODO: according to the IPA format document page 14,
2513 * TCP/IP (we!) never issue a STOPLAN
2514 * is this right ?!?
2515 */
2516 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2517
2518 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2519 return rc;
2520 }
2521 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2522
2523 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2524 struct qeth_reply *reply, unsigned long data)
2525 {
2526 struct qeth_ipa_cmd *cmd;
2527
2528 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2529
2530 cmd = (struct qeth_ipa_cmd *) data;
2531 if (cmd->hdr.return_code == 0)
2532 cmd->hdr.return_code =
2533 cmd->data.setadapterparms.hdr.return_code;
2534 return 0;
2535 }
2536 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2537
2538 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2539 struct qeth_reply *reply, unsigned long data)
2540 {
2541 struct qeth_ipa_cmd *cmd;
2542
2543 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2544
2545 cmd = (struct qeth_ipa_cmd *) data;
2546 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2547 card->info.link_type =
2548 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2549 card->options.adp.supported_funcs =
2550 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2551 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2552 }
2553
2554 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2555 __u32 command, __u32 cmdlen)
2556 {
2557 struct qeth_cmd_buffer *iob;
2558 struct qeth_ipa_cmd *cmd;
2559
2560 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2561 QETH_PROT_IPV4);
2562 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2563 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2564 cmd->data.setadapterparms.hdr.command_code = command;
2565 cmd->data.setadapterparms.hdr.used_total = 1;
2566 cmd->data.setadapterparms.hdr.seq_no = 1;
2567
2568 return iob;
2569 }
2570 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2571
2572 int qeth_query_setadapterparms(struct qeth_card *card)
2573 {
2574 int rc;
2575 struct qeth_cmd_buffer *iob;
2576
2577 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2578 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2579 sizeof(struct qeth_ipacmd_setadpparms));
2580 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2581 return rc;
2582 }
2583 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2584
2585 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2586 unsigned int qdio_error, const char *dbftext)
2587 {
2588 if (qdio_error) {
2589 QETH_DBF_TEXT(TRACE, 2, dbftext);
2590 QETH_DBF_TEXT(QERR, 2, dbftext);
2591 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2592 buf->element[15].flags & 0xff);
2593 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2594 buf->element[14].flags & 0xff);
2595 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2596 if ((buf->element[15].flags & 0xff) == 0x12) {
2597 card->stats.rx_dropped++;
2598 return 0;
2599 } else
2600 return 1;
2601 }
2602 return 0;
2603 }
2604 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2605
2606 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2607 {
2608 struct qeth_qdio_q *queue = card->qdio.in_q;
2609 int count;
2610 int i;
2611 int rc;
2612 int newcount = 0;
2613
2614 count = (index < queue->next_buf_to_init)?
2615 card->qdio.in_buf_pool.buf_count -
2616 (queue->next_buf_to_init - index) :
2617 card->qdio.in_buf_pool.buf_count -
2618 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2619 /* only requeue at a certain threshold to avoid SIGAs */
2620 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2621 for (i = queue->next_buf_to_init;
2622 i < queue->next_buf_to_init + count; ++i) {
2623 if (qeth_init_input_buffer(card,
2624 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2625 break;
2626 } else {
2627 newcount++;
2628 }
2629 }
2630
2631 if (newcount < count) {
2632 /* we are in memory shortage so we switch back to
2633 traditional skb allocation and drop packages */
2634 atomic_set(&card->force_alloc_skb, 3);
2635 count = newcount;
2636 } else {
2637 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2638 }
2639
2640 /*
2641 * according to old code it should be avoided to requeue all
2642 * 128 buffers in order to benefit from PCI avoidance.
2643 * this function keeps at least one buffer (the buffer at
2644 * 'index') un-requeued -> this buffer is the first buffer that
2645 * will be requeued the next time
2646 */
2647 if (card->options.performance_stats) {
2648 card->perf_stats.inbound_do_qdio_cnt++;
2649 card->perf_stats.inbound_do_qdio_start_time =
2650 qeth_get_micros();
2651 }
2652 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2653 queue->next_buf_to_init, count);
2654 if (card->options.performance_stats)
2655 card->perf_stats.inbound_do_qdio_time +=
2656 qeth_get_micros() -
2657 card->perf_stats.inbound_do_qdio_start_time;
2658 if (rc) {
2659 dev_warn(&card->gdev->dev,
2660 "QDIO reported an error, rc=%i\n", rc);
2661 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2662 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2663 }
2664 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2665 QDIO_MAX_BUFFERS_PER_Q;
2666 }
2667 }
2668 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2669
2670 static int qeth_handle_send_error(struct qeth_card *card,
2671 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2672 {
2673 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2674
2675 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2676 if (card->info.type == QETH_CARD_TYPE_IQD) {
2677 if (sbalf15 == 0) {
2678 qdio_err = 0;
2679 } else {
2680 qdio_err = 1;
2681 }
2682 }
2683 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
2684
2685 if (!qdio_err)
2686 return QETH_SEND_ERROR_NONE;
2687
2688 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2689 return QETH_SEND_ERROR_RETRY;
2690
2691 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2692 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2693 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2694 (u16)qdio_err, (u8)sbalf15);
2695 return QETH_SEND_ERROR_LINK_FAILURE;
2696 }
2697
2698 /*
2699 * Switched to packing state if the number of used buffers on a queue
2700 * reaches a certain limit.
2701 */
2702 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2703 {
2704 if (!queue->do_pack) {
2705 if (atomic_read(&queue->used_buffers)
2706 >= QETH_HIGH_WATERMARK_PACK){
2707 /* switch non-PACKING -> PACKING */
2708 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2709 if (queue->card->options.performance_stats)
2710 queue->card->perf_stats.sc_dp_p++;
2711 queue->do_pack = 1;
2712 }
2713 }
2714 }
2715
2716 /*
2717 * Switches from packing to non-packing mode. If there is a packing
2718 * buffer on the queue this buffer will be prepared to be flushed.
2719 * In that case 1 is returned to inform the caller. If no buffer
2720 * has to be flushed, zero is returned.
2721 */
2722 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2723 {
2724 struct qeth_qdio_out_buffer *buffer;
2725 int flush_count = 0;
2726
2727 if (queue->do_pack) {
2728 if (atomic_read(&queue->used_buffers)
2729 <= QETH_LOW_WATERMARK_PACK) {
2730 /* switch PACKING -> non-PACKING */
2731 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2732 if (queue->card->options.performance_stats)
2733 queue->card->perf_stats.sc_p_dp++;
2734 queue->do_pack = 0;
2735 /* flush packing buffers */
2736 buffer = &queue->bufs[queue->next_buf_to_fill];
2737 if ((atomic_read(&buffer->state) ==
2738 QETH_QDIO_BUF_EMPTY) &&
2739 (buffer->next_element_to_fill > 0)) {
2740 atomic_set(&buffer->state,
2741 QETH_QDIO_BUF_PRIMED);
2742 flush_count++;
2743 queue->next_buf_to_fill =
2744 (queue->next_buf_to_fill + 1) %
2745 QDIO_MAX_BUFFERS_PER_Q;
2746 }
2747 }
2748 }
2749 return flush_count;
2750 }
2751
2752 /*
2753 * Called to flush a packing buffer if no more pci flags are on the queue.
2754 * Checks if there is a packing buffer and prepares it to be flushed.
2755 * In that case returns 1, otherwise zero.
2756 */
2757 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2758 {
2759 struct qeth_qdio_out_buffer *buffer;
2760
2761 buffer = &queue->bufs[queue->next_buf_to_fill];
2762 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2763 (buffer->next_element_to_fill > 0)) {
2764 /* it's a packing buffer */
2765 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2766 queue->next_buf_to_fill =
2767 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2768 return 1;
2769 }
2770 return 0;
2771 }
2772
2773 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2774 int count)
2775 {
2776 struct qeth_qdio_out_buffer *buf;
2777 int rc;
2778 int i;
2779 unsigned int qdio_flags;
2780
2781 for (i = index; i < index + count; ++i) {
2782 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2783 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2784 SBAL_FLAGS_LAST_ENTRY;
2785
2786 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2787 continue;
2788
2789 if (!queue->do_pack) {
2790 if ((atomic_read(&queue->used_buffers) >=
2791 (QETH_HIGH_WATERMARK_PACK -
2792 QETH_WATERMARK_PACK_FUZZ)) &&
2793 !atomic_read(&queue->set_pci_flags_count)) {
2794 /* it's likely that we'll go to packing
2795 * mode soon */
2796 atomic_inc(&queue->set_pci_flags_count);
2797 buf->buffer->element[0].flags |= 0x40;
2798 }
2799 } else {
2800 if (!atomic_read(&queue->set_pci_flags_count)) {
2801 /*
2802 * there's no outstanding PCI any more, so we
2803 * have to request a PCI to be sure the the PCI
2804 * will wake at some time in the future then we
2805 * can flush packed buffers that might still be
2806 * hanging around, which can happen if no
2807 * further send was requested by the stack
2808 */
2809 atomic_inc(&queue->set_pci_flags_count);
2810 buf->buffer->element[0].flags |= 0x40;
2811 }
2812 }
2813 }
2814
2815 queue->sync_iqdio_error = 0;
2816 queue->card->dev->trans_start = jiffies;
2817 if (queue->card->options.performance_stats) {
2818 queue->card->perf_stats.outbound_do_qdio_cnt++;
2819 queue->card->perf_stats.outbound_do_qdio_start_time =
2820 qeth_get_micros();
2821 }
2822 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2823 if (atomic_read(&queue->set_pci_flags_count))
2824 qdio_flags |= QDIO_FLAG_PCI_OUT;
2825 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2826 queue->queue_no, index, count);
2827 if (queue->card->options.performance_stats)
2828 queue->card->perf_stats.outbound_do_qdio_time +=
2829 qeth_get_micros() -
2830 queue->card->perf_stats.outbound_do_qdio_start_time;
2831 if (rc > 0) {
2832 if (!(rc & QDIO_ERROR_SIGA_BUSY))
2833 queue->sync_iqdio_error = rc & 3;
2834 }
2835 if (rc) {
2836 queue->card->stats.tx_errors += count;
2837 /* ignore temporary SIGA errors without busy condition */
2838 if (rc == QDIO_ERROR_SIGA_TARGET)
2839 return;
2840 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2841 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2842 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2843
2844 /* this must not happen under normal circumstances. if it
2845 * happens something is really wrong -> recover */
2846 qeth_schedule_recovery(queue->card);
2847 return;
2848 }
2849 atomic_add(count, &queue->used_buffers);
2850 if (queue->card->options.performance_stats)
2851 queue->card->perf_stats.bufs_sent += count;
2852 }
2853
2854 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2855 {
2856 int index;
2857 int flush_cnt = 0;
2858 int q_was_packing = 0;
2859
2860 /*
2861 * check if weed have to switch to non-packing mode or if
2862 * we have to get a pci flag out on the queue
2863 */
2864 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2865 !atomic_read(&queue->set_pci_flags_count)) {
2866 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2867 QETH_OUT_Q_UNLOCKED) {
2868 /*
2869 * If we get in here, there was no action in
2870 * do_send_packet. So, we check if there is a
2871 * packing buffer to be flushed here.
2872 */
2873 netif_stop_queue(queue->card->dev);
2874 index = queue->next_buf_to_fill;
2875 q_was_packing = queue->do_pack;
2876 /* queue->do_pack may change */
2877 barrier();
2878 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2879 if (!flush_cnt &&
2880 !atomic_read(&queue->set_pci_flags_count))
2881 flush_cnt +=
2882 qeth_flush_buffers_on_no_pci(queue);
2883 if (queue->card->options.performance_stats &&
2884 q_was_packing)
2885 queue->card->perf_stats.bufs_sent_pack +=
2886 flush_cnt;
2887 if (flush_cnt)
2888 qeth_flush_buffers(queue, index, flush_cnt);
2889 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2890 }
2891 }
2892 }
2893
2894 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2895 unsigned int qdio_error, int __queue, int first_element,
2896 int count, unsigned long card_ptr)
2897 {
2898 struct qeth_card *card = (struct qeth_card *) card_ptr;
2899 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2900 struct qeth_qdio_out_buffer *buffer;
2901 int i;
2902 unsigned qeth_send_err;
2903
2904 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2905 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2906 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2907 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2908 netif_stop_queue(card->dev);
2909 qeth_schedule_recovery(card);
2910 return;
2911 }
2912 if (card->options.performance_stats) {
2913 card->perf_stats.outbound_handler_cnt++;
2914 card->perf_stats.outbound_handler_start_time =
2915 qeth_get_micros();
2916 }
2917 for (i = first_element; i < (first_element + count); ++i) {
2918 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2919 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error);
2920 __qeth_clear_output_buffer(queue, buffer,
2921 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0);
2922 }
2923 atomic_sub(count, &queue->used_buffers);
2924 /* check if we need to do something on this outbound queue */
2925 if (card->info.type != QETH_CARD_TYPE_IQD)
2926 qeth_check_outbound_queue(queue);
2927
2928 netif_wake_queue(queue->card->dev);
2929 if (card->options.performance_stats)
2930 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2931 card->perf_stats.outbound_handler_start_time;
2932 }
2933 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2934
2935 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2936 int ipv, int cast_type)
2937 {
2938 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2939 return card->qdio.default_out_queue;
2940 switch (card->qdio.no_out_queues) {
2941 case 4:
2942 if (cast_type && card->info.is_multicast_different)
2943 return card->info.is_multicast_different &
2944 (card->qdio.no_out_queues - 1);
2945 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2946 const u8 tos = ip_hdr(skb)->tos;
2947
2948 if (card->qdio.do_prio_queueing ==
2949 QETH_PRIO_Q_ING_TOS) {
2950 if (tos & IP_TOS_NOTIMPORTANT)
2951 return 3;
2952 if (tos & IP_TOS_HIGHRELIABILITY)
2953 return 2;
2954 if (tos & IP_TOS_HIGHTHROUGHPUT)
2955 return 1;
2956 if (tos & IP_TOS_LOWDELAY)
2957 return 0;
2958 }
2959 if (card->qdio.do_prio_queueing ==
2960 QETH_PRIO_Q_ING_PREC)
2961 return 3 - (tos >> 6);
2962 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2963 /* TODO: IPv6!!! */
2964 }
2965 return card->qdio.default_out_queue;
2966 case 1: /* fallthrough for single-out-queue 1920-device */
2967 default:
2968 return card->qdio.default_out_queue;
2969 }
2970 }
2971 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2972
2973 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
2974 struct sk_buff *skb, int elems)
2975 {
2976 int elements_needed = 0;
2977
2978 if (skb_shinfo(skb)->nr_frags > 0)
2979 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
2980 if (elements_needed == 0)
2981 elements_needed = 1 + (((((unsigned long) skb->data) %
2982 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
2983 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
2984 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
2985 "(Number=%d / Length=%d). Discarded.\n",
2986 (elements_needed+elems), skb->len);
2987 return 0;
2988 }
2989 return elements_needed;
2990 }
2991 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
2992
2993 static inline void __qeth_fill_buffer(struct sk_buff *skb,
2994 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
2995 int offset)
2996 {
2997 int length = skb->len;
2998 int length_here;
2999 int element;
3000 char *data;
3001 int first_lap ;
3002
3003 element = *next_element_to_fill;
3004 data = skb->data;
3005 first_lap = (is_tso == 0 ? 1 : 0);
3006
3007 if (offset >= 0) {
3008 data = skb->data + offset;
3009 length -= offset;
3010 first_lap = 0;
3011 }
3012
3013 while (length > 0) {
3014 /* length_here is the remaining amount of data in this page */
3015 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3016 if (length < length_here)
3017 length_here = length;
3018
3019 buffer->element[element].addr = data;
3020 buffer->element[element].length = length_here;
3021 length -= length_here;
3022 if (!length) {
3023 if (first_lap)
3024 buffer->element[element].flags = 0;
3025 else
3026 buffer->element[element].flags =
3027 SBAL_FLAGS_LAST_FRAG;
3028 } else {
3029 if (first_lap)
3030 buffer->element[element].flags =
3031 SBAL_FLAGS_FIRST_FRAG;
3032 else
3033 buffer->element[element].flags =
3034 SBAL_FLAGS_MIDDLE_FRAG;
3035 }
3036 data += length_here;
3037 element++;
3038 first_lap = 0;
3039 }
3040 *next_element_to_fill = element;
3041 }
3042
3043 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3044 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3045 struct qeth_hdr *hdr, int offset, int hd_len)
3046 {
3047 struct qdio_buffer *buffer;
3048 int flush_cnt = 0, hdr_len, large_send = 0;
3049
3050 buffer = buf->buffer;
3051 atomic_inc(&skb->users);
3052 skb_queue_tail(&buf->skb_list, skb);
3053
3054 /*check first on TSO ....*/
3055 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3056 int element = buf->next_element_to_fill;
3057
3058 hdr_len = sizeof(struct qeth_hdr_tso) +
3059 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3060 /*fill first buffer entry only with header information */
3061 buffer->element[element].addr = skb->data;
3062 buffer->element[element].length = hdr_len;
3063 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3064 buf->next_element_to_fill++;
3065 skb->data += hdr_len;
3066 skb->len -= hdr_len;
3067 large_send = 1;
3068 }
3069
3070 if (offset >= 0) {
3071 int element = buf->next_element_to_fill;
3072 buffer->element[element].addr = hdr;
3073 buffer->element[element].length = sizeof(struct qeth_hdr) +
3074 hd_len;
3075 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3076 buf->is_header[element] = 1;
3077 buf->next_element_to_fill++;
3078 }
3079
3080 if (skb_shinfo(skb)->nr_frags == 0)
3081 __qeth_fill_buffer(skb, buffer, large_send,
3082 (int *)&buf->next_element_to_fill, offset);
3083 else
3084 __qeth_fill_buffer_frag(skb, buffer, large_send,
3085 (int *)&buf->next_element_to_fill);
3086
3087 if (!queue->do_pack) {
3088 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3089 /* set state to PRIMED -> will be flushed */
3090 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3091 flush_cnt = 1;
3092 } else {
3093 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3094 if (queue->card->options.performance_stats)
3095 queue->card->perf_stats.skbs_sent_pack++;
3096 if (buf->next_element_to_fill >=
3097 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3098 /*
3099 * packed buffer if full -> set state PRIMED
3100 * -> will be flushed
3101 */
3102 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3103 flush_cnt = 1;
3104 }
3105 }
3106 return flush_cnt;
3107 }
3108
3109 int qeth_do_send_packet_fast(struct qeth_card *card,
3110 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3111 struct qeth_hdr *hdr, int elements_needed,
3112 int offset, int hd_len)
3113 {
3114 struct qeth_qdio_out_buffer *buffer;
3115 struct sk_buff *skb1;
3116 struct qeth_skb_data *retry_ctrl;
3117 int index;
3118 int rc;
3119
3120 /* spin until we get the queue ... */
3121 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3122 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3123 /* ... now we've got the queue */
3124 index = queue->next_buf_to_fill;
3125 buffer = &queue->bufs[queue->next_buf_to_fill];
3126 /*
3127 * check if buffer is empty to make sure that we do not 'overtake'
3128 * ourselves and try to fill a buffer that is already primed
3129 */
3130 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3131 goto out;
3132 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3133 QDIO_MAX_BUFFERS_PER_Q;
3134 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3135 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3136 qeth_flush_buffers(queue, index, 1);
3137 if (queue->sync_iqdio_error == 2) {
3138 skb1 = skb_dequeue(&buffer->skb_list);
3139 while (skb1) {
3140 atomic_dec(&skb1->users);
3141 skb1 = skb_dequeue(&buffer->skb_list);
3142 }
3143 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16];
3144 if (retry_ctrl->magic != QETH_SKB_MAGIC) {
3145 retry_ctrl->magic = QETH_SKB_MAGIC;
3146 retry_ctrl->count = 0;
3147 }
3148 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) {
3149 retry_ctrl->count++;
3150 rc = dev_queue_xmit(skb);
3151 } else {
3152 dev_kfree_skb_any(skb);
3153 QETH_DBF_TEXT(QERR, 2, "qrdrop");
3154 }
3155 }
3156 return 0;
3157 out:
3158 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3159 return -EBUSY;
3160 }
3161 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3162
3163 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3164 struct sk_buff *skb, struct qeth_hdr *hdr,
3165 int elements_needed)
3166 {
3167 struct qeth_qdio_out_buffer *buffer;
3168 int start_index;
3169 int flush_count = 0;
3170 int do_pack = 0;
3171 int tmp;
3172 int rc = 0;
3173
3174 /* spin until we get the queue ... */
3175 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3176 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3177 start_index = queue->next_buf_to_fill;
3178 buffer = &queue->bufs[queue->next_buf_to_fill];
3179 /*
3180 * check if buffer is empty to make sure that we do not 'overtake'
3181 * ourselves and try to fill a buffer that is already primed
3182 */
3183 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3184 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3185 return -EBUSY;
3186 }
3187 /* check if we need to switch packing state of this queue */
3188 qeth_switch_to_packing_if_needed(queue);
3189 if (queue->do_pack) {
3190 do_pack = 1;
3191 /* does packet fit in current buffer? */
3192 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3193 buffer->next_element_to_fill) < elements_needed) {
3194 /* ... no -> set state PRIMED */
3195 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3196 flush_count++;
3197 queue->next_buf_to_fill =
3198 (queue->next_buf_to_fill + 1) %
3199 QDIO_MAX_BUFFERS_PER_Q;
3200 buffer = &queue->bufs[queue->next_buf_to_fill];
3201 /* we did a step forward, so check buffer state
3202 * again */
3203 if (atomic_read(&buffer->state) !=
3204 QETH_QDIO_BUF_EMPTY) {
3205 qeth_flush_buffers(queue, start_index,
3206 flush_count);
3207 atomic_set(&queue->state,
3208 QETH_OUT_Q_UNLOCKED);
3209 return -EBUSY;
3210 }
3211 }
3212 }
3213 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3214 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3215 QDIO_MAX_BUFFERS_PER_Q;
3216 flush_count += tmp;
3217 if (flush_count)
3218 qeth_flush_buffers(queue, start_index, flush_count);
3219 else if (!atomic_read(&queue->set_pci_flags_count))
3220 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3221 /*
3222 * queue->state will go from LOCKED -> UNLOCKED or from
3223 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3224 * (switch packing state or flush buffer to get another pci flag out).
3225 * In that case we will enter this loop
3226 */
3227 while (atomic_dec_return(&queue->state)) {
3228 flush_count = 0;
3229 start_index = queue->next_buf_to_fill;
3230 /* check if we can go back to non-packing state */
3231 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3232 /*
3233 * check if we need to flush a packing buffer to get a pci
3234 * flag out on the queue
3235 */
3236 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3237 flush_count += qeth_flush_buffers_on_no_pci(queue);
3238 if (flush_count)
3239 qeth_flush_buffers(queue, start_index, flush_count);
3240 }
3241 /* at this point the queue is UNLOCKED again */
3242 if (queue->card->options.performance_stats && do_pack)
3243 queue->card->perf_stats.bufs_sent_pack += flush_count;
3244
3245 return rc;
3246 }
3247 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3248
3249 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3250 struct qeth_reply *reply, unsigned long data)
3251 {
3252 struct qeth_ipa_cmd *cmd;
3253 struct qeth_ipacmd_setadpparms *setparms;
3254
3255 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3256
3257 cmd = (struct qeth_ipa_cmd *) data;
3258 setparms = &(cmd->data.setadapterparms);
3259
3260 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3261 if (cmd->hdr.return_code) {
3262 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3263 setparms->data.mode = SET_PROMISC_MODE_OFF;
3264 }
3265 card->info.promisc_mode = setparms->data.mode;
3266 return 0;
3267 }
3268
3269 void qeth_setadp_promisc_mode(struct qeth_card *card)
3270 {
3271 enum qeth_ipa_promisc_modes mode;
3272 struct net_device *dev = card->dev;
3273 struct qeth_cmd_buffer *iob;
3274 struct qeth_ipa_cmd *cmd;
3275
3276 QETH_DBF_TEXT(TRACE, 4, "setprom");
3277
3278 if (((dev->flags & IFF_PROMISC) &&
3279 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3280 (!(dev->flags & IFF_PROMISC) &&
3281 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3282 return;
3283 mode = SET_PROMISC_MODE_OFF;
3284 if (dev->flags & IFF_PROMISC)
3285 mode = SET_PROMISC_MODE_ON;
3286 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3287
3288 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3289 sizeof(struct qeth_ipacmd_setadpparms));
3290 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3291 cmd->data.setadapterparms.data.mode = mode;
3292 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3293 }
3294 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3295
3296 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3297 {
3298 struct qeth_card *card;
3299 char dbf_text[15];
3300
3301 card = dev->ml_priv;
3302
3303 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3304 sprintf(dbf_text, "%8x", new_mtu);
3305 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3306
3307 if (new_mtu < 64)
3308 return -EINVAL;
3309 if (new_mtu > 65535)
3310 return -EINVAL;
3311 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3312 (!qeth_mtu_is_valid(card, new_mtu)))
3313 return -EINVAL;
3314 dev->mtu = new_mtu;
3315 return 0;
3316 }
3317 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3318
3319 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3320 {
3321 struct qeth_card *card;
3322
3323 card = dev->ml_priv;
3324
3325 QETH_DBF_TEXT(TRACE, 5, "getstat");
3326
3327 return &card->stats;
3328 }
3329 EXPORT_SYMBOL_GPL(qeth_get_stats);
3330
3331 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3332 struct qeth_reply *reply, unsigned long data)
3333 {
3334 struct qeth_ipa_cmd *cmd;
3335
3336 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3337
3338 cmd = (struct qeth_ipa_cmd *) data;
3339 if (!card->options.layer2 ||
3340 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3341 memcpy(card->dev->dev_addr,
3342 &cmd->data.setadapterparms.data.change_addr.addr,
3343 OSA_ADDR_LEN);
3344 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3345 }
3346 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3347 return 0;
3348 }
3349
3350 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3351 {
3352 int rc;
3353 struct qeth_cmd_buffer *iob;
3354 struct qeth_ipa_cmd *cmd;
3355
3356 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3357
3358 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3359 sizeof(struct qeth_ipacmd_setadpparms));
3360 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3361 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3362 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3363 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3364 card->dev->dev_addr, OSA_ADDR_LEN);
3365 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3366 NULL);
3367 return rc;
3368 }
3369 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3370
3371 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3372 struct qeth_reply *reply, unsigned long data)
3373 {
3374 struct qeth_ipa_cmd *cmd;
3375 struct qeth_set_access_ctrl *access_ctrl_req;
3376 int rc;
3377
3378 QETH_DBF_TEXT(TRACE, 4, "setaccb");
3379
3380 cmd = (struct qeth_ipa_cmd *) data;
3381 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3382 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3383 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3384 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3385 cmd->data.setadapterparms.hdr.return_code);
3386 switch (cmd->data.setadapterparms.hdr.return_code) {
3387 case SET_ACCESS_CTRL_RC_SUCCESS:
3388 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3389 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3390 {
3391 card->options.isolation = access_ctrl_req->subcmd_code;
3392 if (card->options.isolation == ISOLATION_MODE_NONE) {
3393 dev_info(&card->gdev->dev,
3394 "QDIO data connection isolation is deactivated\n");
3395 } else {
3396 dev_info(&card->gdev->dev,
3397 "QDIO data connection isolation is activated\n");
3398 }
3399 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3400 card->gdev->dev.kobj.name,
3401 access_ctrl_req->subcmd_code,
3402 cmd->data.setadapterparms.hdr.return_code);
3403 rc = 0;
3404 break;
3405 }
3406 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3407 {
3408 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3409 card->gdev->dev.kobj.name,
3410 access_ctrl_req->subcmd_code,
3411 cmd->data.setadapterparms.hdr.return_code);
3412 dev_err(&card->gdev->dev, "Adapter does not "
3413 "support QDIO data connection isolation\n");
3414
3415 /* ensure isolation mode is "none" */
3416 card->options.isolation = ISOLATION_MODE_NONE;
3417 rc = -EOPNOTSUPP;
3418 break;
3419 }
3420 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3421 {
3422 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3423 card->gdev->dev.kobj.name,
3424 access_ctrl_req->subcmd_code,
3425 cmd->data.setadapterparms.hdr.return_code);
3426 dev_err(&card->gdev->dev,
3427 "Adapter is dedicated. "
3428 "QDIO data connection isolation not supported\n");
3429
3430 /* ensure isolation mode is "none" */
3431 card->options.isolation = ISOLATION_MODE_NONE;
3432 rc = -EOPNOTSUPP;
3433 break;
3434 }
3435 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3436 {
3437 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3438 card->gdev->dev.kobj.name,
3439 access_ctrl_req->subcmd_code,
3440 cmd->data.setadapterparms.hdr.return_code);
3441 dev_err(&card->gdev->dev,
3442 "TSO does not permit QDIO data connection isolation\n");
3443
3444 /* ensure isolation mode is "none" */
3445 card->options.isolation = ISOLATION_MODE_NONE;
3446 rc = -EPERM;
3447 break;
3448 }
3449 default:
3450 {
3451 /* this should never happen */
3452 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3453 "==UNKNOWN\n",
3454 card->gdev->dev.kobj.name,
3455 access_ctrl_req->subcmd_code,
3456 cmd->data.setadapterparms.hdr.return_code);
3457
3458 /* ensure isolation mode is "none" */
3459 card->options.isolation = ISOLATION_MODE_NONE;
3460 rc = 0;
3461 break;
3462 }
3463 }
3464 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3465 return rc;
3466 }
3467
3468 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3469 enum qeth_ipa_isolation_modes isolation)
3470 {
3471 int rc;
3472 struct qeth_cmd_buffer *iob;
3473 struct qeth_ipa_cmd *cmd;
3474 struct qeth_set_access_ctrl *access_ctrl_req;
3475
3476 QETH_DBF_TEXT(TRACE, 4, "setacctl");
3477
3478 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3479 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3480
3481 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3482 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3483 sizeof(struct qeth_set_access_ctrl));
3484 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3485 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3486 access_ctrl_req->subcmd_code = isolation;
3487
3488 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3489 NULL);
3490 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3491 return rc;
3492 }
3493
3494 int qeth_set_access_ctrl_online(struct qeth_card *card)
3495 {
3496 int rc = 0;
3497
3498 QETH_DBF_TEXT(TRACE, 4, "setactlo");
3499
3500 if (card->info.type == QETH_CARD_TYPE_OSAE &&
3501 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
3502 rc = qeth_setadpparms_set_access_ctrl(card,
3503 card->options.isolation);
3504 if (rc) {
3505 QETH_DBF_MESSAGE(3,
3506 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed",
3507 card->gdev->dev.kobj.name,
3508 rc);
3509 }
3510 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3511 card->options.isolation = ISOLATION_MODE_NONE;
3512
3513 dev_err(&card->gdev->dev, "Adapter does not "
3514 "support QDIO data connection isolation\n");
3515 rc = -EOPNOTSUPP;
3516 }
3517 return rc;
3518 }
3519 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3520
3521 void qeth_tx_timeout(struct net_device *dev)
3522 {
3523 struct qeth_card *card;
3524
3525 QETH_DBF_TEXT(TRACE, 4, "txtimeo");
3526 card = dev->ml_priv;
3527 card->stats.tx_errors++;
3528 qeth_schedule_recovery(card);
3529 }
3530 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3531
3532 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3533 {
3534 struct qeth_card *card = dev->ml_priv;
3535 int rc = 0;
3536
3537 switch (regnum) {
3538 case MII_BMCR: /* Basic mode control register */
3539 rc = BMCR_FULLDPLX;
3540 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3541 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3542 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3543 rc |= BMCR_SPEED100;
3544 break;
3545 case MII_BMSR: /* Basic mode status register */
3546 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3547 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3548 BMSR_100BASE4;
3549 break;
3550 case MII_PHYSID1: /* PHYS ID 1 */
3551 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3552 dev->dev_addr[2];
3553 rc = (rc >> 5) & 0xFFFF;
3554 break;
3555 case MII_PHYSID2: /* PHYS ID 2 */
3556 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3557 break;
3558 case MII_ADVERTISE: /* Advertisement control reg */
3559 rc = ADVERTISE_ALL;
3560 break;
3561 case MII_LPA: /* Link partner ability reg */
3562 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3563 LPA_100BASE4 | LPA_LPACK;
3564 break;
3565 case MII_EXPANSION: /* Expansion register */
3566 break;
3567 case MII_DCOUNTER: /* disconnect counter */
3568 break;
3569 case MII_FCSCOUNTER: /* false carrier counter */
3570 break;
3571 case MII_NWAYTEST: /* N-way auto-neg test register */
3572 break;
3573 case MII_RERRCOUNTER: /* rx error counter */
3574 rc = card->stats.rx_errors;
3575 break;
3576 case MII_SREVISION: /* silicon revision */
3577 break;
3578 case MII_RESV1: /* reserved 1 */
3579 break;
3580 case MII_LBRERROR: /* loopback, rx, bypass error */
3581 break;
3582 case MII_PHYADDR: /* physical address */
3583 break;
3584 case MII_RESV2: /* reserved 2 */
3585 break;
3586 case MII_TPISTATUS: /* TPI status for 10mbps */
3587 break;
3588 case MII_NCONFIG: /* network interface config */
3589 break;
3590 default:
3591 break;
3592 }
3593 return rc;
3594 }
3595 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3596
3597 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3598 struct qeth_cmd_buffer *iob, int len,
3599 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3600 unsigned long),
3601 void *reply_param)
3602 {
3603 u16 s1, s2;
3604
3605 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3606
3607 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3608 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3609 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3610 /* adjust PDU length fields in IPA_PDU_HEADER */
3611 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3612 s2 = (u32) len;
3613 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3614 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3615 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3616 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3617 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3618 reply_cb, reply_param);
3619 }
3620
3621 static int qeth_snmp_command_cb(struct qeth_card *card,
3622 struct qeth_reply *reply, unsigned long sdata)
3623 {
3624 struct qeth_ipa_cmd *cmd;
3625 struct qeth_arp_query_info *qinfo;
3626 struct qeth_snmp_cmd *snmp;
3627 unsigned char *data;
3628 __u16 data_len;
3629
3630 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3631
3632 cmd = (struct qeth_ipa_cmd *) sdata;
3633 data = (unsigned char *)((char *)cmd - reply->offset);
3634 qinfo = (struct qeth_arp_query_info *) reply->param;
3635 snmp = &cmd->data.setadapterparms.data.snmp;
3636
3637 if (cmd->hdr.return_code) {
3638 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3639 return 0;
3640 }
3641 if (cmd->data.setadapterparms.hdr.return_code) {
3642 cmd->hdr.return_code =
3643 cmd->data.setadapterparms.hdr.return_code;
3644 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3645 return 0;
3646 }
3647 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3648 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3649 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3650 else
3651 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3652
3653 /* check if there is enough room in userspace */
3654 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3655 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3656 cmd->hdr.return_code = -ENOMEM;
3657 return 0;
3658 }
3659 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3660 cmd->data.setadapterparms.hdr.used_total);
3661 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3662 cmd->data.setadapterparms.hdr.seq_no);
3663 /*copy entries to user buffer*/
3664 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3665 memcpy(qinfo->udata + qinfo->udata_offset,
3666 (char *)snmp,
3667 data_len + offsetof(struct qeth_snmp_cmd, data));
3668 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3669 } else {
3670 memcpy(qinfo->udata + qinfo->udata_offset,
3671 (char *)&snmp->request, data_len);
3672 }
3673 qinfo->udata_offset += data_len;
3674 /* check if all replies received ... */
3675 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3676 cmd->data.setadapterparms.hdr.used_total);
3677 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3678 cmd->data.setadapterparms.hdr.seq_no);
3679 if (cmd->data.setadapterparms.hdr.seq_no <
3680 cmd->data.setadapterparms.hdr.used_total)
3681 return 1;
3682 return 0;
3683 }
3684
3685 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3686 {
3687 struct qeth_cmd_buffer *iob;
3688 struct qeth_ipa_cmd *cmd;
3689 struct qeth_snmp_ureq *ureq;
3690 int req_len;
3691 struct qeth_arp_query_info qinfo = {0, };
3692 int rc = 0;
3693
3694 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3695
3696 if (card->info.guestlan)
3697 return -EOPNOTSUPP;
3698
3699 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3700 (!card->options.layer2)) {
3701 return -EOPNOTSUPP;
3702 }
3703 /* skip 4 bytes (data_len struct member) to get req_len */
3704 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3705 return -EFAULT;
3706 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3707 if (!ureq) {
3708 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3709 return -ENOMEM;
3710 }
3711 if (copy_from_user(ureq, udata,
3712 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3713 kfree(ureq);
3714 return -EFAULT;
3715 }
3716 qinfo.udata_len = ureq->hdr.data_len;
3717 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3718 if (!qinfo.udata) {
3719 kfree(ureq);
3720 return -ENOMEM;
3721 }
3722 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3723
3724 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3725 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3726 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3727 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3728 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3729 qeth_snmp_command_cb, (void *)&qinfo);
3730 if (rc)
3731 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3732 QETH_CARD_IFNAME(card), rc);
3733 else {
3734 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3735 rc = -EFAULT;
3736 }
3737
3738 kfree(ureq);
3739 kfree(qinfo.udata);
3740 return rc;
3741 }
3742 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3743
3744 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3745 {
3746 switch (card->info.type) {
3747 case QETH_CARD_TYPE_IQD:
3748 return 2;
3749 default:
3750 return 0;
3751 }
3752 }
3753
3754 static int qeth_qdio_establish(struct qeth_card *card)
3755 {
3756 struct qdio_initialize init_data;
3757 char *qib_param_field;
3758 struct qdio_buffer **in_sbal_ptrs;
3759 struct qdio_buffer **out_sbal_ptrs;
3760 int i, j, k;
3761 int rc = 0;
3762
3763 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3764
3765 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3766 GFP_KERNEL);
3767 if (!qib_param_field)
3768 return -ENOMEM;
3769
3770 qeth_create_qib_param_field(card, qib_param_field);
3771 qeth_create_qib_param_field_blkt(card, qib_param_field);
3772
3773 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3774 GFP_KERNEL);
3775 if (!in_sbal_ptrs) {
3776 kfree(qib_param_field);
3777 return -ENOMEM;
3778 }
3779 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3780 in_sbal_ptrs[i] = (struct qdio_buffer *)
3781 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3782
3783 out_sbal_ptrs =
3784 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3785 sizeof(void *), GFP_KERNEL);
3786 if (!out_sbal_ptrs) {
3787 kfree(in_sbal_ptrs);
3788 kfree(qib_param_field);
3789 return -ENOMEM;
3790 }
3791 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3792 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3793 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3794 card->qdio.out_qs[i]->bufs[j].buffer);
3795 }
3796
3797 memset(&init_data, 0, sizeof(struct qdio_initialize));
3798 init_data.cdev = CARD_DDEV(card);
3799 init_data.q_format = qeth_get_qdio_q_format(card);
3800 init_data.qib_param_field_format = 0;
3801 init_data.qib_param_field = qib_param_field;
3802 init_data.no_input_qs = 1;
3803 init_data.no_output_qs = card->qdio.no_out_queues;
3804 init_data.input_handler = card->discipline.input_handler;
3805 init_data.output_handler = card->discipline.output_handler;
3806 init_data.int_parm = (unsigned long) card;
3807 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3808 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3809
3810 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3811 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3812 rc = qdio_initialize(&init_data);
3813 if (rc)
3814 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3815 }
3816 kfree(out_sbal_ptrs);
3817 kfree(in_sbal_ptrs);
3818 kfree(qib_param_field);
3819 return rc;
3820 }
3821
3822 static void qeth_core_free_card(struct qeth_card *card)
3823 {
3824
3825 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3826 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3827 qeth_clean_channel(&card->read);
3828 qeth_clean_channel(&card->write);
3829 if (card->dev)
3830 free_netdev(card->dev);
3831 kfree(card->ip_tbd_list);
3832 qeth_free_qdio_buffers(card);
3833 unregister_service_level(&card->qeth_service_level);
3834 kfree(card);
3835 }
3836
3837 static struct ccw_device_id qeth_ids[] = {
3838 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3839 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3840 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3841 {},
3842 };
3843 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3844
3845 static struct ccw_driver qeth_ccw_driver = {
3846 .name = "qeth",
3847 .ids = qeth_ids,
3848 .probe = ccwgroup_probe_ccwdev,
3849 .remove = ccwgroup_remove_ccwdev,
3850 };
3851
3852 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3853 unsigned long driver_id)
3854 {
3855 return ccwgroup_create_from_string(root_dev, driver_id,
3856 &qeth_ccw_driver, 3, buf);
3857 }
3858
3859 int qeth_core_hardsetup_card(struct qeth_card *card)
3860 {
3861 int retries = 0;
3862 int rc;
3863
3864 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3865 atomic_set(&card->force_alloc_skb, 0);
3866 retry:
3867 if (retries)
3868 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3869 dev_name(&card->gdev->dev));
3870 ccw_device_set_offline(CARD_DDEV(card));
3871 ccw_device_set_offline(CARD_WDEV(card));
3872 ccw_device_set_offline(CARD_RDEV(card));
3873 rc = ccw_device_set_online(CARD_RDEV(card));
3874 if (rc)
3875 goto retriable;
3876 rc = ccw_device_set_online(CARD_WDEV(card));
3877 if (rc)
3878 goto retriable;
3879 rc = ccw_device_set_online(CARD_DDEV(card));
3880 if (rc)
3881 goto retriable;
3882 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3883 retriable:
3884 if (rc == -ERESTARTSYS) {
3885 QETH_DBF_TEXT(SETUP, 2, "break1");
3886 return rc;
3887 } else if (rc) {
3888 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3889 if (++retries > 3)
3890 goto out;
3891 else
3892 goto retry;
3893 }
3894 qeth_init_tokens(card);
3895 qeth_init_func_level(card);
3896 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3897 if (rc == -ERESTARTSYS) {
3898 QETH_DBF_TEXT(SETUP, 2, "break2");
3899 return rc;
3900 } else if (rc) {
3901 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3902 if (--retries < 0)
3903 goto out;
3904 else
3905 goto retry;
3906 }
3907 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3908 if (rc == -ERESTARTSYS) {
3909 QETH_DBF_TEXT(SETUP, 2, "break3");
3910 return rc;
3911 } else if (rc) {
3912 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3913 if (--retries < 0)
3914 goto out;
3915 else
3916 goto retry;
3917 }
3918 rc = qeth_mpc_initialize(card);
3919 if (rc) {
3920 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3921 goto out;
3922 }
3923 return 0;
3924 out:
3925 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3926 "an error on the device\n");
3927 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3928 dev_name(&card->gdev->dev), rc);
3929 return rc;
3930 }
3931 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3932
3933 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3934 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3935 {
3936 struct page *page = virt_to_page(element->addr);
3937 if (*pskb == NULL) {
3938 /* the upper protocol layers assume that there is data in the
3939 * skb itself. Copy a small amount (64 bytes) to make them
3940 * happy. */
3941 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3942 if (!(*pskb))
3943 return -ENOMEM;
3944 skb_reserve(*pskb, ETH_HLEN);
3945 if (data_len <= 64) {
3946 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3947 data_len);
3948 } else {
3949 get_page(page);
3950 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3951 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3952 data_len - 64);
3953 (*pskb)->data_len += data_len - 64;
3954 (*pskb)->len += data_len - 64;
3955 (*pskb)->truesize += data_len - 64;
3956 (*pfrag)++;
3957 }
3958 } else {
3959 get_page(page);
3960 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3961 (*pskb)->data_len += data_len;
3962 (*pskb)->len += data_len;
3963 (*pskb)->truesize += data_len;
3964 (*pfrag)++;
3965 }
3966 return 0;
3967 }
3968
3969 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3970 struct qdio_buffer *buffer,
3971 struct qdio_buffer_element **__element, int *__offset,
3972 struct qeth_hdr **hdr)
3973 {
3974 struct qdio_buffer_element *element = *__element;
3975 int offset = *__offset;
3976 struct sk_buff *skb = NULL;
3977 int skb_len = 0;
3978 void *data_ptr;
3979 int data_len;
3980 int headroom = 0;
3981 int use_rx_sg = 0;
3982 int frag = 0;
3983
3984 /* qeth_hdr must not cross element boundaries */
3985 if (element->length < offset + sizeof(struct qeth_hdr)) {
3986 if (qeth_is_last_sbale(element))
3987 return NULL;
3988 element++;
3989 offset = 0;
3990 if (element->length < sizeof(struct qeth_hdr))
3991 return NULL;
3992 }
3993 *hdr = element->addr + offset;
3994
3995 offset += sizeof(struct qeth_hdr);
3996 switch ((*hdr)->hdr.l2.id) {
3997 case QETH_HEADER_TYPE_LAYER2:
3998 skb_len = (*hdr)->hdr.l2.pkt_length;
3999 break;
4000 case QETH_HEADER_TYPE_LAYER3:
4001 skb_len = (*hdr)->hdr.l3.length;
4002 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4003 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4004 headroom = TR_HLEN;
4005 else
4006 headroom = ETH_HLEN;
4007 break;
4008 case QETH_HEADER_TYPE_OSN:
4009 skb_len = (*hdr)->hdr.osn.pdu_length;
4010 headroom = sizeof(struct qeth_hdr);
4011 break;
4012 default:
4013 break;
4014 }
4015
4016 if (!skb_len)
4017 return NULL;
4018
4019 if ((skb_len >= card->options.rx_sg_cb) &&
4020 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4021 (!atomic_read(&card->force_alloc_skb))) {
4022 use_rx_sg = 1;
4023 } else {
4024 skb = dev_alloc_skb(skb_len + headroom);
4025 if (!skb)
4026 goto no_mem;
4027 if (headroom)
4028 skb_reserve(skb, headroom);
4029 }
4030
4031 data_ptr = element->addr + offset;
4032 while (skb_len) {
4033 data_len = min(skb_len, (int)(element->length - offset));
4034 if (data_len) {
4035 if (use_rx_sg) {
4036 if (qeth_create_skb_frag(element, &skb, offset,
4037 &frag, data_len))
4038 goto no_mem;
4039 } else {
4040 memcpy(skb_put(skb, data_len), data_ptr,
4041 data_len);
4042 }
4043 }
4044 skb_len -= data_len;
4045 if (skb_len) {
4046 if (qeth_is_last_sbale(element)) {
4047 QETH_DBF_TEXT(TRACE, 4, "unexeob");
4048 QETH_DBF_TEXT_(TRACE, 4, "%s",
4049 CARD_BUS_ID(card));
4050 QETH_DBF_TEXT(QERR, 2, "unexeob");
4051 QETH_DBF_TEXT_(QERR, 2, "%s",
4052 CARD_BUS_ID(card));
4053 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4054 dev_kfree_skb_any(skb);
4055 card->stats.rx_errors++;
4056 return NULL;
4057 }
4058 element++;
4059 offset = 0;
4060 data_ptr = element->addr;
4061 } else {
4062 offset += data_len;
4063 }
4064 }
4065 *__element = element;
4066 *__offset = offset;
4067 if (use_rx_sg && card->options.performance_stats) {
4068 card->perf_stats.sg_skbs_rx++;
4069 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4070 }
4071 return skb;
4072 no_mem:
4073 if (net_ratelimit()) {
4074 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4075 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4076 }
4077 card->stats.rx_dropped++;
4078 return NULL;
4079 }
4080 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4081
4082 static void qeth_unregister_dbf_views(void)
4083 {
4084 int x;
4085 for (x = 0; x < QETH_DBF_INFOS; x++) {
4086 debug_unregister(qeth_dbf[x].id);
4087 qeth_dbf[x].id = NULL;
4088 }
4089 }
4090
4091 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
4092 {
4093 char dbf_txt_buf[32];
4094 va_list args;
4095
4096 if (level > (qeth_dbf[dbf_nix].id)->level)
4097 return;
4098 va_start(args, fmt);
4099 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4100 va_end(args);
4101 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4102 }
4103 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4104
4105 static int qeth_register_dbf_views(void)
4106 {
4107 int ret;
4108 int x;
4109
4110 for (x = 0; x < QETH_DBF_INFOS; x++) {
4111 /* register the areas */
4112 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4113 qeth_dbf[x].pages,
4114 qeth_dbf[x].areas,
4115 qeth_dbf[x].len);
4116 if (qeth_dbf[x].id == NULL) {
4117 qeth_unregister_dbf_views();
4118 return -ENOMEM;
4119 }
4120
4121 /* register a view */
4122 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4123 if (ret) {
4124 qeth_unregister_dbf_views();
4125 return ret;
4126 }
4127
4128 /* set a passing level */
4129 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4130 }
4131
4132 return 0;
4133 }
4134
4135 int qeth_core_load_discipline(struct qeth_card *card,
4136 enum qeth_discipline_id discipline)
4137 {
4138 int rc = 0;
4139 switch (discipline) {
4140 case QETH_DISCIPLINE_LAYER3:
4141 card->discipline.ccwgdriver = try_then_request_module(
4142 symbol_get(qeth_l3_ccwgroup_driver),
4143 "qeth_l3");
4144 break;
4145 case QETH_DISCIPLINE_LAYER2:
4146 card->discipline.ccwgdriver = try_then_request_module(
4147 symbol_get(qeth_l2_ccwgroup_driver),
4148 "qeth_l2");
4149 break;
4150 }
4151 if (!card->discipline.ccwgdriver) {
4152 dev_err(&card->gdev->dev, "There is no kernel module to "
4153 "support discipline %d\n", discipline);
4154 rc = -EINVAL;
4155 }
4156 return rc;
4157 }
4158
4159 void qeth_core_free_discipline(struct qeth_card *card)
4160 {
4161 if (card->options.layer2)
4162 symbol_put(qeth_l2_ccwgroup_driver);
4163 else
4164 symbol_put(qeth_l3_ccwgroup_driver);
4165 card->discipline.ccwgdriver = NULL;
4166 }
4167
4168 static void qeth_determine_capabilities(struct qeth_card *card)
4169 {
4170 int rc;
4171 int length;
4172 char *prcd;
4173
4174 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4175 rc = ccw_device_set_online(CARD_DDEV(card));
4176 if (rc) {
4177 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4178 goto out;
4179 }
4180
4181
4182 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4183 if (rc) {
4184 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4185 dev_name(&card->gdev->dev), rc);
4186 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4187 goto out_offline;
4188 }
4189 qeth_configure_unitaddr(card, prcd);
4190 qeth_configure_blkt_default(card, prcd);
4191 kfree(prcd);
4192
4193 rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd);
4194 if (rc)
4195 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4196
4197 out_offline:
4198 ccw_device_set_offline(CARD_DDEV(card));
4199 out:
4200 return;
4201 }
4202
4203 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4204 {
4205 struct qeth_card *card;
4206 struct device *dev;
4207 int rc;
4208 unsigned long flags;
4209
4210 QETH_DBF_TEXT(SETUP, 2, "probedev");
4211
4212 dev = &gdev->dev;
4213 if (!get_device(dev))
4214 return -ENODEV;
4215
4216 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4217
4218 card = qeth_alloc_card();
4219 if (!card) {
4220 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4221 rc = -ENOMEM;
4222 goto err_dev;
4223 }
4224 card->read.ccwdev = gdev->cdev[0];
4225 card->write.ccwdev = gdev->cdev[1];
4226 card->data.ccwdev = gdev->cdev[2];
4227 dev_set_drvdata(&gdev->dev, card);
4228 card->gdev = gdev;
4229 gdev->cdev[0]->handler = qeth_irq;
4230 gdev->cdev[1]->handler = qeth_irq;
4231 gdev->cdev[2]->handler = qeth_irq;
4232
4233 rc = qeth_determine_card_type(card);
4234 if (rc) {
4235 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4236 goto err_card;
4237 }
4238 rc = qeth_setup_card(card);
4239 if (rc) {
4240 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4241 goto err_card;
4242 }
4243
4244 if (card->info.type == QETH_CARD_TYPE_OSN) {
4245 rc = qeth_core_create_osn_attributes(dev);
4246 if (rc)
4247 goto err_card;
4248 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4249 if (rc) {
4250 qeth_core_remove_osn_attributes(dev);
4251 goto err_card;
4252 }
4253 rc = card->discipline.ccwgdriver->probe(card->gdev);
4254 if (rc) {
4255 qeth_core_free_discipline(card);
4256 qeth_core_remove_osn_attributes(dev);
4257 goto err_card;
4258 }
4259 } else {
4260 rc = qeth_core_create_device_attributes(dev);
4261 if (rc)
4262 goto err_card;
4263 }
4264
4265 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4266 list_add_tail(&card->list, &qeth_core_card_list.list);
4267 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4268
4269 qeth_determine_capabilities(card);
4270 return 0;
4271
4272 err_card:
4273 qeth_core_free_card(card);
4274 err_dev:
4275 put_device(dev);
4276 return rc;
4277 }
4278
4279 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4280 {
4281 unsigned long flags;
4282 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4283
4284 QETH_DBF_TEXT(SETUP, 2, "removedv");
4285 if (card->discipline.ccwgdriver) {
4286 card->discipline.ccwgdriver->remove(gdev);
4287 qeth_core_free_discipline(card);
4288 }
4289
4290 if (card->info.type == QETH_CARD_TYPE_OSN) {
4291 qeth_core_remove_osn_attributes(&gdev->dev);
4292 } else {
4293 qeth_core_remove_device_attributes(&gdev->dev);
4294 }
4295 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4296 list_del(&card->list);
4297 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4298 qeth_core_free_card(card);
4299 dev_set_drvdata(&gdev->dev, NULL);
4300 put_device(&gdev->dev);
4301 return;
4302 }
4303
4304 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4305 {
4306 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4307 int rc = 0;
4308 int def_discipline;
4309
4310 if (!card->discipline.ccwgdriver) {
4311 if (card->info.type == QETH_CARD_TYPE_IQD)
4312 def_discipline = QETH_DISCIPLINE_LAYER3;
4313 else
4314 def_discipline = QETH_DISCIPLINE_LAYER2;
4315 rc = qeth_core_load_discipline(card, def_discipline);
4316 if (rc)
4317 goto err;
4318 rc = card->discipline.ccwgdriver->probe(card->gdev);
4319 if (rc)
4320 goto err;
4321 }
4322 rc = card->discipline.ccwgdriver->set_online(gdev);
4323 err:
4324 return rc;
4325 }
4326
4327 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4328 {
4329 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4330 return card->discipline.ccwgdriver->set_offline(gdev);
4331 }
4332
4333 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4334 {
4335 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4336 if (card->discipline.ccwgdriver &&
4337 card->discipline.ccwgdriver->shutdown)
4338 card->discipline.ccwgdriver->shutdown(gdev);
4339 }
4340
4341 static int qeth_core_prepare(struct ccwgroup_device *gdev)
4342 {
4343 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4344 if (card->discipline.ccwgdriver &&
4345 card->discipline.ccwgdriver->prepare)
4346 return card->discipline.ccwgdriver->prepare(gdev);
4347 return 0;
4348 }
4349
4350 static void qeth_core_complete(struct ccwgroup_device *gdev)
4351 {
4352 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4353 if (card->discipline.ccwgdriver &&
4354 card->discipline.ccwgdriver->complete)
4355 card->discipline.ccwgdriver->complete(gdev);
4356 }
4357
4358 static int qeth_core_freeze(struct ccwgroup_device *gdev)
4359 {
4360 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4361 if (card->discipline.ccwgdriver &&
4362 card->discipline.ccwgdriver->freeze)
4363 return card->discipline.ccwgdriver->freeze(gdev);
4364 return 0;
4365 }
4366
4367 static int qeth_core_thaw(struct ccwgroup_device *gdev)
4368 {
4369 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4370 if (card->discipline.ccwgdriver &&
4371 card->discipline.ccwgdriver->thaw)
4372 return card->discipline.ccwgdriver->thaw(gdev);
4373 return 0;
4374 }
4375
4376 static int qeth_core_restore(struct ccwgroup_device *gdev)
4377 {
4378 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4379 if (card->discipline.ccwgdriver &&
4380 card->discipline.ccwgdriver->restore)
4381 return card->discipline.ccwgdriver->restore(gdev);
4382 return 0;
4383 }
4384
4385 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4386 .owner = THIS_MODULE,
4387 .name = "qeth",
4388 .driver_id = 0xD8C5E3C8,
4389 .probe = qeth_core_probe_device,
4390 .remove = qeth_core_remove_device,
4391 .set_online = qeth_core_set_online,
4392 .set_offline = qeth_core_set_offline,
4393 .shutdown = qeth_core_shutdown,
4394 .prepare = qeth_core_prepare,
4395 .complete = qeth_core_complete,
4396 .freeze = qeth_core_freeze,
4397 .thaw = qeth_core_thaw,
4398 .restore = qeth_core_restore,
4399 };
4400
4401 static ssize_t
4402 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4403 size_t count)
4404 {
4405 int err;
4406 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4407 qeth_core_ccwgroup_driver.driver_id);
4408 if (err)
4409 return err;
4410 else
4411 return count;
4412 }
4413
4414 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4415
4416 static struct {
4417 const char str[ETH_GSTRING_LEN];
4418 } qeth_ethtool_stats_keys[] = {
4419 /* 0 */{"rx skbs"},
4420 {"rx buffers"},
4421 {"tx skbs"},
4422 {"tx buffers"},
4423 {"tx skbs no packing"},
4424 {"tx buffers no packing"},
4425 {"tx skbs packing"},
4426 {"tx buffers packing"},
4427 {"tx sg skbs"},
4428 {"tx sg frags"},
4429 /* 10 */{"rx sg skbs"},
4430 {"rx sg frags"},
4431 {"rx sg page allocs"},
4432 {"tx large kbytes"},
4433 {"tx large count"},
4434 {"tx pk state ch n->p"},
4435 {"tx pk state ch p->n"},
4436 {"tx pk watermark low"},
4437 {"tx pk watermark high"},
4438 {"queue 0 buffer usage"},
4439 /* 20 */{"queue 1 buffer usage"},
4440 {"queue 2 buffer usage"},
4441 {"queue 3 buffer usage"},
4442 {"rx handler time"},
4443 {"rx handler count"},
4444 {"rx do_QDIO time"},
4445 {"rx do_QDIO count"},
4446 {"tx handler time"},
4447 {"tx handler count"},
4448 {"tx time"},
4449 /* 30 */{"tx count"},
4450 {"tx do_QDIO time"},
4451 {"tx do_QDIO count"},
4452 {"tx csum"},
4453 {"tx lin"},
4454 };
4455
4456 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4457 {
4458 switch (stringset) {
4459 case ETH_SS_STATS:
4460 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4461 default:
4462 return -EINVAL;
4463 }
4464 }
4465 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4466
4467 void qeth_core_get_ethtool_stats(struct net_device *dev,
4468 struct ethtool_stats *stats, u64 *data)
4469 {
4470 struct qeth_card *card = dev->ml_priv;
4471 data[0] = card->stats.rx_packets -
4472 card->perf_stats.initial_rx_packets;
4473 data[1] = card->perf_stats.bufs_rec;
4474 data[2] = card->stats.tx_packets -
4475 card->perf_stats.initial_tx_packets;
4476 data[3] = card->perf_stats.bufs_sent;
4477 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4478 - card->perf_stats.skbs_sent_pack;
4479 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4480 data[6] = card->perf_stats.skbs_sent_pack;
4481 data[7] = card->perf_stats.bufs_sent_pack;
4482 data[8] = card->perf_stats.sg_skbs_sent;
4483 data[9] = card->perf_stats.sg_frags_sent;
4484 data[10] = card->perf_stats.sg_skbs_rx;
4485 data[11] = card->perf_stats.sg_frags_rx;
4486 data[12] = card->perf_stats.sg_alloc_page_rx;
4487 data[13] = (card->perf_stats.large_send_bytes >> 10);
4488 data[14] = card->perf_stats.large_send_cnt;
4489 data[15] = card->perf_stats.sc_dp_p;
4490 data[16] = card->perf_stats.sc_p_dp;
4491 data[17] = QETH_LOW_WATERMARK_PACK;
4492 data[18] = QETH_HIGH_WATERMARK_PACK;
4493 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4494 data[20] = (card->qdio.no_out_queues > 1) ?
4495 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4496 data[21] = (card->qdio.no_out_queues > 2) ?
4497 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4498 data[22] = (card->qdio.no_out_queues > 3) ?
4499 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4500 data[23] = card->perf_stats.inbound_time;
4501 data[24] = card->perf_stats.inbound_cnt;
4502 data[25] = card->perf_stats.inbound_do_qdio_time;
4503 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4504 data[27] = card->perf_stats.outbound_handler_time;
4505 data[28] = card->perf_stats.outbound_handler_cnt;
4506 data[29] = card->perf_stats.outbound_time;
4507 data[30] = card->perf_stats.outbound_cnt;
4508 data[31] = card->perf_stats.outbound_do_qdio_time;
4509 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4510 data[33] = card->perf_stats.tx_csum;
4511 data[34] = card->perf_stats.tx_lin;
4512 }
4513 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4514
4515 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4516 {
4517 switch (stringset) {
4518 case ETH_SS_STATS:
4519 memcpy(data, &qeth_ethtool_stats_keys,
4520 sizeof(qeth_ethtool_stats_keys));
4521 break;
4522 default:
4523 WARN_ON(1);
4524 break;
4525 }
4526 }
4527 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4528
4529 void qeth_core_get_drvinfo(struct net_device *dev,
4530 struct ethtool_drvinfo *info)
4531 {
4532 struct qeth_card *card = dev->ml_priv;
4533 if (card->options.layer2)
4534 strcpy(info->driver, "qeth_l2");
4535 else
4536 strcpy(info->driver, "qeth_l3");
4537
4538 strcpy(info->version, "1.0");
4539 strcpy(info->fw_version, card->info.mcl_level);
4540 sprintf(info->bus_info, "%s/%s/%s",
4541 CARD_RDEV_ID(card),
4542 CARD_WDEV_ID(card),
4543 CARD_DDEV_ID(card));
4544 }
4545 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4546
4547 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4548 struct ethtool_cmd *ecmd)
4549 {
4550 struct qeth_card *card = netdev->ml_priv;
4551 enum qeth_link_types link_type;
4552
4553 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4554 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4555 else
4556 link_type = card->info.link_type;
4557
4558 ecmd->transceiver = XCVR_INTERNAL;
4559 ecmd->supported = SUPPORTED_Autoneg;
4560 ecmd->advertising = ADVERTISED_Autoneg;
4561 ecmd->duplex = DUPLEX_FULL;
4562 ecmd->autoneg = AUTONEG_ENABLE;
4563
4564 switch (link_type) {
4565 case QETH_LINK_TYPE_FAST_ETH:
4566 case QETH_LINK_TYPE_LANE_ETH100:
4567 ecmd->supported |= SUPPORTED_10baseT_Half |
4568 SUPPORTED_10baseT_Full |
4569 SUPPORTED_100baseT_Half |
4570 SUPPORTED_100baseT_Full |
4571 SUPPORTED_TP;
4572 ecmd->advertising |= ADVERTISED_10baseT_Half |
4573 ADVERTISED_10baseT_Full |
4574 ADVERTISED_100baseT_Half |
4575 ADVERTISED_100baseT_Full |
4576 ADVERTISED_TP;
4577 ecmd->speed = SPEED_100;
4578 ecmd->port = PORT_TP;
4579 break;
4580
4581 case QETH_LINK_TYPE_GBIT_ETH:
4582 case QETH_LINK_TYPE_LANE_ETH1000:
4583 ecmd->supported |= SUPPORTED_10baseT_Half |
4584 SUPPORTED_10baseT_Full |
4585 SUPPORTED_100baseT_Half |
4586 SUPPORTED_100baseT_Full |
4587 SUPPORTED_1000baseT_Half |
4588 SUPPORTED_1000baseT_Full |
4589 SUPPORTED_FIBRE;
4590 ecmd->advertising |= ADVERTISED_10baseT_Half |
4591 ADVERTISED_10baseT_Full |
4592 ADVERTISED_100baseT_Half |
4593 ADVERTISED_100baseT_Full |
4594 ADVERTISED_1000baseT_Half |
4595 ADVERTISED_1000baseT_Full |
4596 ADVERTISED_FIBRE;
4597 ecmd->speed = SPEED_1000;
4598 ecmd->port = PORT_FIBRE;
4599 break;
4600
4601 case QETH_LINK_TYPE_10GBIT_ETH:
4602 ecmd->supported |= SUPPORTED_10baseT_Half |
4603 SUPPORTED_10baseT_Full |
4604 SUPPORTED_100baseT_Half |
4605 SUPPORTED_100baseT_Full |
4606 SUPPORTED_1000baseT_Half |
4607 SUPPORTED_1000baseT_Full |
4608 SUPPORTED_10000baseT_Full |
4609 SUPPORTED_FIBRE;
4610 ecmd->advertising |= ADVERTISED_10baseT_Half |
4611 ADVERTISED_10baseT_Full |
4612 ADVERTISED_100baseT_Half |
4613 ADVERTISED_100baseT_Full |
4614 ADVERTISED_1000baseT_Half |
4615 ADVERTISED_1000baseT_Full |
4616 ADVERTISED_10000baseT_Full |
4617 ADVERTISED_FIBRE;
4618 ecmd->speed = SPEED_10000;
4619 ecmd->port = PORT_FIBRE;
4620 break;
4621
4622 default:
4623 ecmd->supported |= SUPPORTED_10baseT_Half |
4624 SUPPORTED_10baseT_Full |
4625 SUPPORTED_TP;
4626 ecmd->advertising |= ADVERTISED_10baseT_Half |
4627 ADVERTISED_10baseT_Full |
4628 ADVERTISED_TP;
4629 ecmd->speed = SPEED_10;
4630 ecmd->port = PORT_TP;
4631 }
4632
4633 return 0;
4634 }
4635 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4636
4637 static int __init qeth_core_init(void)
4638 {
4639 int rc;
4640
4641 pr_info("loading core functions\n");
4642 INIT_LIST_HEAD(&qeth_core_card_list.list);
4643 rwlock_init(&qeth_core_card_list.rwlock);
4644
4645 rc = qeth_register_dbf_views();
4646 if (rc)
4647 goto out_err;
4648 rc = ccw_driver_register(&qeth_ccw_driver);
4649 if (rc)
4650 goto ccw_err;
4651 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4652 if (rc)
4653 goto ccwgroup_err;
4654 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4655 &driver_attr_group);
4656 if (rc)
4657 goto driver_err;
4658 qeth_core_root_dev = root_device_register("qeth");
4659 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4660 if (rc)
4661 goto register_err;
4662
4663 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4664 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4665 if (!qeth_core_header_cache) {
4666 rc = -ENOMEM;
4667 goto slab_err;
4668 }
4669
4670 return 0;
4671 slab_err:
4672 root_device_unregister(qeth_core_root_dev);
4673 register_err:
4674 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4675 &driver_attr_group);
4676 driver_err:
4677 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4678 ccwgroup_err:
4679 ccw_driver_unregister(&qeth_ccw_driver);
4680 ccw_err:
4681 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4682 qeth_unregister_dbf_views();
4683 out_err:
4684 pr_err("Initializing the qeth device driver failed\n");
4685 return rc;
4686 }
4687
4688 static void __exit qeth_core_exit(void)
4689 {
4690 root_device_unregister(qeth_core_root_dev);
4691 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4692 &driver_attr_group);
4693 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4694 ccw_driver_unregister(&qeth_ccw_driver);
4695 kmem_cache_destroy(qeth_core_header_cache);
4696 qeth_unregister_dbf_views();
4697 pr_info("core functions removed\n");
4698 }
4699
4700 module_init(qeth_core_init);
4701 module_exit(qeth_core_exit);
4702 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4703 MODULE_DESCRIPTION("qeth core functions");
4704 MODULE_LICENSE("GPL");