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[pohmelfs.git] / drivers / acpi / processor_idle.c
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1 /*
2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/slab.h>
36 #include <linux/acpi.h>
37 #include <linux/dmi.h>
38 #include <linux/moduleparam.h>
39 #include <linux/sched.h> /* need_resched() */
40 #include <linux/pm_qos.h>
41 #include <linux/clockchips.h>
42 #include <linux/cpuidle.h>
43 #include <linux/irqflags.h>
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
51 #ifdef CONFIG_X86
52 #include <asm/apic.h>
53 #endif
55 #include <asm/io.h>
56 #include <asm/uaccess.h>
58 #include <acpi/acpi_bus.h>
59 #include <acpi/processor.h>
60 #include <asm/processor.h>
62 #define PREFIX "ACPI: "
64 #define ACPI_PROCESSOR_CLASS "processor"
65 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
66 ACPI_MODULE_NAME("processor_idle");
67 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68 #define C2_OVERHEAD 1 /* 1us */
69 #define C3_OVERHEAD 1 /* 1us */
70 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
72 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73 module_param(max_cstate, uint, 0000);
74 static unsigned int nocst __read_mostly;
75 module_param(nocst, uint, 0000);
76 static int bm_check_disable __read_mostly;
77 module_param(bm_check_disable, uint, 0000);
79 static unsigned int latency_factor __read_mostly = 2;
80 module_param(latency_factor, uint, 0644);
82 static int disabled_by_idle_boot_param(void)
84 return boot_option_idle_override == IDLE_POLL ||
85 boot_option_idle_override == IDLE_FORCE_MWAIT ||
86 boot_option_idle_override == IDLE_HALT;
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
93 * To skip this limit, boot/load with a large max_cstate limit.
95 static int set_max_cstate(const struct dmi_system_id *id)
97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
98 return 0;
100 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id->ident,
102 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
104 max_cstate = (long)id->driver_data;
106 return 0;
109 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
112 { set_max_cstate, "Clevo 5600D", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
114 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
115 (void *)2},
116 { set_max_cstate, "Pavilion zv5000", {
117 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
118 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
119 (void *)1},
120 { set_max_cstate, "Asus L8400B", {
121 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
122 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
123 (void *)1},
129 * Callers should disable interrupts before the call and enable
130 * interrupts after return.
132 static void acpi_safe_halt(void)
134 current_thread_info()->status &= ~TS_POLLING;
136 * TS_POLLING-cleared state must be visible before we
137 * test NEED_RESCHED:
139 smp_mb();
140 if (!need_resched()) {
141 safe_halt();
142 local_irq_disable();
144 current_thread_info()->status |= TS_POLLING;
147 #ifdef ARCH_APICTIMER_STOPS_ON_C3
150 * Some BIOS implementations switch to C3 in the published C2 state.
151 * This seems to be a common problem on AMD boxen, but other vendors
152 * are affected too. We pick the most conservative approach: we assume
153 * that the local APIC stops in both C2 and C3.
155 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
156 struct acpi_processor_cx *cx)
158 struct acpi_processor_power *pwr = &pr->power;
159 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
161 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
162 return;
164 if (amd_e400_c1e_detected)
165 type = ACPI_STATE_C1;
168 * Check, if one of the previous states already marked the lapic
169 * unstable
171 if (pwr->timer_broadcast_on_state < state)
172 return;
174 if (cx->type >= type)
175 pr->power.timer_broadcast_on_state = state;
178 static void __lapic_timer_propagate_broadcast(void *arg)
180 struct acpi_processor *pr = (struct acpi_processor *) arg;
181 unsigned long reason;
183 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
184 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
186 clockevents_notify(reason, &pr->id);
189 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
191 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
192 (void *)pr, 1);
195 /* Power(C) State timer broadcast control */
196 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
197 struct acpi_processor_cx *cx,
198 int broadcast)
200 int state = cx - pr->power.states;
202 if (state >= pr->power.timer_broadcast_on_state) {
203 unsigned long reason;
205 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
206 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
207 clockevents_notify(reason, &pr->id);
211 #else
213 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
214 struct acpi_processor_cx *cstate) { }
215 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
216 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
217 struct acpi_processor_cx *cx,
218 int broadcast)
222 #endif
225 * Suspend / resume control
227 static u32 saved_bm_rld;
229 static void acpi_idle_bm_rld_save(void)
231 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
233 static void acpi_idle_bm_rld_restore(void)
235 u32 resumed_bm_rld;
237 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
239 if (resumed_bm_rld != saved_bm_rld)
240 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
243 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
245 acpi_idle_bm_rld_save();
246 return 0;
249 int acpi_processor_resume(struct acpi_device * device)
251 acpi_idle_bm_rld_restore();
252 return 0;
255 #if defined(CONFIG_X86)
256 static void tsc_check_state(int state)
258 switch (boot_cpu_data.x86_vendor) {
259 case X86_VENDOR_AMD:
260 case X86_VENDOR_INTEL:
262 * AMD Fam10h TSC will tick in all
263 * C/P/S0/S1 states when this bit is set.
265 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
266 return;
268 /*FALL THROUGH*/
269 default:
270 /* TSC could halt in idle, so notify users */
271 if (state > ACPI_STATE_C1)
272 mark_tsc_unstable("TSC halts in idle");
275 #else
276 static void tsc_check_state(int state) { return; }
277 #endif
279 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
282 if (!pr)
283 return -EINVAL;
285 if (!pr->pblk)
286 return -ENODEV;
288 /* if info is obtained from pblk/fadt, type equals state */
289 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
290 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
292 #ifndef CONFIG_HOTPLUG_CPU
294 * Check for P_LVL2_UP flag before entering C2 and above on
295 * an SMP system.
297 if ((num_online_cpus() > 1) &&
298 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
299 return -ENODEV;
300 #endif
302 /* determine C2 and C3 address from pblk */
303 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
304 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
306 /* determine latencies from FADT */
307 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
308 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
311 * FADT specified C2 latency must be less than or equal to
312 * 100 microseconds.
314 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
315 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
316 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
317 /* invalidate C2 */
318 pr->power.states[ACPI_STATE_C2].address = 0;
322 * FADT supplied C3 latency must be less than or equal to
323 * 1000 microseconds.
325 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
326 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
327 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
328 /* invalidate C3 */
329 pr->power.states[ACPI_STATE_C3].address = 0;
332 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
333 "lvl2[0x%08x] lvl3[0x%08x]\n",
334 pr->power.states[ACPI_STATE_C2].address,
335 pr->power.states[ACPI_STATE_C3].address));
337 return 0;
340 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
342 if (!pr->power.states[ACPI_STATE_C1].valid) {
343 /* set the first C-State to C1 */
344 /* all processors need to support C1 */
345 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
346 pr->power.states[ACPI_STATE_C1].valid = 1;
347 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
349 /* the C0 state only exists as a filler in our array */
350 pr->power.states[ACPI_STATE_C0].valid = 1;
351 return 0;
354 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
356 acpi_status status = 0;
357 u64 count;
358 int current_count;
359 int i;
360 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
361 union acpi_object *cst;
364 if (nocst)
365 return -ENODEV;
367 current_count = 0;
369 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
370 if (ACPI_FAILURE(status)) {
371 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
372 return -ENODEV;
375 cst = buffer.pointer;
377 /* There must be at least 2 elements */
378 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
379 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
380 status = -EFAULT;
381 goto end;
384 count = cst->package.elements[0].integer.value;
386 /* Validate number of power states. */
387 if (count < 1 || count != cst->package.count - 1) {
388 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
389 status = -EFAULT;
390 goto end;
393 /* Tell driver that at least _CST is supported. */
394 pr->flags.has_cst = 1;
396 for (i = 1; i <= count; i++) {
397 union acpi_object *element;
398 union acpi_object *obj;
399 struct acpi_power_register *reg;
400 struct acpi_processor_cx cx;
402 memset(&cx, 0, sizeof(cx));
404 element = &(cst->package.elements[i]);
405 if (element->type != ACPI_TYPE_PACKAGE)
406 continue;
408 if (element->package.count != 4)
409 continue;
411 obj = &(element->package.elements[0]);
413 if (obj->type != ACPI_TYPE_BUFFER)
414 continue;
416 reg = (struct acpi_power_register *)obj->buffer.pointer;
418 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
419 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
420 continue;
422 /* There should be an easy way to extract an integer... */
423 obj = &(element->package.elements[1]);
424 if (obj->type != ACPI_TYPE_INTEGER)
425 continue;
427 cx.type = obj->integer.value;
429 * Some buggy BIOSes won't list C1 in _CST -
430 * Let acpi_processor_get_power_info_default() handle them later
432 if (i == 1 && cx.type != ACPI_STATE_C1)
433 current_count++;
435 cx.address = reg->address;
436 cx.index = current_count + 1;
438 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
439 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
440 if (acpi_processor_ffh_cstate_probe
441 (pr->id, &cx, reg) == 0) {
442 cx.entry_method = ACPI_CSTATE_FFH;
443 } else if (cx.type == ACPI_STATE_C1) {
445 * C1 is a special case where FIXED_HARDWARE
446 * can be handled in non-MWAIT way as well.
447 * In that case, save this _CST entry info.
448 * Otherwise, ignore this info and continue.
450 cx.entry_method = ACPI_CSTATE_HALT;
451 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
452 } else {
453 continue;
455 if (cx.type == ACPI_STATE_C1 &&
456 (boot_option_idle_override == IDLE_NOMWAIT)) {
458 * In most cases the C1 space_id obtained from
459 * _CST object is FIXED_HARDWARE access mode.
460 * But when the option of idle=halt is added,
461 * the entry_method type should be changed from
462 * CSTATE_FFH to CSTATE_HALT.
463 * When the option of idle=nomwait is added,
464 * the C1 entry_method type should be
465 * CSTATE_HALT.
467 cx.entry_method = ACPI_CSTATE_HALT;
468 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
470 } else {
471 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
472 cx.address);
475 if (cx.type == ACPI_STATE_C1) {
476 cx.valid = 1;
479 obj = &(element->package.elements[2]);
480 if (obj->type != ACPI_TYPE_INTEGER)
481 continue;
483 cx.latency = obj->integer.value;
485 obj = &(element->package.elements[3]);
486 if (obj->type != ACPI_TYPE_INTEGER)
487 continue;
489 cx.power = obj->integer.value;
491 current_count++;
492 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
495 * We support total ACPI_PROCESSOR_MAX_POWER - 1
496 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
498 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
499 printk(KERN_WARNING
500 "Limiting number of power states to max (%d)\n",
501 ACPI_PROCESSOR_MAX_POWER);
502 printk(KERN_WARNING
503 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
504 break;
508 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
509 current_count));
511 /* Validate number of power states discovered */
512 if (current_count < 2)
513 status = -EFAULT;
515 end:
516 kfree(buffer.pointer);
518 return status;
521 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
522 struct acpi_processor_cx *cx)
524 static int bm_check_flag = -1;
525 static int bm_control_flag = -1;
528 if (!cx->address)
529 return;
532 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
533 * DMA transfers are used by any ISA device to avoid livelock.
534 * Note that we could disable Type-F DMA (as recommended by
535 * the erratum), but this is known to disrupt certain ISA
536 * devices thus we take the conservative approach.
538 else if (errata.piix4.fdma) {
539 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
540 "C3 not supported on PIIX4 with Type-F DMA\n"));
541 return;
544 /* All the logic here assumes flags.bm_check is same across all CPUs */
545 if (bm_check_flag == -1) {
546 /* Determine whether bm_check is needed based on CPU */
547 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
548 bm_check_flag = pr->flags.bm_check;
549 bm_control_flag = pr->flags.bm_control;
550 } else {
551 pr->flags.bm_check = bm_check_flag;
552 pr->flags.bm_control = bm_control_flag;
555 if (pr->flags.bm_check) {
556 if (!pr->flags.bm_control) {
557 if (pr->flags.has_cst != 1) {
558 /* bus mastering control is necessary */
559 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
560 "C3 support requires BM control\n"));
561 return;
562 } else {
563 /* Here we enter C3 without bus mastering */
564 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
565 "C3 support without BM control\n"));
568 } else {
570 * WBINVD should be set in fadt, for C3 state to be
571 * supported on when bm_check is not required.
573 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
574 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
575 "Cache invalidation should work properly"
576 " for C3 to be enabled on SMP systems\n"));
577 return;
582 * Otherwise we've met all of our C3 requirements.
583 * Normalize the C3 latency to expidite policy. Enable
584 * checking of bus mastering status (bm_check) so we can
585 * use this in our C3 policy
587 cx->valid = 1;
589 cx->latency_ticks = cx->latency;
591 * On older chipsets, BM_RLD needs to be set
592 * in order for Bus Master activity to wake the
593 * system from C3. Newer chipsets handle DMA
594 * during C3 automatically and BM_RLD is a NOP.
595 * In either case, the proper way to
596 * handle BM_RLD is to set it and leave it set.
598 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
600 return;
603 static int acpi_processor_power_verify(struct acpi_processor *pr)
605 unsigned int i;
606 unsigned int working = 0;
608 pr->power.timer_broadcast_on_state = INT_MAX;
610 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
611 struct acpi_processor_cx *cx = &pr->power.states[i];
613 switch (cx->type) {
614 case ACPI_STATE_C1:
615 cx->valid = 1;
616 break;
618 case ACPI_STATE_C2:
619 if (!cx->address)
620 break;
621 cx->valid = 1;
622 cx->latency_ticks = cx->latency; /* Normalize latency */
623 break;
625 case ACPI_STATE_C3:
626 acpi_processor_power_verify_c3(pr, cx);
627 break;
629 if (!cx->valid)
630 continue;
632 lapic_timer_check_state(i, pr, cx);
633 tsc_check_state(cx->type);
634 working++;
637 lapic_timer_propagate_broadcast(pr);
639 return (working);
642 static int acpi_processor_get_power_info(struct acpi_processor *pr)
644 unsigned int i;
645 int result;
648 /* NOTE: the idle thread may not be running while calling
649 * this function */
651 /* Zero initialize all the C-states info. */
652 memset(pr->power.states, 0, sizeof(pr->power.states));
654 result = acpi_processor_get_power_info_cst(pr);
655 if (result == -ENODEV)
656 result = acpi_processor_get_power_info_fadt(pr);
658 if (result)
659 return result;
661 acpi_processor_get_power_info_default(pr);
663 pr->power.count = acpi_processor_power_verify(pr);
666 * if one state of type C2 or C3 is available, mark this
667 * CPU as being "idle manageable"
669 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
670 if (pr->power.states[i].valid) {
671 pr->power.count = i;
672 if (pr->power.states[i].type >= ACPI_STATE_C2)
673 pr->flags.power = 1;
677 return 0;
681 * acpi_idle_bm_check - checks if bus master activity was detected
683 static int acpi_idle_bm_check(void)
685 u32 bm_status = 0;
687 if (bm_check_disable)
688 return 0;
690 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
691 if (bm_status)
692 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
694 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
695 * the true state of bus mastering activity; forcing us to
696 * manually check the BMIDEA bit of each IDE channel.
698 else if (errata.piix4.bmisx) {
699 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
700 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
701 bm_status = 1;
703 return bm_status;
707 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
708 * @cx: cstate data
710 * Caller disables interrupt before call and enables interrupt after return.
712 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
714 /* Don't trace irqs off for idle */
715 stop_critical_timings();
716 if (cx->entry_method == ACPI_CSTATE_FFH) {
717 /* Call into architectural FFH based C-state */
718 acpi_processor_ffh_cstate_enter(cx);
719 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
720 acpi_safe_halt();
721 } else {
722 /* IO port based C-state */
723 inb(cx->address);
724 /* Dummy wait op - must do something useless after P_LVL2 read
725 because chipsets cannot guarantee that STPCLK# signal
726 gets asserted in time to freeze execution properly. */
727 inl(acpi_gbl_FADT.xpm_timer_block.address);
729 start_critical_timings();
733 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
734 * @dev: the target CPU
735 * @drv: cpuidle driver containing cpuidle state info
736 * @index: index of target state
738 * This is equivalent to the HALT instruction.
740 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
741 struct cpuidle_driver *drv, int index)
743 ktime_t kt1, kt2;
744 s64 idle_time;
745 struct acpi_processor *pr;
746 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
747 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
749 pr = __this_cpu_read(processors);
750 dev->last_residency = 0;
752 if (unlikely(!pr))
753 return -EINVAL;
755 local_irq_disable();
757 lapic_timer_state_broadcast(pr, cx, 1);
758 kt1 = ktime_get_real();
759 acpi_idle_do_entry(cx);
760 kt2 = ktime_get_real();
761 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
763 /* Update device last_residency*/
764 dev->last_residency = (int)idle_time;
766 local_irq_enable();
767 cx->usage++;
768 lapic_timer_state_broadcast(pr, cx, 0);
770 return index;
774 * acpi_idle_enter_simple - enters an ACPI state without BM handling
775 * @dev: the target CPU
776 * @drv: cpuidle driver with cpuidle state information
777 * @index: the index of suggested state
779 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
780 struct cpuidle_driver *drv, int index)
782 struct acpi_processor *pr;
783 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
784 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
785 ktime_t kt1, kt2;
786 s64 idle_time_ns;
787 s64 idle_time;
789 pr = __this_cpu_read(processors);
790 dev->last_residency = 0;
792 if (unlikely(!pr))
793 return -EINVAL;
795 local_irq_disable();
797 if (cx->entry_method != ACPI_CSTATE_FFH) {
798 current_thread_info()->status &= ~TS_POLLING;
800 * TS_POLLING-cleared state must be visible before we test
801 * NEED_RESCHED:
803 smp_mb();
805 if (unlikely(need_resched())) {
806 current_thread_info()->status |= TS_POLLING;
807 local_irq_enable();
808 return -EINVAL;
813 * Must be done before busmaster disable as we might need to
814 * access HPET !
816 lapic_timer_state_broadcast(pr, cx, 1);
818 if (cx->type == ACPI_STATE_C3)
819 ACPI_FLUSH_CPU_CACHE();
821 kt1 = ktime_get_real();
822 /* Tell the scheduler that we are going deep-idle: */
823 sched_clock_idle_sleep_event();
824 acpi_idle_do_entry(cx);
825 kt2 = ktime_get_real();
826 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
827 idle_time = idle_time_ns;
828 do_div(idle_time, NSEC_PER_USEC);
830 /* Update device last_residency*/
831 dev->last_residency = (int)idle_time;
833 /* Tell the scheduler how much we idled: */
834 sched_clock_idle_wakeup_event(idle_time_ns);
836 local_irq_enable();
837 if (cx->entry_method != ACPI_CSTATE_FFH)
838 current_thread_info()->status |= TS_POLLING;
840 cx->usage++;
842 lapic_timer_state_broadcast(pr, cx, 0);
843 cx->time += idle_time;
844 return index;
847 static int c3_cpu_count;
848 static DEFINE_RAW_SPINLOCK(c3_lock);
851 * acpi_idle_enter_bm - enters C3 with proper BM handling
852 * @dev: the target CPU
853 * @drv: cpuidle driver containing state data
854 * @index: the index of suggested state
856 * If BM is detected, the deepest non-C3 idle state is entered instead.
858 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
859 struct cpuidle_driver *drv, int index)
861 struct acpi_processor *pr;
862 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
863 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
864 ktime_t kt1, kt2;
865 s64 idle_time_ns;
866 s64 idle_time;
869 pr = __this_cpu_read(processors);
870 dev->last_residency = 0;
872 if (unlikely(!pr))
873 return -EINVAL;
875 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
876 if (drv->safe_state_index >= 0) {
877 return drv->states[drv->safe_state_index].enter(dev,
878 drv, drv->safe_state_index);
879 } else {
880 local_irq_disable();
881 acpi_safe_halt();
882 local_irq_enable();
883 return -EINVAL;
887 local_irq_disable();
889 if (cx->entry_method != ACPI_CSTATE_FFH) {
890 current_thread_info()->status &= ~TS_POLLING;
892 * TS_POLLING-cleared state must be visible before we test
893 * NEED_RESCHED:
895 smp_mb();
897 if (unlikely(need_resched())) {
898 current_thread_info()->status |= TS_POLLING;
899 local_irq_enable();
900 return -EINVAL;
904 acpi_unlazy_tlb(smp_processor_id());
906 /* Tell the scheduler that we are going deep-idle: */
907 sched_clock_idle_sleep_event();
909 * Must be done before busmaster disable as we might need to
910 * access HPET !
912 lapic_timer_state_broadcast(pr, cx, 1);
914 kt1 = ktime_get_real();
916 * disable bus master
917 * bm_check implies we need ARB_DIS
918 * !bm_check implies we need cache flush
919 * bm_control implies whether we can do ARB_DIS
921 * That leaves a case where bm_check is set and bm_control is
922 * not set. In that case we cannot do much, we enter C3
923 * without doing anything.
925 if (pr->flags.bm_check && pr->flags.bm_control) {
926 raw_spin_lock(&c3_lock);
927 c3_cpu_count++;
928 /* Disable bus master arbitration when all CPUs are in C3 */
929 if (c3_cpu_count == num_online_cpus())
930 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
931 raw_spin_unlock(&c3_lock);
932 } else if (!pr->flags.bm_check) {
933 ACPI_FLUSH_CPU_CACHE();
936 acpi_idle_do_entry(cx);
938 /* Re-enable bus master arbitration */
939 if (pr->flags.bm_check && pr->flags.bm_control) {
940 raw_spin_lock(&c3_lock);
941 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
942 c3_cpu_count--;
943 raw_spin_unlock(&c3_lock);
945 kt2 = ktime_get_real();
946 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
947 idle_time = idle_time_ns;
948 do_div(idle_time, NSEC_PER_USEC);
950 /* Update device last_residency*/
951 dev->last_residency = (int)idle_time;
953 /* Tell the scheduler how much we idled: */
954 sched_clock_idle_wakeup_event(idle_time_ns);
956 local_irq_enable();
957 if (cx->entry_method != ACPI_CSTATE_FFH)
958 current_thread_info()->status |= TS_POLLING;
960 cx->usage++;
962 lapic_timer_state_broadcast(pr, cx, 0);
963 cx->time += idle_time;
964 return index;
967 struct cpuidle_driver acpi_idle_driver = {
968 .name = "acpi_idle",
969 .owner = THIS_MODULE,
973 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
974 * device i.e. per-cpu data
976 * @pr: the ACPI processor
978 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr)
980 int i, count = CPUIDLE_DRIVER_STATE_START;
981 struct acpi_processor_cx *cx;
982 struct cpuidle_state_usage *state_usage;
983 struct cpuidle_device *dev = &pr->power.dev;
985 if (!pr->flags.power_setup_done)
986 return -EINVAL;
988 if (pr->flags.power == 0) {
989 return -EINVAL;
992 dev->cpu = pr->id;
994 if (max_cstate == 0)
995 max_cstate = 1;
997 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
998 cx = &pr->power.states[i];
999 state_usage = &dev->states_usage[count];
1001 if (!cx->valid)
1002 continue;
1004 #ifdef CONFIG_HOTPLUG_CPU
1005 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1006 !pr->flags.has_cst &&
1007 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1008 continue;
1009 #endif
1011 cpuidle_set_statedata(state_usage, cx);
1013 count++;
1014 if (count == CPUIDLE_STATE_MAX)
1015 break;
1018 dev->state_count = count;
1020 if (!count)
1021 return -EINVAL;
1023 return 0;
1027 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
1028 * global state data i.e. idle routines
1030 * @pr: the ACPI processor
1032 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1034 int i, count = CPUIDLE_DRIVER_STATE_START;
1035 struct acpi_processor_cx *cx;
1036 struct cpuidle_state *state;
1037 struct cpuidle_driver *drv = &acpi_idle_driver;
1039 if (!pr->flags.power_setup_done)
1040 return -EINVAL;
1042 if (pr->flags.power == 0)
1043 return -EINVAL;
1045 drv->safe_state_index = -1;
1046 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1047 drv->states[i].name[0] = '\0';
1048 drv->states[i].desc[0] = '\0';
1051 if (max_cstate == 0)
1052 max_cstate = 1;
1054 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1055 cx = &pr->power.states[i];
1057 if (!cx->valid)
1058 continue;
1060 #ifdef CONFIG_HOTPLUG_CPU
1061 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1062 !pr->flags.has_cst &&
1063 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1064 continue;
1065 #endif
1067 state = &drv->states[count];
1068 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1069 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1070 state->exit_latency = cx->latency;
1071 state->target_residency = cx->latency * latency_factor;
1073 state->flags = 0;
1074 switch (cx->type) {
1075 case ACPI_STATE_C1:
1076 if (cx->entry_method == ACPI_CSTATE_FFH)
1077 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1079 state->enter = acpi_idle_enter_c1;
1080 drv->safe_state_index = count;
1081 break;
1083 case ACPI_STATE_C2:
1084 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1085 state->enter = acpi_idle_enter_simple;
1086 drv->safe_state_index = count;
1087 break;
1089 case ACPI_STATE_C3:
1090 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1091 state->enter = pr->flags.bm_check ?
1092 acpi_idle_enter_bm :
1093 acpi_idle_enter_simple;
1094 break;
1097 count++;
1098 if (count == CPUIDLE_STATE_MAX)
1099 break;
1102 drv->state_count = count;
1104 if (!count)
1105 return -EINVAL;
1107 return 0;
1110 int acpi_processor_hotplug(struct acpi_processor *pr)
1112 int ret = 0;
1114 if (disabled_by_idle_boot_param())
1115 return 0;
1117 if (!pr)
1118 return -EINVAL;
1120 if (nocst) {
1121 return -ENODEV;
1124 if (!pr->flags.power_setup_done)
1125 return -ENODEV;
1127 cpuidle_pause_and_lock();
1128 cpuidle_disable_device(&pr->power.dev);
1129 acpi_processor_get_power_info(pr);
1130 if (pr->flags.power) {
1131 acpi_processor_setup_cpuidle_cx(pr);
1132 ret = cpuidle_enable_device(&pr->power.dev);
1134 cpuidle_resume_and_unlock();
1136 return ret;
1139 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1141 int cpu;
1142 struct acpi_processor *_pr;
1144 if (disabled_by_idle_boot_param())
1145 return 0;
1147 if (!pr)
1148 return -EINVAL;
1150 if (nocst)
1151 return -ENODEV;
1153 if (!pr->flags.power_setup_done)
1154 return -ENODEV;
1157 * FIXME: Design the ACPI notification to make it once per
1158 * system instead of once per-cpu. This condition is a hack
1159 * to make the code that updates C-States be called once.
1162 if (smp_processor_id() == 0 &&
1163 cpuidle_get_driver() == &acpi_idle_driver) {
1165 cpuidle_pause_and_lock();
1166 /* Protect against cpu-hotplug */
1167 get_online_cpus();
1169 /* Disable all cpuidle devices */
1170 for_each_online_cpu(cpu) {
1171 _pr = per_cpu(processors, cpu);
1172 if (!_pr || !_pr->flags.power_setup_done)
1173 continue;
1174 cpuidle_disable_device(&_pr->power.dev);
1177 /* Populate Updated C-state information */
1178 acpi_processor_setup_cpuidle_states(pr);
1180 /* Enable all cpuidle devices */
1181 for_each_online_cpu(cpu) {
1182 _pr = per_cpu(processors, cpu);
1183 if (!_pr || !_pr->flags.power_setup_done)
1184 continue;
1185 acpi_processor_get_power_info(_pr);
1186 if (_pr->flags.power) {
1187 acpi_processor_setup_cpuidle_cx(_pr);
1188 cpuidle_enable_device(&_pr->power.dev);
1191 put_online_cpus();
1192 cpuidle_resume_and_unlock();
1195 return 0;
1198 static int acpi_processor_registered;
1200 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1201 struct acpi_device *device)
1203 acpi_status status = 0;
1204 int retval;
1205 static int first_run;
1207 if (disabled_by_idle_boot_param())
1208 return 0;
1210 if (!first_run) {
1211 dmi_check_system(processor_power_dmi_table);
1212 max_cstate = acpi_processor_cstate_check(max_cstate);
1213 if (max_cstate < ACPI_C_STATES_MAX)
1214 printk(KERN_NOTICE
1215 "ACPI: processor limited to max C-state %d\n",
1216 max_cstate);
1217 first_run++;
1220 if (!pr)
1221 return -EINVAL;
1223 if (acpi_gbl_FADT.cst_control && !nocst) {
1224 status =
1225 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1226 if (ACPI_FAILURE(status)) {
1227 ACPI_EXCEPTION((AE_INFO, status,
1228 "Notifying BIOS of _CST ability failed"));
1232 acpi_processor_get_power_info(pr);
1233 pr->flags.power_setup_done = 1;
1236 * Install the idle handler if processor power management is supported.
1237 * Note that we use previously set idle handler will be used on
1238 * platforms that only support C1.
1240 if (pr->flags.power) {
1241 /* Register acpi_idle_driver if not already registered */
1242 if (!acpi_processor_registered) {
1243 acpi_processor_setup_cpuidle_states(pr);
1244 retval = cpuidle_register_driver(&acpi_idle_driver);
1245 if (retval)
1246 return retval;
1247 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
1248 acpi_idle_driver.name);
1250 /* Register per-cpu cpuidle_device. Cpuidle driver
1251 * must already be registered before registering device
1253 acpi_processor_setup_cpuidle_cx(pr);
1254 retval = cpuidle_register_device(&pr->power.dev);
1255 if (retval) {
1256 if (acpi_processor_registered == 0)
1257 cpuidle_unregister_driver(&acpi_idle_driver);
1258 return retval;
1260 acpi_processor_registered++;
1262 return 0;
1265 int acpi_processor_power_exit(struct acpi_processor *pr,
1266 struct acpi_device *device)
1268 if (disabled_by_idle_boot_param())
1269 return 0;
1271 if (pr->flags.power) {
1272 cpuidle_unregister_device(&pr->power.dev);
1273 acpi_processor_registered--;
1274 if (acpi_processor_registered == 0)
1275 cpuidle_unregister_driver(&acpi_idle_driver);
1278 pr->flags.power_setup_done = 0;
1279 return 0;