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[pohmelfs.git] / drivers / video / omap2 / displays / panel-tpo-td043mtea1.c
blobe6649aa8959135be0181744ea5e528ac4189e2c5
1 /*
2 * LCD panel driver for TPO TD043MTEA1
4 * Author: Gražvydas Ignotas <notasas@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/spi/spi.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/gpio.h>
17 #include <linux/err.h>
18 #include <linux/slab.h>
20 #include <video/omapdss.h>
22 #define TPO_R02_MODE(x) ((x) & 7)
23 #define TPO_R02_MODE_800x480 7
24 #define TPO_R02_NCLK_RISING BIT(3)
25 #define TPO_R02_HSYNC_HIGH BIT(4)
26 #define TPO_R02_VSYNC_HIGH BIT(5)
28 #define TPO_R03_NSTANDBY BIT(0)
29 #define TPO_R03_EN_CP_CLK BIT(1)
30 #define TPO_R03_EN_VGL_PUMP BIT(2)
31 #define TPO_R03_EN_PWM BIT(3)
32 #define TPO_R03_DRIVING_CAP_100 BIT(4)
33 #define TPO_R03_EN_PRE_CHARGE BIT(6)
34 #define TPO_R03_SOFTWARE_CTL BIT(7)
36 #define TPO_R04_NFLIP_H BIT(0)
37 #define TPO_R04_NFLIP_V BIT(1)
38 #define TPO_R04_CP_CLK_FREQ_1H BIT(2)
39 #define TPO_R04_VGL_FREQ_1H BIT(4)
41 #define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
42 TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \
43 TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
44 TPO_R03_SOFTWARE_CTL)
46 #define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
47 TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
49 static const u16 tpo_td043_def_gamma[12] = {
50 106, 200, 289, 375, 460, 543, 625, 705, 785, 864, 942, 1020
53 struct tpo_td043_device {
54 struct spi_device *spi;
55 struct regulator *vcc_reg;
56 u16 gamma[12];
57 u32 mode;
58 u32 hmirror:1;
59 u32 vmirror:1;
62 static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
64 struct spi_message m;
65 struct spi_transfer xfer;
66 u16 w;
67 int r;
69 spi_message_init(&m);
71 memset(&xfer, 0, sizeof(xfer));
73 w = ((u16)addr << 10) | (1 << 8) | data;
74 xfer.tx_buf = &w;
75 xfer.bits_per_word = 16;
76 xfer.len = 2;
77 spi_message_add_tail(&xfer, &m);
79 r = spi_sync(spi, &m);
80 if (r < 0)
81 dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
82 return r;
85 static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
87 u8 i, val;
89 /* gamma bits [9:8] */
90 for (val = i = 0; i < 4; i++)
91 val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
92 tpo_td043_write(spi, 0x11, val);
94 for (val = i = 0; i < 4; i++)
95 val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
96 tpo_td043_write(spi, 0x12, val);
98 for (val = i = 0; i < 4; i++)
99 val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
100 tpo_td043_write(spi, 0x13, val);
102 /* gamma bits [7:0] */
103 for (val = i = 0; i < 12; i++)
104 tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
107 static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
109 u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | \
110 TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
111 if (h)
112 reg4 &= ~TPO_R04_NFLIP_H;
113 if (v)
114 reg4 &= ~TPO_R04_NFLIP_V;
116 return tpo_td043_write(spi, 4, reg4);
119 static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
121 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
123 tpo_td043->hmirror = enable;
124 return tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
125 tpo_td043->vmirror);
128 static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
130 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
132 return tpo_td043->hmirror;
135 static ssize_t tpo_td043_vmirror_show(struct device *dev,
136 struct device_attribute *attr, char *buf)
138 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
140 return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->vmirror);
143 static ssize_t tpo_td043_vmirror_store(struct device *dev,
144 struct device_attribute *attr, const char *buf, size_t count)
146 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
147 int val;
148 int ret;
150 ret = kstrtoint(buf, 0, &val);
151 if (ret < 0)
152 return ret;
154 val = !!val;
156 ret = tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, val);
157 if (ret < 0)
158 return ret;
160 tpo_td043->vmirror = val;
162 return count;
165 static ssize_t tpo_td043_mode_show(struct device *dev,
166 struct device_attribute *attr, char *buf)
168 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
170 return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->mode);
173 static ssize_t tpo_td043_mode_store(struct device *dev,
174 struct device_attribute *attr, const char *buf, size_t count)
176 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
177 long val;
178 int ret;
180 ret = kstrtol(buf, 0, &val);
181 if (ret != 0 || val & ~7)
182 return -EINVAL;
184 tpo_td043->mode = val;
186 val |= TPO_R02_NCLK_RISING;
187 tpo_td043_write(tpo_td043->spi, 2, val);
189 return count;
192 static ssize_t tpo_td043_gamma_show(struct device *dev,
193 struct device_attribute *attr, char *buf)
195 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
196 ssize_t len = 0;
197 int ret;
198 int i;
200 for (i = 0; i < ARRAY_SIZE(tpo_td043->gamma); i++) {
201 ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
202 tpo_td043->gamma[i]);
203 if (ret < 0)
204 return ret;
205 len += ret;
207 buf[len - 1] = '\n';
209 return len;
212 static ssize_t tpo_td043_gamma_store(struct device *dev,
213 struct device_attribute *attr, const char *buf, size_t count)
215 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
216 unsigned int g[12];
217 int ret;
218 int i;
220 ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
221 &g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
222 &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
224 if (ret != 12)
225 return -EINVAL;
227 for (i = 0; i < 12; i++)
228 tpo_td043->gamma[i] = g[i];
230 tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
232 return count;
235 static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
236 tpo_td043_vmirror_show, tpo_td043_vmirror_store);
237 static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
238 tpo_td043_mode_show, tpo_td043_mode_store);
239 static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
240 tpo_td043_gamma_show, tpo_td043_gamma_store);
242 static struct attribute *tpo_td043_attrs[] = {
243 &dev_attr_vmirror.attr,
244 &dev_attr_mode.attr,
245 &dev_attr_gamma.attr,
246 NULL,
249 static struct attribute_group tpo_td043_attr_group = {
250 .attrs = tpo_td043_attrs,
253 static const struct omap_video_timings tpo_td043_timings = {
254 .x_res = 800,
255 .y_res = 480,
257 .pixel_clock = 36000,
259 .hsw = 1,
260 .hfp = 68,
261 .hbp = 214,
263 .vsw = 1,
264 .vfp = 39,
265 .vbp = 34,
268 static int tpo_td043_power_on(struct omap_dss_device *dssdev)
270 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
271 int nreset_gpio = dssdev->reset_gpio;
272 int r;
274 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
275 return 0;
277 r = omapdss_dpi_display_enable(dssdev);
278 if (r)
279 goto err0;
281 if (dssdev->platform_enable) {
282 r = dssdev->platform_enable(dssdev);
283 if (r)
284 goto err1;
287 regulator_enable(tpo_td043->vcc_reg);
289 /* wait for power up */
290 msleep(160);
292 if (gpio_is_valid(nreset_gpio))
293 gpio_set_value(nreset_gpio, 1);
295 tpo_td043_write(tpo_td043->spi, 2,
296 TPO_R02_MODE(tpo_td043->mode) | TPO_R02_NCLK_RISING);
297 tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_NORMAL);
298 tpo_td043_write(tpo_td043->spi, 0x20, 0xf0);
299 tpo_td043_write(tpo_td043->spi, 0x21, 0xf0);
300 tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
301 tpo_td043->vmirror);
302 tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
304 return 0;
305 err1:
306 omapdss_dpi_display_disable(dssdev);
307 err0:
308 return r;
311 static void tpo_td043_power_off(struct omap_dss_device *dssdev)
313 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
314 int nreset_gpio = dssdev->reset_gpio;
316 if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
317 return;
319 tpo_td043_write(tpo_td043->spi, 3,
320 TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
322 if (gpio_is_valid(nreset_gpio))
323 gpio_set_value(nreset_gpio, 0);
325 /* wait for at least 2 vsyncs before cutting off power */
326 msleep(50);
328 tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_STANDBY);
330 regulator_disable(tpo_td043->vcc_reg);
332 if (dssdev->platform_disable)
333 dssdev->platform_disable(dssdev);
335 omapdss_dpi_display_disable(dssdev);
338 static int tpo_td043_enable(struct omap_dss_device *dssdev)
340 int ret;
342 dev_dbg(&dssdev->dev, "enable\n");
344 ret = tpo_td043_power_on(dssdev);
345 if (ret)
346 return ret;
348 dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
350 return 0;
353 static void tpo_td043_disable(struct omap_dss_device *dssdev)
355 dev_dbg(&dssdev->dev, "disable\n");
357 tpo_td043_power_off(dssdev);
359 dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
362 static int tpo_td043_suspend(struct omap_dss_device *dssdev)
364 tpo_td043_power_off(dssdev);
365 dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
366 return 0;
369 static int tpo_td043_resume(struct omap_dss_device *dssdev)
371 int r = 0;
373 r = tpo_td043_power_on(dssdev);
374 if (r)
375 return r;
377 dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
379 return 0;
382 static int tpo_td043_probe(struct omap_dss_device *dssdev)
384 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
385 int nreset_gpio = dssdev->reset_gpio;
386 int ret = 0;
388 dev_dbg(&dssdev->dev, "probe\n");
390 if (tpo_td043 == NULL) {
391 dev_err(&dssdev->dev, "missing tpo_td043_device\n");
392 return -ENODEV;
395 dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IHS |
396 OMAP_DSS_LCD_IVS | OMAP_DSS_LCD_IPC;
397 dssdev->panel.timings = tpo_td043_timings;
398 dssdev->ctrl.pixel_size = 24;
400 tpo_td043->mode = TPO_R02_MODE_800x480;
401 memcpy(tpo_td043->gamma, tpo_td043_def_gamma, sizeof(tpo_td043->gamma));
403 tpo_td043->vcc_reg = regulator_get(&dssdev->dev, "vcc");
404 if (IS_ERR(tpo_td043->vcc_reg)) {
405 dev_err(&dssdev->dev, "failed to get LCD VCC regulator\n");
406 ret = PTR_ERR(tpo_td043->vcc_reg);
407 goto fail_regulator;
410 if (gpio_is_valid(nreset_gpio)) {
411 ret = gpio_request(nreset_gpio, "lcd reset");
412 if (ret < 0) {
413 dev_err(&dssdev->dev, "couldn't request reset GPIO\n");
414 goto fail_gpio_req;
417 ret = gpio_direction_output(nreset_gpio, 0);
418 if (ret < 0) {
419 dev_err(&dssdev->dev, "couldn't set GPIO direction\n");
420 goto fail_gpio_direction;
424 ret = sysfs_create_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
425 if (ret)
426 dev_warn(&dssdev->dev, "failed to create sysfs files\n");
428 return 0;
430 fail_gpio_direction:
431 gpio_free(nreset_gpio);
432 fail_gpio_req:
433 regulator_put(tpo_td043->vcc_reg);
434 fail_regulator:
435 kfree(tpo_td043);
436 return ret;
439 static void tpo_td043_remove(struct omap_dss_device *dssdev)
441 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
442 int nreset_gpio = dssdev->reset_gpio;
444 dev_dbg(&dssdev->dev, "remove\n");
446 sysfs_remove_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
447 regulator_put(tpo_td043->vcc_reg);
448 if (gpio_is_valid(nreset_gpio))
449 gpio_free(nreset_gpio);
452 static struct omap_dss_driver tpo_td043_driver = {
453 .probe = tpo_td043_probe,
454 .remove = tpo_td043_remove,
456 .enable = tpo_td043_enable,
457 .disable = tpo_td043_disable,
458 .suspend = tpo_td043_suspend,
459 .resume = tpo_td043_resume,
460 .set_mirror = tpo_td043_set_hmirror,
461 .get_mirror = tpo_td043_get_hmirror,
463 .driver = {
464 .name = "tpo_td043mtea1_panel",
465 .owner = THIS_MODULE,
469 static int tpo_td043_spi_probe(struct spi_device *spi)
471 struct omap_dss_device *dssdev = spi->dev.platform_data;
472 struct tpo_td043_device *tpo_td043;
473 int ret;
475 if (dssdev == NULL) {
476 dev_err(&spi->dev, "missing dssdev\n");
477 return -ENODEV;
480 spi->bits_per_word = 16;
481 spi->mode = SPI_MODE_0;
483 ret = spi_setup(spi);
484 if (ret < 0) {
485 dev_err(&spi->dev, "spi_setup failed: %d\n", ret);
486 return ret;
489 tpo_td043 = kzalloc(sizeof(*tpo_td043), GFP_KERNEL);
490 if (tpo_td043 == NULL)
491 return -ENOMEM;
493 tpo_td043->spi = spi;
494 dev_set_drvdata(&spi->dev, tpo_td043);
495 dev_set_drvdata(&dssdev->dev, tpo_td043);
497 omap_dss_register_driver(&tpo_td043_driver);
499 return 0;
502 static int __devexit tpo_td043_spi_remove(struct spi_device *spi)
504 struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&spi->dev);
506 omap_dss_unregister_driver(&tpo_td043_driver);
507 kfree(tpo_td043);
509 return 0;
512 static struct spi_driver tpo_td043_spi_driver = {
513 .driver = {
514 .name = "tpo_td043mtea1_panel_spi",
515 .owner = THIS_MODULE,
517 .probe = tpo_td043_spi_probe,
518 .remove = __devexit_p(tpo_td043_spi_remove),
521 static int __init tpo_td043_init(void)
523 return spi_register_driver(&tpo_td043_spi_driver);
526 static void __exit tpo_td043_exit(void)
528 spi_unregister_driver(&tpo_td043_spi_driver);
531 module_init(tpo_td043_init);
532 module_exit(tpo_td043_exit);
534 MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
535 MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
536 MODULE_LICENSE("GPL");